JPS5884466A - Semiconductor element - Google Patents

Abstract

PURPOSE:To obtain the semiconductor element having excellent performance characteristics, reliability and stability by forming the principal section of the semiconductor element by a polycrystal silicon thin-film semiconductor layer, the maximum of the roughness of the surface thereof is substantially 800Angstrom or lower. CONSTITUTION:With the polycrystalline silicon thin-film semiconductor layer forming the semiconductor element, the film contains 3-0.01at. (atomic)% hydrogen, and the roughness of the surface is 800Angstrom or lower. The orientation intensity of the X-ray diffraction pattern or electron-ray diffraction pattern 220 of the polycrystal silicon thin-film is made 30% or higher to the whole orientation intensity or the mean crystal grain size of the polycrystal silicon thin-film is made 200Angstrom or higher. Accordingly, the scanning circuit and driving circuit of a device utilizing a LC, an EL, an EC or the like or a picture reading device or the like can stably be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device such as a field effect thin film transistor, and more particularly, the present invention relates to a semiconductor device such as a field effect thin film transistor, and more particularly, the main part thereof is composed of a polycrystalline silicon thin film semiconductor layer having high operating characteristics, reliability, and stability, and a conductor conductor. Regarding elements.

Recently, the scanning circuit section of image capture devices such as long-dimensional photosensors and large-area two-dimensional photosensors for image reading, liquid crystal (abbreviated as LO), and electroclaw materials ( Due to the large area of these display parts, the drive circuit part of a good image display device using electroluminescent material (abbreviated as EC) or electroluminescent material (abbreviated as EL) is made of silicon thin film formed on a predetermined substrate. A method has been proposed in which a field-effect thin film transistor is formed.

Polycrystalline rather than amorphous silicon thin film is desired in order to realize larger image reading devices and display devices with higher speed and higher functionality. One of the reasons for this is the effective carrier mobility (ef
effective carrying mobility)
11eff is required to be large, but in an amorphous silicon thin film obtained by a normal discharge decomposition method, it is at most 0, I C1F'/V-sec 9 degrees, which is lower than that of single crystal silicon. In addition, changes over time due to device driving are significant, so that the desired requirements cannot be fully met. Since the small mobility μeff and the large change over time are characteristics of amorphous silicon thin films, it is said that amorphous silicon thin films are harmful to thin film creation and cannot take advantage of low production costs. It has inherent inconvenience.

On the other hand, the mobility μeff of a polycrystalline silicon thin film is much larger than that of an amorphous silicon thin film, based on actual measured data, and theoretically it is higher than the currently obtained value. There is a possibility that one having an even larger value of mobility μeff can be created.

The current situation is that elements or devices made from polycrystalline silicon thin films conventionally produced by various methods have not been able to sufficiently exhibit desired characteristics and reliability. Based on the idea that the characteristics and reliability of the bonding surface determine the performance and reliability of the device,
In view of the above points, as a result of intensive studies, it was determined that the amount of hydrogen atoms (H) contained in the silicon thin film and the unevenness of the silicon thin film surface determine the performance and reliability of the polycrystalline silicon thin film semiconductor device. I found it.

More specifically, when forming a field effect thin film transistor using a polycrystalline silicon thin film as a material, conventional polycrystalline silicon thin films have large and uneven surface irregularities, which impede device characteristics 1, such as the concentration effect. Carrier Mobility (μ6ff) e Changes in yield and operation over time due to gate leakage, etc. It was found that each element O irritability was reduced or worsened.9. In addition, the inclusion of a certain amount of H in the polycrystalline silicon thin film makes the above-mentioned device characteristics usable for practical use, and also reduces variations in each device and further improves various practical characteristics. We have also discovered that there is something to be said about this.

The main object of the present invention is to provide a semiconductor device having a high-performance polycrystalline silicon thin film semiconductor layer.

More specifically, the present invention aims to provide a field effect thin film transistor with high performance, high reliability, and high stability using a polycrystalline silicon thin film semiconductor formed on a substrate.

Another object of the present invention is to provide a large-area semiconductor device using an excellent polycrystalline silicon thin film semiconductor layer and having nine field effect thin film transistors as constituent elements.

The semiconductor device of the present invention has polycrystalline silicon, and is characterized in that its surface unevenness is 800λ or less. The object of the present invention can be more effectively achieved by setting the strength to 30% or more of the total orientation strength, or by setting the average crystal grain size of the Hiromata or polycrystalline silicon thin film to 20G5 or more. be done.

Field-effect thin film transistors, which are an example of semiconductor devices fabricated using polycrystalline silicon thin films with such H content and surface roughness, have improved, and changes over time in transistor characteristics due to continuous operation have been improved. A field effect thin film transistor (T
PT) is a semiconductor layer and an electrode layer.

It is known as a nine transistor using an insulating layer. That is, a voltage is applied between the source and drain electrodes that are adjacent to the semiconductor layer and have nine-ohmic contact, and the channel current flowing therethrough is modulated by the bias voltage applied to the nine-gate electrode through an insulating layer. .

FIG. 1 shows an example of a typical basic structure of such &TPT. A source electrode 103 and a drain electrode 104 are provided on an insulating substrate 101 and in contact with a leading conductor layer 102, an insulating layer 105 is provided to cover these, and a gate electrode is provided on the insulating layer 105. There are 106.

TF'T having the structure shown in FIG. 1 according to the present invention
In K, the semiconductor layer 102 is made of a polycrystalline silicon thin film having the above-mentioned characteristics, and between each of the drain electrodes 104, there is a lllon layer 107 made of non-△□+ crystalline silicon, A Dr. 2 n-layer log is provided to form an ohmic contact.

The insulating layer 105 is made of OV D (Ohmica! Vapo
urDeposition ) or L P OVD (
Low prJure Ohe+n1ca/Vapou
r Deposition ) or a POVD (P
/awnaohemica/Vapour Depos
silicon nitride formed in
8 iox, A/! Composed of 01- etc. O material.

In the present invention, by increasing the amount of H contained in the polycrystalline silicon thin film to 0.01st, - or more, various transistor characteristics can be improved, and H atoms bond with 8i atoms in the form of 8i-H. However, Si = H,,Si
It is expected that the bonded structure, such as =H, also contains free hydrogen, and due to these hydrogens contained in an unstable state, its properties change over time. Although it seems that 1.3at from many experimental facts by the inventors
- When the amount of H is less than 1, deterioration of the transistor characteristics hardly occurs, and when the transistor is operated continuously as described above, the effective carrier mobility decreases. It is desirable that the output drain current decreases with time and the threshold voltage changes.

This invention Kt! The amount of hydrogen contained in a polycrystalline silicon thin film specified in
A 5 d sample was loaded into the analysis needle holder, the hydrogen weight was measured, and the amount of hydrogen contained in the film was measured using a
Calculated by tomic%.9.

O mold small amount analysis of 0.1 m1.11 or less was performed using a secondary ion mass spectrometer -8I MS- (Oame/a company 51Mode/
IM8-3f). This analytical method followed a conventional method. That is, to prevent charge-up, 200λ of gold is deposited on the thin film, the ion energy of the -order ion beam is 8 KeV, the spot size is 505 wg, the ion beam is 4t/pull current is 5xio, and the etching area is 250 x 250 μm.
Find the detection intensity ratio of male-ions to hydrogen content a
Mourning calculated with tomic-.

In addition, the following method was used to examine the aging of multi-crystalline silicon thin film transistors.

A TET having the structure shown in FIG. 2 was fabricated, and a gate voltage V = 40 V was applied to 201, and a drain voltage V = 40 V was applied between the source 203 and the drain 202 to cause a drain current to flow between the source 203 and the drain.

Ctrometer 208 (Keithley 6100
z v Ctrometer) Measured from K to measure the temporal change in drain/current. The rate of change over time was expressed by dividing the amount of variation in the drain current after continuous operation for the SOO time by the initial drain/current and multiplying it by 100.

It intersects the hole axis, which is the horizontal axis, and is defined by points. Changes in VTH before and after the change over time were also examined at the same time, and the amount of change was expressed in volts.

Furthermore, by setting the surface unevenness of the polycrystalline silicon thin film to 800λ or less, an insulating layer for a gate is formed on the surface of this polycrystalline silicon thin film, thereby significantly reducing gate leakage in the case of a gate type field effect transistor. I can do it. Since the gate insulating layer usually improves transistor characteristics, convexity significantly reduces transistor characteristics, particularly effective carrier mobility, and also increases deterioration over time.

These facts indicate that carriers drifting on the insulating layer and polycrystalline silicon surface are strongly affected by unevenness, and reducing surface unevenness is an essential condition for transistor characteristics and stability. be.

Next, the characteristics of a lower gate type field effect transistor in which a polycrystalline silicon thin film is formed on a gate insulating layer are as follows:
The effective carrier mobility is extremely small, and the continuous operation of the transistor changes over time, resulting in poor practical characteristics.

The polycrystalline silicon thin film disclosed in the present invention, which is formed with a surface roughness of 8005 or less, undergoes dense crystal growth from the substrate interface, resulting in significant differences in crystallinity and orientation in the film thickness direction. This is something that has never been seen before, and it also provides excellent transistor characteristics.

It is desirable for the surface roughness of the polycrystalline silicon thin film to be 800λ or less for field effect transistors, regardless of whether it is an upper or lower gate type, and most preferably 500λ or less. In the present invention, the front surface unevenness is measured using a field emission scanning electron microscope (JP8M-3OW: manufactured by JEOL Ltd.) at 25K.
Surface of polycrystalline thin film silicon by V-accelerated electrons - New surface 1
00,000 times I asked for it.

H contained in the formed polycrystalline silicon thin film semiconductor layer
The aforementioned limitation of the amount and its roughness can be achieved in various ways.

For example, a method of depositing hydrogenated silicon such as 8iH4, 8i, H, etc. by glow discharge decomposition (GD), 8
Sputtering was performed in a gas containing H8 using an i-target.
) method, electron beam evaporation (IP) method of 8i in H, plasma atmosphere, method of evaporation in H7 atmosphere under ultra-high vacuum (HVD method), OVD -?
This can be achieved under specific conditions such as a method of treating a polycrystalline silicon film formed by LPOVD or the like with H or plasma. What is particularly noteworthy about this invention! - is formed by the GD method, the 8P method, the IP method and the HVD method & according to the Kuta bond silicon thin film semiconductor layer, as disclosed in the present invention, 3
Even at low temperatures of 50°C to 450°C, as long as limits on H amount and surface roughness are observed, conventionally known polycrystals produced by OVD or LPOVD at high temperatures (over 600°C) and H, plasma annealed can be produced. This book provides transistor characteristics comparable to those of silicon films, as well as stability and reliability, and clearly expresses the usefulness of the present invention.

Furthermore, as the H content and surface roughness of the polycrystalline silicon thin film are satisfied, and as the (220) orientation becomes stronger, it is recognized that the transistor characteristics, especially the effective carrier mobility, further improve. greatly affects.

The crystallinity and orientation of polycrystalline silicon/thin spread depends on the film preparation method,
It is known that various films can be obtained depending on the film formation conditions.

In the present invention, a combination of X-ray diffraction and electron beam diffraction was used to determine the orientation.

Xll1 diffraction strong diffraction Rig of the prepared polycrystalline silicon film
Aku Denki X@Dicractometer (Steel tube ball.

35 KV, 10 mA) and compared.

The diffraction angle 2θ was varied from 200 to 65°t (IH).

Further, the electron beam diffraction intensity was measured using JgM-100v manufactured by JEOL Ltd., and each diffraction intensity was determined in the same manner.9.

ASTM card (A27-1402, JOPD81
(977), in the case of polycrystalline silicon with no orientation, the plane (h, ni, l) with high diffraction intensity is expressed as (11
1): (220): (311)=100=55:3
When the diffraction intensity is extracted by (220) at 0, the ratio to the total diffraction intensity is approximately (55/250) x 100 = 22 (*).

Based on this value, a large value (220) results in large changes over time, which is not preferable. In the present invention, the optimum time is preferably 501 seconds or more.

Furthermore, it was found that as the H content and surface roughness of the polycrystalline silicon thin film were satisfied and the average crystal grain size (average grain size) increased, the transistor characteristics, particularly the effective carrier mobility, improved. average gray/
The size value is determined from the half-width of the (22G) peak in the above-mentioned X-ray diffraction pattern.
It was determined by the r method. The average dalein size is 200
Effective carrier mobility increases by 5% or more. Particularly optimally, d is desirably 300λ or more.

Gray/size often differs in size due to differences in growth coverage due to differences in film thickness. The degree of difference in dale size due to film thickness varies depending on the manufacturing method and manufacturing conditions of the polycrystalline silicon thin film. Therefore, the film thickness is determined as appropriate depending on each manufacturing method.

In the present invention, as disclosed, in particular the glow discharge process IH of gases of hydrogenated silicon compounds.

In the case of silicon sputtering method, ion blating method, and ultra-high vacuum evaporation method in an atmosphere, the purpose of the present invention can be achieved when the base @ surface temperature is 500 ° C. or less (in the range of about 350 to 500 ° C.). It is possible to form polycrystalline silicon thin films. This fact is not only advantageous in terms of uniform heating of the substrate and inexpensive large-area substrate materials in the production of large-area drive circuits and scanning circuits for large-area devices, but also in the production of large-area drive circuits and scanning circuits for large-area devices. In applications of image devices such as substrates and photoelectric conversion light-receiving elements with incident attenuation on the substrate side, glass substrates having C transmissive properties are often desired, and are important as they can meet this demand.

Therefore, according to the present invention, compared to the prior art, it is possible to operate in a low temperature range. In addition to sapphire, spinel, silicon wafers, etc., general low-melting glass, heat-resistant plastics, etc. may also be used.

The glass substrates include ordinary glass with a softening point of 630°C, ordinary hard glass with a softening point of 780°C, and glass with a softening point of 8°C.
20°C super hard glass (JI class 81 super hard glass) etc. can be used ◇ In the manufacturing method of the present invention, no matter which substrate is used, the substrate temperature can be kept below the softening point, without damaging the substrate. , which has the advantage of being able to create a membrane.

In the embodiments of the present invention, Corning #7059 glass is mainly used as the substrate glass among ordinary glass (soda glass) with a low softening point.
It is possible to use 00° C. quartz glass or the like as a substrate. However, from a practical point of view, it is advantageous to use #i grade glass at low cost and in a large area to fabricate thin film transistors.

In the following, the present invention will be explained in more detail.In the following, the present invention will be explained in more detail.
The results of the T operation will be specifically explained using examples.

Example 1 A polycrystalline silicon thin film was formed on a Corning glass (◆7059) substrate using the steps shown below, and a field effect thin film transistor (TPT) was manufactured.
, 0.71 thickness ◆7059: r-2y Gugara x f
HP, 4 (NO, 10H, 0008OS mixture) was lightly etched, and the substrate 300 was prepared by drying with a running water washing solution.
It was fixed in close contact with the substrate heating holder 302 on the upper anode side of 01. Pelger 301 and diffusion pump 309
to bring it to a vacuum state, and set the background vacuum IF to 2X
After exhausting to 10-' Torr, heat the substrate heating holder 302 tube to raise the surface temperature of the substrate 3000 to 350°C.
I kept it. Next, dilute 10woq4K with H and gas.
8iH4 waste (8+H, (10)/1 (abbreviated)) using mass flow controller 304 to
The ring-shaped gas blowout tube 315 is introduced into the Kalaher jar 301 at a flow rate of 0.03 To
rr K I @ II. After the Pelger internal pressure stabilized, a 13.56 MHz high-frequency electric current of $1314 K was applied to the lower cathode electrode 313 to generate a glow discharge at the cathode and the anode (substrate heating holder) 302. 90 The current was 60 rms, and the RF discharge power (progressive wave - reflected wave) was 20 W. Under these conditions, the growth rate of the silicon film was 0.25 vsec, and after 4.5 hours of growth, approximately 0 The distribution of the film thickness of the silicon film on the substrate 300 formed in this way after forming the .4μ film tube is within ±”5 μm, and the amount of H contained in the silicon layer is % -S silicon and TPT was fabricated according to the process shown in Figure 4. Silicon thin @ 4
01 On Ktjil-N soil layer 402 [- was formed in the apparatus as follows, and after adjusting the temperature of the substrate to 250°C, it was heated with hydrogen gas for 10.0 m 011)P! IIK diluted PH
, gas (abbreviated as PH5(100)/Ht, 5 X 1
0-'' into the Pelger 301 through the mass 70-meters 304 and 306, and the Pelger 30
The pressure inside 1 was adjusted to 0.12 Torr and glow discharge was performed using IOW to form a P-doped soil layer 402 t-50.
Next, as in step (), the n-soil layer 402 is removed by photoetching except for the source electrode 403 region and the drain electrode 404 region. Next, a Pelger 30 was used to form a gate insulating film.
1, the above substrate is placed again in the heating holder 3 on the anode side.
02K fixed. As in the case of manufacturing polycrystalline silicon, the Pelger 301 is evacuated to lower the substrate temperature Ts to 2.
The temperature was set to 50°C, NH gas was drawn, and 208CCM of H4 (8i
H, (10 liters) gas was introduced through mass flow meters 305 and 304 at 58 cc to generate a glow discharge at 5 W, and an 8iNH film was deposited to a thickness of 405 f 25001.

Next, contact holes 2/406-7.406- for the source electrode 403 and drain electrode 404 are formed by a photo-etching process, and then ai
After forming an electrode film 407 by vapor depositing ^4 on the entire surface of the Nlf film 405, the electrode film 40 was photo-etched at 1 mK.
7 is processed to form a source electrode extraction electrode 408%, a drain electrode extraction electrode 409, and a gate electrode 410. After that, heat treatment is performed at 250° C. in Hxllll air. TPT (
Channel length L=10μ.

The channel width w=s o μ) was stable and exhibited good characteristics.

FIG. 6 shows an example of the characteristics of a TPT prototyped in this manner. FIG. 6 shows an example of the characteristics of a TPT using the gate voltage vG as a parameter for the relationship between drain current ID and drain voltage VD. Gate threshold voltage (Vtk
) is as low as 5V, and the ratio of the current value of vG=o at -=20V is more than three digits. Effective mobility of this element
(μeff) is ' 3 (V-sec) l), v
In(
The changes in the drain voltage gL) and vth are measured, and S
At OO time, ID was %0.1 or less, Vtk was completely unchanged, and DC operation characteristics over time were good.

In addition, the rate of gate leakage of TPT elements of the same shape on a 120w x 120-inch Corning glass substrate that fails to fully demonstrate their device characteristics is 0.2- or less, which is within the range of practical use.

lI Vagina Example 2 When forming a silicon film on Corning glass in the same manner as in Example 1, the substrate surface temperature was 380°C,
(stH4(io)Δ0 flow rate 28 CCM, Pelger internal pressure 0.015 Torr, RF puff-10 W conditions were used. The growth rate of the silicon film under these conditions was ho,
The growth time was 077 sec, and the growth time was 4 hours to form a film of about 0.1 μm. Contained in silicon 1, TPT-ii was then manufactured by the same steps as in Example 1.

The effective mobility of this element is 1.6(]];)Tearly, Vo=40V.

VD=40V f) 4 and Vth(D f
Fi conversion t-constant & Ka, 500 Q function ID FiG
, 11G or less, vt- remained unchanged at all, and the DC operating characteristics over time were good.

In addition, the rate of TPT devices having the same shape on a 120 as x 120 inch Corning glass substrate that could not fully exhibit their device characteristics due to gate leakage was almost 0.

Example 3 Corning glass 500 as shown in FIG.
After the upper KMog film (BB evaporation, 1000 layers thick) was completely deposited, a gate electrode 501t was formed into a predetermined shape by photolithography, and then a 8iNH film 502t was formed on the substrate under the same conditions as in Example 1. - Formation 2.5001 Formation
3 was formed under the same conditions as Example (Mackerel) to form a 0.1μ layer (smelling).

Furthermore, 500 layers of Kll 504 were formed on the polycrystalline silicon thin film 503 in the same manner as in Example (1), and then 1,500 layers of AI 11 [505] were deposited. After that, the source and drain electrodes 5 are again formed by hoard lithography.
7jT
F T (channel length = 10μ, channel width w
==, soow) showed good characteristics, and the threshold voltage (Vtb) of the 0 gate was 3V and ffi
<, V6 = 20 V f OVo = OO The ratio Fi of the current value is 3 digits or more. Effective mobility of this element 4-(pCr') Has O-9(ko;1) Te4
! ' * vo = " I under the condition of vvVD = 40V
The changes in D and Vth were measured and 9 was ``DF'' at 5500 hours.
i* 0.1% or less, Vtk Fi.

It remained completely unchanged.

Example 4 300 t of equivalent Goenda glass substrates prepared in the same manner as in Example 1 are kept in close contact with the substrate heating holder 302 on the upper anode side in the Pelger 301, and the substrate and the substrate are placed on the electrode plate of the lower cathode 313. A polycrystalline silicon plate (not shown: 99.9999 liters) was placed so as to face it.◇The Pelger 301 was evacuated with a diffusion pump 309, evacuated with 2X10-' Terrt, and the substrate heating holder 3021 was heated. The surface temperature of the substrate 3000 is 450℃.
The mass flow meter 308 K, 580 CM is introduced into the Pelger, and the kr/He (5/k) 5 ratio) mixed gas is 508 CCM by the mass flow meter 307.
The main pulp 31 is introduced into the Pel jar 301 at a flow rate of
After the Pelger internal pressure is stabilized, 2° OKV is applied to the lower cathode electrode 313 by the 1λ56 MHz high frequency power supply 314, and the Ω polycrystalline silicon is applied to the lower cathode electrode 313. 9. Glow discharge is generated between the plate and the anode (substrate heating holder) 302. The RF discharge power (travelling wave-reflected wave) was 200W. The growth rate of the silicon film under these conditions is 0.3λ/sec, which means that after 4 hours of growth, the growth rate of the silicon film is approximately 0.3λ/sec.
．． A 4μ film was formed.

The amount of H contained in the silicon layer was 0.21% (subsequently, as in Example 1, as shown in FIG. 4), a TFT was manufactured. The effective mobility of this element is 1
．． 0(-v7;c) s vG-40V, VD
=40V (D condition te ID & U Vth Oi & t111 constant L taka, 500 hours filte IDti, 0.
1- or less, Vtk was completely unchanged, and the DC operating characteristics over time were refreshing.

In addition, a TPT element of the same shape on a 120mm x 120mm Corning glass substrate is used.For elements that cannot fully demonstrate the element characteristics due to IJ, the temperature is 0.2mm, which is within the range of practical use. Ta.

When forming the entire silicon film on the substrate, AJ/H@
(5/95 ratio) t-508CCM K vs. TeHt, /
/14! Using silicon films with thicknesses of 0 and 4 μm, which were prepared by varying the amount of H as shown in No. 111 and having various H amounts and surface roughness, T was obtained by the same method as in Example IJ.
Table 1 shows the results of manufacturing PT and measuring all its properties.

KvG = vD knowledge ρ as well as tatami changes over time.
O = 40 V, 500 #l 1141 (D (
ID(7) -In(%n(f) value Takkuta ρQ It+(m) Nia ← Drain current after h As shown in Table 1, silicon l[K containing nf.

Good to get.

Example 6 When forming a silicon film on Corning glass in the same manner as in Example f41, the H of each film was about 0.4μ when the 8E<pr> in the Pelger was changed as shown in Table 2.
When the surface roughness of the polycrystalline silicon thin film formed as shown in Table 2, the gate element leakage rate is within the practical range, and the TF ? Carrier effective mobility was also shown to be favorable. .

Example 117 Similar to Example 3, a large substrate with a pigeon gate was used, and a polycrystalline silicon thin film with a Pelger internal pressure (Pr) varied as in Example 6 was prepared. Approximately 0.4g each was laminated.

n soil layer, jLJ! '1'F'r was fabricated by laminating it and photolithography, and the results are shown in Table 3.

When the surface unevenness of the polycrystalline silicon thin film formed as shown in Table 3, Table 93, was 800A or less, the effective carrier mobility and the temporal change in interlocking operation at 500A were good.

Example 8 When forming a silicon film on Corning glass in the same manner as in Example 1, the input RF power (Po) was changed as shown in Table 4.
As shown in Table 4, which shows the amount, unevenness, (220) orientation strength, and TPT characteristics, the (220) orientation is 3.
It was shown that below 0.04, the carrier effective mobility of Fi and TPT decreases, and the TPT change over time becomes large.

sm Example 9 Same as actual 111111, 1. When forming a silicon film on Corning glass, the growth time was changed to increase the Hl of each film thickness shown in Table 5.
m surface roughness, (220) orientation strength.

The average gra1n 5ize and TFT% properties are shown.

Table 5 As shown in Table 5, it is shown that the effective mobility of the '1' FT carrier is good when the gram size is 200 mm or more.

Example 10 An example in which a thin film transistor was formed using a polycrystalline silicon thin film semiconductor layer produced using the ion blasting deposition apparatus shown in FIG. 7 will be described below.

The inside of the deposition chamber 701, which can be reduced in pressure at the beginning, is
&oz Place the silicon evaporator side of the polycrystalline silicon in the boat 703, and place the Corning ÷7059 substrate on the support 704-1,
704-2 K was installed and the deposition chamber was evacuated until the base pressure reached approximately 1 x 10-νTorr K, and then heavy gas with a purity of 99.999- was introduced through the gas introduction pipe 705 to a hydrogen partial pressure PH of 3 x 10-' Torr was introduced into the deposition chamber. The 9 gas inlet pipes used have 2 diameters and the gas outlet is 2C11 in the loop-shaped part at the end.
Using holes of 0.5 mm at intervals, connect the 90th high frequency coil 706 (straight 1 [!5■) to 1156M.
High frequency Hg was applied and the output was set at 40 WK to form a high frequency plasma atmosphere inside the coil. On the other hand, while rotating the supports 704-1 and 704-2, the heating device 707 was activated and heated to about 430°C.

Next, the evaporator 702 was irradiated with an electron gun 708, heated, and made to fly silicon particles.The power of the 0ζ-notoki electron gun was about 0.3KW, and in this way, 4000V was generated in 2 hours. A polycrystalline silicon thin film was formed. Using this thin film tube, a thin film transistor was fabricated using the same process as in Example 1. The amount of H contained in the silicon layer is 0.5-, and the unevenness of the silicon film surface is approximately 4.
To-) Good at 505.

The effective mobility (μeff) of this cable is "-" s V (1=4 GV, VB=4
Although the changes in OI and VTH were kept constant, the ID was 0.1 or less after 500 hours, and the DC operating characteristics over time remained unchanged.

In addition, a TF'l' element of the same shape on a 120 m x 120 Corning glass substrate has a rate of approximately 0.3-0.3 - which prevents gate leakage from fully demonstrating the element characteristics, making it a practically usable TF'l' element. It was in.

Example 11 A Corning 7059 glass substrate prepared in the same manner as in Example 1 was loaded into a substrate holder 802 in an ultra-high vacuum chamber 801 shown in FIG.
After the pressure was reduced to 0''' Torr, the substrate temperature was set at 4QO°C using a tantalum heater 803. Subsequently, high purity hydrogen gas (99,9999 cm) 7'' was set at a pressure in the vacuum chamber of t5 x 10-' Tart through a variable leak valve of 808 K. Next, the electron gun 804 is operated at an accelerating voltage of f3KV, and the emitted electron beam is irradiated onto the silicon evaporator 805Kll to evaporate the silicon evaporator t.Then, the chassis 807 is opened and the substrate 800 is coated with a film thickness of 0.4 μm Kfk. A polycrystalline silicon film was formed by controlling the film thickness using a crystal oscillator film thickness meter 806. At this time, the 9-TM arrival speed during monitoring may be 1.4 A/sec. A thin film transistor was fabricated using this thin film in the same process as in Example 1. The amount of H contained in the silicon layer, Fi, is 0.151 s, and the unevenness of the silicon film surface is about 300 μm. The effective mobility (μeff) of this element is 2.1 (i).

Conditions of V□=40V, VB==40V teIo and (i
Vth O change was measured, and InaO,
1 vomit or less.

vth did not change at all, and the DC operating characteristics over time were good.

In addition, the rate of devices that could not fully demonstrate their device characteristics due to gate leakage for TPT devices with the same shape on a 120 m x 120 ws Corning glass substrate was about 0.2-, which was within the range of practical use.

[Brief explanation of the drawing]

FIG. 1 is a schematic explanatory diagram for explaining the structure of the semiconductor device of the present invention, and FIG. 2 is an explanatory diagram schematically showing a circuit for measuring the characteristics of the semiconductor device of the present invention. Figure 3, 7th
8 and 8 respectively show f of the semiconductor film manufacturing apparatus according to the present invention.
4 and 5 are schematic explanatory diagrams for explaining I, and FIGS.
Figure 6 is a construction diagram for the purpose of clarifying the vD of the semiconductor device of the present invention.
0 101...Substrate, 102...Thin Il [#P conductor layer%
103... Source electrode li, 104-... Drain electrode, 105... Insulating layer 106... Gate electrode,
107, 108 ・n soil layer. Applicant Canon Co., Ltd. Kinsha 7th Minister

Claims (1)

[Scope of Claims] A semiconductor device characterized in that its main portion is constituted by a polycrystalline silicon thin film semiconductor layer having a thickness of 800 5 or less. r2) The conductor element according to claim 1, wherein the (220'') orientation strength of the xiui diffraction pattern or the electron 11 diffraction pattern of the semiconductor layer is greater than or equal to SOS with respect to the overall orientation strength.13) The semiconductor device according to claim 1, wherein the semiconductor layer has an average crystal grain size of 200λ or more. (4) The semiconductor device according to claim 1, wherein the substrate is glass.