JPS5888461U - Receiving machine - Google Patents

Receiving machine

Info

Publication number
JPS5888461U
JPS5888461U JP1981183041U JP18304181U JPS5888461U JP S5888461 U JPS5888461 U JP S5888461U JP 1981183041 U JP1981183041 U JP 1981183041U JP 18304181 U JP18304181 U JP 18304181U JP S5888461 U JPS5888461 U JP S5888461U
Authority
JP
Japan
Prior art keywords
oscillator
amplifier
receiving machine
frequency
conversion circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1981183041U
Other languages
Japanese (ja)
Inventor
孝則 中野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1981183041U priority Critical patent/JPS5888461U/en
Publication of JPS5888461U publication Critical patent/JPS5888461U/en
Pending legal-status Critical Current

Links

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Superheterodyne Receivers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図は本考案の一実施例をボしたもので、ＣＡＴＶ用ダブ
ルコンバージョン型受信機のブロツクダアグラムを示し
たものである。 １・・・・・・信号入力端子、２・・・・・・バンドパ
スフィル　　　。 ター、３・・・・・・第１周波数変換回路、４・・・・
・・第１発振器用増幅器、５・・・・・・第１発振器、
６・・・・・・分周器、７・・・・・・ＰＬＬ周波数シ
ンセサイザシステム、８・・・・・・バンドパスフィル
タ、９・・・・・・第１中間周波増幅回路、１０・・・
・・・第２周波数変換回路、１１・・・第２発振器、１
２・・・・・・第２中間周波増幅器、１３・・・・・・
出力端子。The figure shows an embodiment of the present invention, and shows a block diagram of a double conversion type receiver for CATV. 1...Signal input terminal, 2...Band pass filter. ter, 3...first frequency conversion circuit, 4...
...first oscillator amplifier, 5...first oscillator,
6... Frequency divider, 7... PLL frequency synthesizer system, 8... Band pass filter, 9... First intermediate frequency amplification circuit, 10.・・・
...Second frequency conversion circuit, 11...Second oscillator, 1
2... Second intermediate frequency amplifier, 13...
Output terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ダブルコンバージョン型受信機の第１発振器用増幅器を
第１周波数変換回路又第１発振器の出力を注入するため
の増幅器として使用するのみならず第１発振器の発振周
波数を分周する分周器用増幅器として共用したことを特
徴とする受信機。The amplifier for the first oscillator of the double conversion type receiver is used not only as a first frequency conversion circuit or an amplifier for injecting the output of the first oscillator, but also as an amplifier for a frequency divider that divides the oscillation frequency of the first oscillator. A receiver characterized by being shared.
JP1981183041U 1981-12-09 1981-12-09 Receiving machine Pending JPS5888461U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1981183041U JPS5888461U (en) 1981-12-09 1981-12-09 Receiving machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1981183041U JPS5888461U (en) 1981-12-09 1981-12-09 Receiving machine

Publications (1)

Publication Number Publication Date
JPS5888461U true JPS5888461U (en) 1983-06-15

Family

ID=29981948

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1981183041U Pending JPS5888461U (en) 1981-12-09 1981-12-09 Receiving machine

Country Status (1)

Country Link
JP (1) JPS5888461U (en)

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