JPS5892283A - Manufacture of semiconductor light receiving element - Google Patents
Manufacture of semiconductor light receiving elementInfo
- Publication number
- JPS5892283A JPS5892283A JP56190355A JP19035581A JPS5892283A JP S5892283 A JPS5892283 A JP S5892283A JP 56190355 A JP56190355 A JP 56190355A JP 19035581 A JP19035581 A JP 19035581A JP S5892283 A JPS5892283 A JP S5892283A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- inp
- heat treatment
- receiving element
- light receiving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
- H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
- H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
- H10F30/22—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
- H10F30/221—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PN homojunction
- H10F30/2215—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PN homojunction the devices comprising active layers made of only Group III-V materials
Landscapes
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
（１） 発明の技術分野
本発明は１μｍ帯の波長を有する元に好適なＩｎＰ／Ｉ
ｎＧａＡｓｐ系の受光素子の製造方法に関す。DETAILED DESCRIPTION OF THE INVENTION (1) Technical field of the invention The present invention relates to an InP/I film having a wavelength in the 1 μm band.
The present invention relates to a method of manufacturing an nGaAsp-based light receiving element.
（２）技術の背景
元ファイバ通信における受光素子としてフォトダイオー
ド（ＰＤ）もしくはアバランシ・フォトダイオード（Ａ
ＰＤ）が用いられているが、１μｍ帯で優れた性能を有
する元ファイバが開発されたことにエリ、半導体レーザ
とともに、受光素子の技波長化が促進されている。(2) Technical background A photodiode (PD) or avalanche photodiode (A) is used as a light receiving element in fiber communication.
However, the development of original fibers that have excellent performance in the 1 μm band, along with semiconductor lasers, is promoting the advancement of light receiving elements at higher wavelengths.
この１μｍ帯において好適な受光素子を提供する目的で
、ＩｎＰ／ＩｎＧａＡｓＰ系ＡＰＤが開発されつつある
が、このＩｎＰ／ＩｎＧａＡｓＰ系ＡＰＤにおいては、
受光用ｐｎ接合に逆バイアスを印加したときに生ずる漏
れ１ｌｒｆｉを小さくするためにｐｎ接合をＩｎＧａＡ
ｓＰ党吸収層上に成！にせしめたＩｎＰ層内に形成する
のが普通である。すなわちｐｎ接合からの空乏層を光吸
収層内へ充分拡げて所要の受光波長に対する感度を得る
一方で、ｐｎ接合逆バイアス特性はＩｎＰ層で定めるも
のである。InP/InGaAsP APDs are being developed for the purpose of providing photodetectors suitable for this 1 μm band, but in this InP/InGaAsP APD,
In order to reduce the leakage 1lrfi that occurs when a reverse bias is applied to the pn junction for light reception, the pn junction is made of InGaA.
Established on top of the sP party absorption layer! It is usually formed within a layer of InP. That is, while the depletion layer from the pn junction is sufficiently expanded into the light absorption layer to obtain sensitivity to the required wavelength of received light, the pn junction reverse bias characteristics are determined by the InP layer.
（３） 従来技術と問題点
前記のＩｎ１９／ＩｎＧａＡｓＰ系ＡＰＤにおいては通
常ＩｎＰ基板に形成されたＩｎＧａＡ’ａＰ元吸収層上
のｎ−ＩｎＰ層内にｐ型不純物拡散領域を形成して前記
ｐｎ接合を形成している。そしてブレイク・ダウンをｐ
ｎ接合の中央部分で生じさせるために、ｐ１１１Ｉ合周
辺部分の耐電圧を高めるガードリングを設けること等に
関して種々の構造のＡＰＤが提案されている。(3) Prior art and problems In the above-mentioned In19/InGaAsP APD, a p-type impurity diffusion region is usually formed in the n-InP layer on the InGaA'aP original absorption layer formed on the InP substrate to form the p-n junction. is formed. And break down to p
APDs with various structures have been proposed, including the provision of a guard ring to increase the withstand voltage at the peripheral portion of the p111I junction in order to generate this at the central portion of the n-junction.
第１図社従来技術によるプレーす型ＡＰＤの一例を示す
断面図である０図において、ｌはＨ＋ −Ｉｎｐ基板、
２はｎ−ＩｎＰ／’ツファ層、３はｎ−ＩｎＧａＡｓＰ
党吸収層、４ｆｄｎ−ＩｎＰ増倍層、５は高抵抗ｎ−−
Ｉ ｎ ＰＡＬ ６はｐ十蓋不純物拡散領櫨、７は絶
ｍ１ｌｌ、 ８はｐｉｆ＋電極、９はｎ１ＩＩ電極″１
′ある。Figure 1 In Figure 0, which is a cross-sectional view showing an example of a plate type APD according to the prior art, l is an H + -Inp substrate;
2 is n-InP/'tufa layer, 3 is n-InGaAsP
Party absorption layer, 4fdn-InP multiplication layer, 5 is high resistance n--
I n PAL 6 is a p-type impurity diffusion area, 7 is a p1ll, 8 is a pif+ electrode, 9 is a n1II electrode''1
'be.
本例のＡＰＤにおいては、ＩｎＰ増倍層４をｎ型とし、
その上に高抵抗ｎ−型ＩｎＰ層５を形成いこのｎ−Ｉｎ
Ｐ層５内に、ｐ＋型領領域６ｎ−ＩｎＰ増倍層４との界
面に届く工うにイオン注入に１つて形成したものであっ
て、中央部分においてはｐ＋ Ｈの構成になっている
ためになだえ増倍を起し易く、周辺部分ではｐ＋ Ｈ
−の構成になっているためにブレイク・ダウンを起し離
くされている。In the APD of this example, the InP multiplication layer 4 is of n-type,
A high resistance n-type InP layer 5 is formed thereon.
In the P layer 5, one layer is formed by ion implantation to reach the interface with the p+ type region 6n-InP multiplication layer 4, and the central part has a p+ H configuration. It is easy to cause avalanche multiplication, and p + H in the peripheral area
- Because it has a configuration of -, it causes a breakdown and is separated.
しかしながら従来技術にＬる前記例のＡＰＤの製造方法
においては、不純物イオン注入後の熱処理の際に高抵抗
ｎ−−４ｎＰ層５０表面が変化して変成層１０が形成さ
れ、ＡＰＤ完成後逆バイアス電圧の印加ｉこよってこの
部分すなわち、絶縁膜７とｎ−−ＩｎＰ層５との界面に
ｎｐ反転層が形成され、受光部周辺の耐電圧が低下して
ガードリングの効果が害され、又は受光部以外に光感度
が出る結果となることがあった。However, in the conventional APD manufacturing method of the above example, the surface of the high-resistance n--4nP layer 50 changes during the heat treatment after impurity ion implantation to form a metamorphic layer 10, and after the APD is completed, the reverse bias As a result of the application of voltage, an np inversion layer is formed in this part, that is, at the interface between the insulating film 7 and the n--InP layer 5, and the withstand voltage around the light-receiving part decreases, impairing the effect of the guard ring, or This sometimes resulted in photosensitivity occurring in areas other than the light receiving area.
この変成層の形５ｙ、社熱処理の際にＩｎＰ層が雰囲気
にさらされることによって生ずるものであるが、ｎｐ反
転はｎ型ＩｎＰ層が高抵抗であるときに特に問題となる
。又この問題ｔ″ｔＡＰＤのみならず、ＰＤについても
同様である。This metamorphic layer type 5y occurs when the InP layer is exposed to the atmosphere during heat treatment, and np inversion becomes a particular problem when the n-type InP layer has high resistance. Moreover, the same problem applies not only to this problem t″tAPD but also to PD.
（４）発明の目的
本発明は、ｎ型Ｉｎｐ層へ不純物イオンを注入して熱処
理を行うことに↓す、ｐ十ｎ接合を形成するＩｎＰ／Ｉ
ｎＧａＡｓＰ系受光菓子に関して、逆バイアス印加の際
にｎｐ反転層が形成されない受光素子の製造方法を提供
することを目的とする。(4) Purpose of the Invention The present invention provides an InP/I that forms a p-n junction by implanting impurity ions into an n-type Inp layer and performing heat treatment.
An object of the present invention is to provide a method for manufacturing a light-receiving element in which an np inversion layer is not formed when applying a reverse bias with respect to an nGaAsP-based light-receiving confectionery.
（５）発明の構成
本発明の前記目的は、該ｎ型ＩｎＰ層上・ｃＩｎＧａＡ
ｍ層を設けて該不純物イオン注入及び該熱処理を行い、
しかるにＩｆ Ｉ ｎ Ｇ ａ Ａ ｓ層を除去するこ
と−こより達成される。(5) Structure of the Invention The object of the present invention is to
providing an m layer and performing the impurity ion implantation and the heat treatment,
However, this is achieved by removing the IfInGaAs layer.
（６）発明の実施例
以下に本発ｖＩを実施例にエリ図面を参照して具体的に
説明する。(6) Embodiments of the Invention The vI of the present invention will be specifically described below as an embodiment with reference to the drawings.
第２図（＆）及び（ｂ）は本発明のＡＰＤＩこついての
実施例を示す断面図であって、同一符号は同一対象部分
を示す、第２図（ａ）において、ｌｌはキク１フ丁８１
１１ ｘ １０ｕ ｃｍ −程度、厚さ３００７１ｍ程
度のｎ今−ＩｎＰｉｌｆ、】２はキャリア濃＄ Ｉ Ｘ
１０”ａｓ−” ｌ１ｌｆ１厚さ３μｍ程度のｎ
ＩｎＰ”ｙ７７層、１３はキャリア＠ｆｉｌ Ｉ Ｘ
１０” ｃｍ −” 程度、厚さ２ｓｍ＠度のｎ−Ｉｎ
ＧａＡｓＰ党吸収層、１４Ｆｉキャリア濃度ｌＸｌ０”
５１−”８度、厚さ１μｍ程度の１ｌ−ＩｎＰ増倍層、
１５はキャリア＠ｚｓｘｌｏ”ｙ＋−’１度以下、厚さ
２ｆｉｍ程度てＣｄドープにエリ補償された高抵抗ｎ−
−ＩｎＰ層、１６はキャリア濃度Ｉ Ｘ １０” ｃＭ
−’程度、厚さ１μｍ程度のアンドープｎ−ＩｎＧａＡ
ａ層、１７はＢ・イオン注入後熱処理を行って形成した
ｐ中領域である。FIGS. 2(&) and (b) are cross-sectional views showing an embodiment of the APDI according to the present invention, in which the same reference numerals indicate the same target parts. Ding 81
11 x 10 u cm - about 30,071 m thick, 2 is carrier concentration $ I
10"as-" l1lf1 n with a thickness of about 3 μm
InP”y77 layer, 13 is carrier @fil I
10"cm-" thick, 2sm@degree n-In
GaAsP absorption layer, 14Fi carrier concentration lXl0”
51-” 1l-InP multiplication layer with 8 degrees and a thickness of about 1 μm,
15 is a carrier @zsxlo"y+-' 1 degree or less, a thickness of about 2 fim, and a high resistance n- which is compensated for by Cd doping.
-InP layer, 16 is carrier concentration I x 10” cM
-' undoped n-InGaA with a thickness of about 1 μm
The a-layer 17 is a p-medium region formed by performing heat treatment after B ion implantation.
すなわち、本実施例においては、Ｈ−−ＩｎＰ層１層上
５上−ＩｎＧａＡｓ層１６を設けて、１５０Ｋｅｙ、５
Ｘ１０”ｃｍ−”程度のＢ＠イオン注入を行い、次いで
７５０℃、２０分８ｉ度の熱処理を行９て、ｎ７’ｍ
Ｉ ｎ Ｐ層１５とＨ−Ｉ ｎ Ｐ層１４との界面に届
くようにｐ中領域１７を形成している。That is, in this example, an InGaAs layer 16 is provided on the H--InP layer 1 layer 5, and 150 keys, 5
B@ ion implantation of approximately
The medium p region 17 is formed so as to reach the interface between the I n P layer 15 and the H-I n P layer 14 .
しかる後にＨＮＯ，：ＨＦ＝１ ： １のエツチング液
を用いて、前記ｎ−ＩｎＧａＡａ層１６を除去し、第２
図（ｂ）に示す如く、ｐ◆中領域７上にｐ側電極１８を
ＡｕＺｎ等にエリ、父、ｎ＋−ＩｎＰ基＠１１の裏面に
ｎ側電６１９をＡｕＧ・等により、絶縁膜２０を窒化シ
リコン等にエリ形成してＡＰＤが構成される。Thereafter, the n-InGaAa layer 16 is removed using an etching solution of HNO,:HF=1:1, and the second
As shown in Figure (b), a p-side electrode 18 is formed on the p◆ middle region 7 using AuZn, etc., and an n-side electrode 619 is formed on the back surface of the n+-InP group 11 using AuG, etc. to form an insulating film 20. An APD is constructed by forming an edge on silicon nitride or the like.
以上の製造方法によって得られた本実施例のＡＰＤ（７
）逆耐圧ＶＢは１００Ｖ、増倍率は約５０゜量子効率は
約５０％、暗電流はＶＢの９０−の電圧において１０乃
至２０ｎＡＴあり、また増倍率の面内分布は均一であっ
て、ｎｐ反転層の形成は蘭められず本発明の目的が達成
されている。APD of this example obtained by the above manufacturing method (7
) The reverse breakdown voltage VB is 100V, the multiplication factor is about 50°, the quantum efficiency is about 50%, the dark current is 10 to 20 nAT at a voltage of 90-VB, and the in-plane distribution of the multiplication factor is uniform, making it an np inversion. The purpose of the present invention is achieved without compromising the formation of layers.
本実施例のＩｎＧａＡｓ層１６はｎ−−ＩｎＰ層１層上
５上ピタキシャル成長法によって形成させたものである
が、ＩｎＰに格子整合したＩｎＧａＡｓとすることによ
りｎ−−ＩｎＰ層１層管５置する選択エツチングが容易
となり、又、エピタキシャル成長層に歪を及ｔ”ｌ’Ｌ
或いは有害な不純物を混入する危険を避けることができ
る。The InGaAs layer 16 of this example was formed by the pitaxial growth method on the n--InP layer 1, but by using InGaAs lattice-matched to InP, This makes selective etching easier, and also reduces strain on the epitaxially grown layer.
Alternatively, the risk of contamination with harmful impurities can be avoided.
（７ン 発明の効果
本発明はｎ ｍ Ｉ ｎ Ｐ層へ不純物イオンを注入し
て熱処理を行うことにエリｐ ＋ ｎ接合を形成するＩ
ｎ Ｐ ／ Ｉ ｎ Ｇ ａ Ａ ｓ Ｐ系受光累子
の製造方法において、＃ｎ！１ＩｎＰ層上ｊｃＩｎＧａ
Ａｓ層を設けて該不純物イオン注入及び核熱処理を行い
、然る後に該ＩｎＧａＡｓ層を除去することｌこよりｎ
ｐ反転層の形成が排除された受光素子を製造すＪＩ：ｙ
Ｉ法を提供するものであって、！μｍμｍ光受光素子訃
向上に大きい効果を有する。(7) Effects of the Invention The present invention is characterized by implanting impurity ions into the nm I n P layer and performing heat treatment to form an ELIP + n junction.
#n! jcInGa on 1InP layer
By providing an As layer, performing the impurity ion implantation and nuclear heat treatment, and then removing the InGaAs layer.
JI:y that manufactures a light receiving element that eliminates the formation of a p-inversion layer
It provides the I-method, and! It has a great effect on improving the performance of μmμm light receiving elements.
第１図は従来技術によるＩｎＰ／ＩｎＧａＡｓＰ系ＡＰ
Ｄの断面図、第２図（ａ）及び（ｂ）ｔ′ｉ本発明の実
施例を示すＡＰＤの断面図である。
図において、１１１ ｎ” Ｉ ｎ Ｐ基板、２ｒｉ
ｎ−ＩｎＰバッファ層、３はｎｗＩｎＧａＡｓＰ元吸収
層、４はｎ−ＩｎＰ増倍層、５は尚抵抗ｎ−−ＩｎＰ７
ｍ、６はｐ中型不純物イオン注入領域、７は絶縁膜、８
はｐ側電極、９はｎ側電極、ｌＯは変成層、１１Ｊ：ｎ
”−ＩｎＰ基板、 １２ｔｌｎ’４ｎＰバッファ層、ｌ
３ｒｉｎ−ＩｎＧｉＡｓＰ元吸収層、１４はｎ−Ｉｎ
Ｐｎ倍増、１５はＴｈａ抗ｎ −−Ｉ ｎ Ｐ層、］
］６Ｕｎ−ＩｎＧａＡａ層１７はｐ中領域、１８はｐ＠
電極、１９はｎ１ｌｌｌ［ｉｋ、２０は絶縁膜を示す・Figure 1 shows a conventional InP/InGaAsP AP.
FIGS. 2A and 2B are sectional views of an APD showing an embodiment of the present invention. In the figure, 111 n” I n P substrate, 2ri
n-InP buffer layer, 3 is nwInGaAsP original absorption layer, 4 is n-InP multiplication layer, 5 is resistor n--InP7
m, 6 is a p medium impurity ion implantation region, 7 is an insulating film, 8
is the p-side electrode, 9 is the n-side electrode, IO is the metamorphic layer, 11J:n
”-InP substrate, 12tln'4nP buffer layer, l
3rin-InGiAsP original absorption layer, 14 is n-In
Pn doubled, 15 is Tha anti-n --I n P layer,]
]6Un-InGaAa layer 17 is a p medium region, 18 is a p@
electrode, 19 is n1llll[ik, 20 is an insulating film]
Claims (1)
理を行うことにエリｐ” ｎ ４＃合を形成するＩｎＰ
／ＩｎＧａＡｓＰ系半導体受ｆｔ、素子の製造方法にシ
いて、該ｎ聾ＩｎＰ層上にＩｎＧａＡｓ層を設けて該不
純物イオン注入及び該熱処理を行い、しかる後に＃Ｉｎ
ＧａＡ＠層を除去することを特徴とする牛導体受元素子
の製造方法。n l! By implanting impurity ions into the InP layer and performing heat treatment, it is possible to form an ellip'' n 4# bond.
/InGaAsP based semiconductor device, according to the device manufacturing method, an InGaAs layer is provided on the n-deaf InP layer, the impurity ion implantation and the heat treatment are performed, and then #In
A method for manufacturing a conductor receiving element characterized by removing a GaA@ layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56190355A JPS5892283A (en) | 1981-11-27 | 1981-11-27 | Manufacture of semiconductor light receiving element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56190355A JPS5892283A (en) | 1981-11-27 | 1981-11-27 | Manufacture of semiconductor light receiving element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5892283A true JPS5892283A (en) | 1983-06-01 |
Family
ID=16256807
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56190355A Pending JPS5892283A (en) | 1981-11-27 | 1981-11-27 | Manufacture of semiconductor light receiving element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5892283A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5183772A (en) * | 1975-01-20 | 1976-07-22 | Matsushita Electronics Corp | |
| JPS5642385A (en) * | 1979-09-12 | 1981-04-20 | Nec Corp | Hetero-structure semiconductor device |
| JPS5854685A (en) * | 1981-09-28 | 1983-03-31 | Kokusai Denshin Denwa Co Ltd <Kdd> | Avalanche photodiode and manufacture thereof |
-
1981
- 1981-11-27 JP JP56190355A patent/JPS5892283A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5183772A (en) * | 1975-01-20 | 1976-07-22 | Matsushita Electronics Corp | |
| JPS5642385A (en) * | 1979-09-12 | 1981-04-20 | Nec Corp | Hetero-structure semiconductor device |
| JPS5854685A (en) * | 1981-09-28 | 1983-03-31 | Kokusai Denshin Denwa Co Ltd <Kdd> | Avalanche photodiode and manufacture thereof |
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