JPS5894093A - Fire alarm tester - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a fire alarm test device for testing the operation of a fire receiver.

The fire receiver wires multiple alarm wires to each warning area, connects them to each alarm S, and operates a district relay (district circuit) when the nine fire detectors operate, and detects a fire by a slight delay from the operation of the district relay. The relay is activated to generate a fire signal.

In order to check the normal operation of the fire receiver, conventionally, each alarm wire is grounded in sequence using a rotary switch or the like to check the operation of the district relay and the fire relay. Therefore, the disadvantage is that the ninth stage of the test requires a lot of effort and time. In recent years, as buildings have become larger, the number of warning wires has tended to increase, further exacerbating the above-mentioned drawbacks.

The purpose of the present invention is to solve the above-mentioned conventional drawbacks, to automatically check a fire receiver to which a large number of alarm wires are connected, thereby ensuring accurate fire alarms, and to provide the same at a low price. Our goal is to provide a fire alarm testing device that can.

The test device of the present invention is a fire receiver that connects a fire detector, inputs nine alarm lines, and outputs an alarm signal from the district circuit corresponding to the alarm line to which the activated detector belongs.
The district circuit has a self-holding function, and includes a test voltage sequential supply circuit that divides the alarm wire into a plurality of groups and sequentially supplies a test voltage to each group, and a district circuit that corresponds to one group of the alarm wires. an NAND circuit that inputs alarm signals and fire signals; a check scanning circuit that sequentially scans the output of the NAND circuit; a test mode that sends test voltages to each group of the alarm wires; and an output of the NAND circuit. a mode switching circuit for switching between a check mode and a check mode; a pulse oscillator for operating the mode switching circuit;
and a dart for supplying the output pulse of the f pulse oscillator to the mode switching circuit, and the dart is closed when the output check of the NAND circuit is found to be defective.

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing an example of the relevant parts of a fire receiver to which the present invention is applied.
S-Rn z light emitting diode RED 1~RED n
Voltage is supplied to the alarm lines L1 to Lm via the e-diodes DI-Dn. For example, when a fire detector (not shown) connected to the alarm line L1 is activated, the alarm line L1 becomes low potential and the transistor T1 is turned on.) The input of the AND circuit ANDIO-1000 is set to a high level. . A high level is always input to the input m1 of the AND circuit NDI, and when the restoration signal B is input, only 9 and Kabu become low level. Therefore, when the transistor T1 is turned on, the output of the AND circuit NDI becomes high level and outputs the alarm signal D1, and the output of the inverter INVI is made low level, thereby continuously maintaining the on state of the transistor T1.

In other words, it has a self-holding function. The nuclear self-holding function is canceled by recovery signal B. The above transistor 1. AND circuit AND1. Inverter IN1 etc. are district circuits provided corresponding to each alarm line. On the other hand, when the transistor T1 is turned on, the transistor TF is turned on to output a fire signal A (low level), and a fire signal A/ (high level) is outputted via the inverter. In addition, @C1xCn, which causes the light emitting diode RE D 1' to emit light, is a test terminal. For example, when a test voltage (low rail) is applied to C1, the transistor 〒1 is turned on instead of operating the fire detector, and the fire receiver is activated. The operation of the corresponding district circuit can be tested.

FIG. 2 is a circuit diagram showing one embodiment of the present invention. In this embodiment, the test terminals C1 to Cm are divided into groups of five, and a test voltage (low level) is applied all at once to Cl-05, for example. If the fire receiver operates normally by applying the test voltage, the alarm signals D1 to D5 will not be at a high level, and the fire signal A' will be I.
The output of the AND circuit NDI becomes low level. If one of the district circuits does not operate, one of D1 to D5
Since the signal is at a low level, the output of the NAND circuit NDI becomes a high level, allowing detection of a malfunction in the fire receiver. Similarly, NAND circuit N for test terminals C6 to CIG
Malfunctions are discovered by the output of D2. The same applies to CI1 to CB.

The above test is conducted with the following configuration and operation.

When the E test switch S1 (non-lock switch) is pressed, the transistor Q4 is turned on, power is supplied to the fire test equipment, and the test starts, and the high level output from the transistor Q4 turns on the transistor Q3. As a result, the on state of transistor Q4 is self-maintained. - When a fire signal (low level) is input during the test, the output of the OR circuit OR3 becomes low level at the time of a recovery signal to be described later, triggering the monostable multivibrator 1 and turning on the transistor Q2. As a result, the transistors Q3 and C4 are turned off and the supply of test power is stopped. Therefore, the bottle test was canceled and the fire was prioritized.

By turning on the transistor Q4, power is supplied to the test apparatus, and the pulse oscillator 2 outputs a pulse train. The initial values of counters 3 and 4 are both 10m, and when the output of counter 3 counts up ``11'' via the SAND circuit 12, the output of NOR circuit NR2 becomes high level, and the counter 100 is counted up. The punt value is '
It becomes OO1' and is decoded by the decoder 11. Since the output of counter 3 is now 100#, the output of OR circuit 012 is low level and decoder 11 is in operation), decodes the output value of counter 10 and outputs high level to the first terminal. The chip select terminal of the decoder 5 is set to a low level via an inverter.

Therefore, the decoder 5 decodes the output of the counter 4, sets the first terminal to 71, and applies test voltages (low level) to the test terminals C8 to C1K. If the fire receiver operates normally, the alarm signals D1 to D5 and the fire signal are at a high level, and the output of the NAND circuit NDI is at a 4-level. When the count value of the counter 3 mentioned above is "00m",
This is test voltage sending mode.

Next, the output pulse of pulse oscillator 2 is N0II"-FN
When the first Δ pulse is inverted through RI and input to the counter 3, the counter 3 outputs 01'' and the left terminal becomes high level, stopping the sending of the test voltage.However,
Due to the self-holding function of the district circuit of the fire receiver, the alarm signal DI, 05 and the fire signal A' remain at high level, so the output of the NAND circuit NDI remains at the do- level. The same holds true when the output of the counter 3 reaches 1101.

! The output of the selector 6, which is the other input of
Therefore, the output of the AND circuit 7 is at a low level. If even one of the alarm signals D (high level) is insufficient due to malfunction of the fire receiver, the NAND
When the output of the circuit NDI becomes high level, the other input of the AND circuit 7 also becomes high level through the selector 6, and the output of the AND circuit 7 becomes high level, resulting in a NOR signal.

Since the output of NRI is fixed at a low level, the pulse count cannot be advanced, ie, malfunction can be checked. When the output value of the counter 30 is @10", it is the check mode. If the fire receiver is operating normally, the counter 3 will continue counting, and the count value will become 11", and the output of the counter 3 will be @11H. When this happens, the output of AND circuit 12 is at a high level, and inverter 1
The counter 3 is reset at the same time as the output of the counter 3 is set to low level and the recovery signal B is sent. The self-holding function of the fire distribution circuit of the fire receiver is canceled by the recovery signal BK.

In this embodiment, the counter 3#OR circuit OR2 and the AND circuit 9 constitute a mode switching circuit.゛On the other hand, due to the output of the AND circuit 12, the count value of the counter 40 becomes -OO1=, and the decoder 5 outputs the test terminals 06~
A test voltage is sent to the CIO and the operation of the fire receiver is checked in the same manner as above. The count of the counter 4 progresses, and when the count value becomes -000= again, the output of the NOR circuit NR2 becomes high level, and the counter 10 counts 1.
Based on the output of the decoder 11, the r code 5' and the selector σ are selected this time. Similarly, each test terminal has 5
Successive test voltages are sent to each group of lines and the operation of the receiver in each case is checked.

In other words, each time the output of counter 3 becomes @11'', the count of counter 4 is incremented, and each time the output value of counter 4 appears as @o o o'', the count of counter 100 is incremented. It is possible to sequentially check five alarm lines as a group. A test voltage is sent to a group of test terminals in the test voltage sending mode when the output value of counter 3 is @GO', and checked in the check mode when the output value is @10''.If the check result is good, The output value of counter 3 is 11 to switch to the next group of 5 lines.0 In this embodiment, counter 4, 1 G5P5
- 11, 5, 5' and the NOR circuit NR2f constitute a test voltage sequential supply circuit, and a check scanning circuit is constituted by the z-Vactor 6, 6', the counters 4, 1G, the counter 4, etc. .

If the check result is unnecessary, the output of the AND circuit 7 becomes high level (jl), and the counter 3 stops advancing by inputting a high level to the input of the Noli circuit NRI. When the counter 3 stops advancing, if you want to continue the test, turn on the transistor Ql by pressing the sidewalk switch 82 (non-lock).
The count can be advanced by setting the input of the OR circuit NRI to a low level.

Note that when an actual fire occurs during the test operation, the fire signal A becomes low level, so when the recovery signal B appears on the low pel, the output of the OR circuit OR3 becomes p- level, and the monostable The multivibrator l is activated and outputs an arm pulse. The l* pulse causes transistor Q2
is turned on, transistors Q3 and Q4 are turned off, power supply to the fire alarm test device is stopped, and the fire is handled as if it were a fire.

As described above, in the present invention, a large number of alarm wires are divided into a plurality of groups, and a test voltage is supplied to each group at once to check the operation of the corresponding district circuit. Therefore, it is possible to check a large number of district circuits with a relatively small number of tests.

With this in mind, the system was configured to send out the test voltage in the test voltage sending mode and check it in the check mode, so it is possible to check the self-holding function of the district circuit as well. When the operation is good, each group is automatically sequentially scanned and tested, eliminating the need for checking.

Note that a rotary switch or the like is not required for checking, and it can be provided at low cost.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an example of a fire receiver to which the present invention is applied, and FIG. 2 is a circuit diagram showing an embodiment of the present invention. In the figure, 1- monostable multivibrator, 2-
Ridalus oscillator, 3, 4, 10. -Counter, 5, 5
', 11... Degoda, 6.6'... Selector,
7゜9.12・-AND circuit, 13-・Inverter, A
ND1~muNDn=AND circuit, ND1~N
Dn-NAND circuit, OR2, 0R3-77 circuit, NRI, NR2-NOR circuit, Ql~Q4. T.I. T F ---) 5 y di xp, 81 m 82-・
・Switch, mu. A'...Fire signal, B-Recovery! No., 01~Cn- test voltage supply terminal, 01~0m- alarm signal, Ll~L1...
・Alarm wire, 01~0m-diode, R1~' *
aR'1~R' *=Resistance, RE D
w, -Emission 1 ion, INV ear--Inverter. Applicant Nittan Co., Ltd. Representative Patent Attorney Sumi 1) Toshimune (and 2 others)

Claims (1)

[Claims] In a fire receiver that inputs a large number of alarm wires connected to large plate detectors and outputs an alarm signal from a district circuit corresponding to the alarm wire to which the activated sensor belongs, the district circuit has a self-holding function. , a test voltage sequential supply circuit that divides the alarm wire into a plurality of groups and sequentially supplies a test voltage to each group, and inputs an alarm signal and a fire signal of the district circuit corresponding to m- of the alarm wire. A check scanning circuit that sequentially scans the output of the NAND circuit, a test mode that sends a test voltage to each group of the alarm wires, and a check mode that checks the output of the NAND circuit. The output check of the NAND circuit is defective. 1. A fire alarm testing device characterized by closing a cocoon.