JPS5896518U - Exposure control/brightness verification circuit for electric shutters - Google Patents
Exposure control/brightness verification circuit for electric shuttersInfo
- Publication number
- JPS5896518U JPS5896518U JP19240181U JP19240181U JPS5896518U JP S5896518 U JPS5896518 U JP S5896518U JP 19240181 U JP19240181 U JP 19240181U JP 19240181 U JP19240181 U JP 19240181U JP S5896518 U JPS5896518 U JP S5896518U
- Authority
- JP
- Japan
- Prior art keywords
- exposure control
- reference voltage
- capacitor
- brightness
- comparator circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
- Exposure Control For Cameras (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の一実施例を示した回路図、第２図は変
換値Ｇの計算数値の図表である。
Ｒ□・・・・・・光導電素子、Ｒ２・・・・・・比較抵
抗、Ｃ・・・・・・コンデンサ、Ｔ□、Ｔ２・・・・・
・トランジスタ、Ｒ３・・・・・・ポテンショメータ、
ＣＰ□、ＣＦ２・・・・・・コンパレータ回路、ＯＰ・
・・・・・演算増幅回路、Ｒ１・・・・・・入力抵抗、
Ｒ５−・・・・・帰還抵抗。FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a chart of calculated numerical values of the conversion value G. R□...Photoconductive element, R2...Comparative resistance, C...Capacitor, T□, T2...
・Transistor, R3... Potentiometer,
CP□, CF2...Comparator circuit, OP・
...Operation amplifier circuit, R1...Input resistance,
R5-...Feedback resistance.
Claims (1)
Ｃとをその順に直列接続し、また比較抵抗Ｒ２と並列に
輝度検定モードでは遮断し露光制御モードでは導通せし
められる第一の半導体スイッチ（トランジスタＴｔ）を
接続すると共に、コンデンサＣと並列に輝度検定モード
では導通し露光側゛゛ 御モードでは遮断せしめら
れる第二の半導体スイッチ（トランジスタＴ２）を接続
し、更に光導電素子Ｒ１とコンデンサＣの接続点の積分
電位を比較する第一のコンパレータ回路ＣＰ□の基準電
圧を、光導電素子Ｒ１の輝度−抵抗特性における低輝度
域のバラツキを補償するために調整可能な電源電圧Ｖｃ
ｃを分圧するポテンショメータＲ３により与え、一方比
較抵抗Ｒ２と光導電素子Ｒ□の接続点の電圧を比較する
第二のコンパレータ回路ＣＰ２の基準電圧示、第一のコ
ンパレータ回路ＣＰ、の基準電圧の設定中心値Ｖｒｅｆ
ｏに設定され入力電圧が前記ポテンショメータＲ３によ
る分圧電圧によって与えられる反転増幅回路（演算増幅
回路ｏｐ）を介して該基準電圧（設定中心値：Ｖｒｅｆ
ｏ）からの差を負の所定の倍率で与えるようにしたこと
を特徴とする電気シャッタにおける露光制御・輝度検定
回路。A comparison resistor R2 for luminance verification, a photoelectric element R1, and a capacitor C are connected in series in that order, and a first semiconductor switch (transistor Tt ) is connected in parallel with the capacitor C, and a second semiconductor switch (transistor T2) is connected in parallel with the capacitor C, which is conductive in the brightness test mode and cut off in the exposure control mode. The reference voltage of the first comparator circuit CP□, which compares the integrated potential of
Setting the reference voltage of the first comparator circuit CP and the reference voltage of the second comparator circuit CP2 which compares the voltage at the connection point between the comparison resistor R2 and the photoconductive element R□, which is given by the potentiometer R3 that divides the voltage c. Center value Vref
The reference voltage (setting center value: Vref
1. An exposure control/luminance verification circuit for an electric shutter, characterized in that the difference from (o) is given by a predetermined negative magnification.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19240181U JPS5896518U (en) | 1981-12-23 | 1981-12-23 | Exposure control/brightness verification circuit for electric shutters |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19240181U JPS5896518U (en) | 1981-12-23 | 1981-12-23 | Exposure control/brightness verification circuit for electric shutters |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5896518U true JPS5896518U (en) | 1983-06-30 |
| JPH0132027Y2 JPH0132027Y2 (en) | 1989-10-02 |
Family
ID=30105814
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19240181U Granted JPS5896518U (en) | 1981-12-23 | 1981-12-23 | Exposure control/brightness verification circuit for electric shutters |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5896518U (en) |
-
1981
- 1981-12-23 JP JP19240181U patent/JPS5896518U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0132027Y2 (en) | 1989-10-02 |
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