JPS5910013A - Gain control circuit - Google Patents

Gain control circuit

Info

Publication number
JPS5910013A
JPS5910013A JP11794182A JP11794182A JPS5910013A JP S5910013 A JPS5910013 A JP S5910013A JP 11794182 A JP11794182 A JP 11794182A JP 11794182 A JP11794182 A JP 11794182A JP S5910013 A JPS5910013 A JP S5910013A
Authority
JP
Japan
Prior art keywords
current
circuit
control
gain
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11794182A
Other languages
Japanese (ja)
Inventor
Kuniaki Goto
後藤 邦章
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP11794182A priority Critical patent/JPS5910013A/en
Publication of JPS5910013A publication Critical patent/JPS5910013A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G1/00Details of arrangements for controlling amplification
    • H03G1/0005Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0035Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements
    • H03G1/0052Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements using diodes

Landscapes

  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To ensure an optional and independent control for each differential amplifying circuit, by providing a variable current circuit in addition to a constant current circuit to each differential amplifying circuit to control the gain of each of these amplifying circuits. CONSTITUTION:An input signal ei added with a base bias V1 is applied to a differential amplifying circuit. A constant current decided by a fixed bias V2 is supplied to diodes D1 and D2 via transistors Q1 and Q2. The signal ei is amplified by the differential amplifying circuit and undergoes a current-voltage conversion by the diodes D1 and D2 to be outputted as an output Vout by TRQ7 and TRQ8. The gain of the differential amplifying circuit can be controlled by controlling the current flowing to the D1 and D2 since the current-voltage conversions of D1 and D2 have different gains due to their current values. This current control is carried out by a variable current circuit consisting of current control transistors Q4, Q5 and Q6. This variable current circuit applies the control signal voltage to a base bias V3 or V4 to control the current.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、差動構成された一対のトランジスタの負荷に
それぞれダイオードを接続して、このダイメートに流t
する電流を変化させることに上り差動増幅回路の利得を
制御する利得制御回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a pair of transistors having a differential configuration, each of which has a diode connected to its load, and a current flowing through the dimate.
The present invention relates to a gain control circuit that controls the gain of a differential amplifier circuit by changing the current flowing through the differential amplifier circuit.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

従来の差動増幅回路の利得制御回路を第1図に示す。差
動増幅回路を構成しているトランジスタQ、/、Q、2
のコレクタには負荷としてそれぞれダイオードD、、D
2が順方向に接続され、エミッタ端子にはエミyり抵抗
R5,Ft4tが接続されている。トランジスタQ3お
よびエミッタ抵抗P。
FIG. 1 shows a gain control circuit of a conventional differential amplifier circuit. Transistors Q,/, Q,2 forming a differential amplifier circuit
diodes D, ,D are installed as loads on the collectors of
2 is connected in the forward direction, and emitter resistors R5 and Ft4t are connected to the emitter terminal. Transistor Q3 and emitter resistor P.

け定電流源を構成し、このトランジスタQ、のコレクタ
・エミッタ間を流れる定電流は制御信号電圧e。によっ
て制御される。この差動増幅回路の利1% i−tダイ
オードD、、D、!に流れる電流値により、ダイオード
D7.D、2の電流−電圧特性に従い変化することとな
る。したがってトランジスタQ、を流れる定電流値を変
化させることにより、この差動増幅回路の利得を制御す
ることができる。
The constant current flowing between the collector and emitter of this transistor Q constitutes a constant current source, and the constant current flowing between the collector and emitter of this transistor Q is equal to the control signal voltage e. controlled by The profit of this differential amplifier circuit is 1% i-t diode D,,D,! Depending on the current value flowing through diode D7. It will change according to the current-voltage characteristics of D and 2. Therefore, by changing the value of the constant current flowing through transistor Q, the gain of this differential amplifier circuit can be controlled.

しかし、この従来の利得制御回路では、トランジスタQ
3とエミッタ抵抗R,とで構成される定1[イ、流源の
電流11^自体を変化させで、ダイオードD、、D、2
の電1流値を制御することとしているため、このトラン
ジスタQ、とエミッタ抵抗n、とで構成される定電流源
が、複数の差動増幅回路の定直流源として用いられてい
るときは各りの差動増幅回路毎に利得制御することがで
きかい欠点があった。
However, in this conventional gain control circuit, the transistor Q
3 and an emitter resistance R, by changing the current source current 11^ itself, the diode D, , D, 2
Therefore, when the constant current source composed of the transistor Q and the emitter resistor n is used as a constant DC source for multiple differential amplifier circuits, each The drawback was that it was difficult to control the gain for each differential amplifier circuit.

〔発明の目的〕[Purpose of the invention]

本発明は上記事情を考慮してなされたもので、差動増幅
回路毎に制御することができる差動増幅回路の利得制御
回路を提供することを目的とする。
The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a gain control circuit for a differential amplifier circuit that can control each differential amplifier circuit.

〔発明の植装〕[Inplantation of invention]

この目的を達成するために、本発明の利得制御回路は、
コレクタ端子を、差動構成された/対のトランジスタと
その負荷であるダイオードとの接続点にそれぞれ接続し
、ベース端子を共通接続した/対の菫、流制御トランジ
スタを備え、この電流制御トランジスタのペース端子電
圧を変化することにより、前記ダイオードに流れ石電流
を制御することを特徴とする。
To achieve this objective, the gain control circuit of the present invention includes:
A current control transistor is provided, the collector terminals of which are connected to the connection points of a differentially configured pair of transistors and a diode as their load, and a pair of current control transistors whose base terminals are commonly connected. The present invention is characterized in that a flow current in the diode is controlled by changing the pace terminal voltage.

本発明の一実施例にょる差動」ν1幅回路の利得1.)
]61111回を第2図に示す。従来例と同様((トラ
ンジスタQ、、、Q、2は差動増幅回路を構成[7、負
荷にr1タイ]−ドD  、D、がそれぞれ接続され、
笠/ たエミッタ抵抗E J 、 R、が接続されている。ト
ランジスタQ、とエミッタ抵抗R,としJ一定11L流
源を構成し、差動増幅回路へ定電流を供給する。本実施
例ではこれに加え、電流制御トランジスタC:、 4t
、 (→、オ、Q、6を設け、それぞれのダイオードD
、、I)、り環流11vを制御する可変71:流回路を
横Iノ(シている。トランジスタQ7.C1,,l’ま
出カvoutノハノファであり、抵抗F −y 、 E
 、!−がエミッタlJjに接続されている。
The gain of the differential "ν1 width circuit according to an embodiment of the present invention is 1. )
]61111 times are shown in Figure 2. Similar to the conventional example ((transistors Q, , Q, 2 constitute a differential amplifier circuit [7, r1 tie to load]-domains D, D, are connected respectively,
Emitter resistors E J and R are connected to the cap. The transistor Q and the emitter resistor R form a constant 11L current source and supply a constant current to the differential amplifier circuit. In addition to this, in this embodiment, a current control transistor C:, 4t
, (→, O, Q, 6 are provided, and each diode D
,,I), variable 71 to control the circulation 11v: the current circuit is horizontally connected to the transistor Q7.
,! - is connected to emitter lJj.

次に本実施例の動作を説明する。差動増幅回路にl’J
: v 、なるベースバイアスが加わったθ1なる入力
信号が加わる。トランジスタQ、、、Q、2のエミッタ
抵抗F3.只4tけトランジスタQ、のコレクタに接続
されているため、固定バイアスV、2により定寸る定電
流が、トランジスタQl、Q、2@介してターイオード
D、、D、2に供給される。入力信号eiはこの差動増
幅回路で、増幅され、ぞの出力目−ダイオードD  、
D 、2にてW、流−市、FE変換さ/ を王、史にバッファであるトランジスタQ7”J’によ
り出力V。U、として出力される。ダイオードD  、
D、2の市1流−電圧変換は、その電流−電圧特性によ
り電流値により利得を異にするため、ダイオードD  
、D、2に流れる電流を制御すれば差/ 動増幅回路の利得を制御することができる。この電流の
制御をおこなうのが電流制御トランジスタq、ヶ’Qj
”Jにより構成される可変!、流回路である。環流制御
トランジスタQ、、、Qよには共通したベースバイアス
■ヨが加わり、この電流側温1トランジスタQ、’ Q
、tのエミyり全共通にしコレクタが接続された電流制
町トランジスタQ、 4にはベースバイアスv7が加わ
っている。側温1信号N1圧が高い場合はベースバイア
スv3に加え電f)1εを制御し、制御信号−,圧が低
い場合にはベースバイアスv7に加え電流を制御す゛る
Next, the operation of this embodiment will be explained. l'J in the differential amplifier circuit
: An input signal θ1 with a base bias of v is added. Emitter resistance F3 of transistor Q, , Q,2. Since it is connected to the collector of only 4t transistor Q, a constant current regulated by a fixed bias V,2 is supplied to the third diodes D, ,D,2 via transistors Ql,Q,2@. The input signal ei is amplified by this differential amplifier circuit, and the output signal - diode D,
D is converted into FE at W, 2, and is output as an output V.U by transistor Q7"J', which is a buffer. Diode D,
D, 2's first current-voltage conversion has a diode D because the gain differs depending on the current value due to its current-voltage characteristics.
, D, 2, the gain of the differential/dynamic amplifier circuit can be controlled. Current control transistors q and q'Qj control this current.
It is a variable current circuit composed of J.A common base bias ■Y is added to the freewheeling control transistors Q,...,Q, and this current side temperature 1 transistor Q, 'Q
A base bias v7 is applied to the current controlling transistor Q4 whose collector is connected to all the emitters of the transistors Q and T in common. When the side temperature 1 signal N1 pressure is high, the base bias v3 and the electric current f)1ε are controlled, and when the control signal - and the pressure are low, the base bias v7 and the current are controlled.

このように、本実施例によれば、定電流回路とは別に可
変電流回路を設け、負荷ダイメートの電流値を制御する
こととしているため、定電、流源共通の複数の差動増幅
回路(図示ゼず)の利得を各六制御することができる。
As described above, according to this embodiment, a variable current circuit is provided separately from the constant current circuit to control the current value of the load dimate, so that multiple differential amplifier circuits ( It is possible to control the gain of each of the six (not shown).

第1の実施例では3つの電流制御トランジスタで可変I
L流回路を構成していたが、第3図に示すように!つの
゛電流制省(1トランジスタQ、、 、 Q、とエミッ
タ抵抗丘2.丘、。で構成してもよい。高い制御信号電
圧に対して用いることかできる。甘たl・ンンジスタQ
3を用いず単に抵抗のみによってi′に流、源を41・
1成してもよい。更にトランジスタにp n p型を用
いても同様な利?W nil、l 141回路を構成で
きる。
In the first embodiment, three current control transistors are used to make the variable I
An L-flow circuit was constructed, as shown in Figure 3! It may be configured with two current control transistors (1 transistor Q, , , Q, and 2 emitter resistors). It can be used for high control signal voltages.
3 is not used, the current flows to i′ simply by resistance, and the source is 41・
You can make one. Furthermore, can similar benefits be obtained by using p n p type transistors? W nil,l 141 circuits can be constructed.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、各差動増幅回路
に各々、ぞの定電流回路とは別個に、可変…流回路を設
り、その利得を割部1するようにしているため、各々の
差動増幅回路を独立に、かつ、任意の制御を行なうこと
ができる。
As explained above, according to the present invention, each differential amplifier circuit is provided with a variable current circuit separately from its respective constant current circuit, and the gain thereof is divided by 1. , each differential amplifier circuit can be independently and arbitrarily controlled.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従才の利得tli制御回路の回路図、第3図に
+発明の一実施例による利得制御14+回路の回路図。 第3図は本発明の他の実施例による利得制御回路の回路
図である。 R/IR+2.R31R4t、Rj、R乙、R7゜B、
i” ” 9 ’ R10”抵抗、Q/”2”3’Q 
、−、Q、 、・・・トランジスタ、Q、ヶ、Q、、Q
、g・・・電流制御トランジスタ、D、、D、・・・ダ
イオード、θ1・・・入力信号、■7.■、!、■3.
v4t ベースバイアス。 出ルf1人代理人  猪  股     湾部1 図 l      VcC
FIG. 1 is a circuit diagram of a dependent gain tli control circuit, and FIG. 3 is a circuit diagram of a gain control 14+ circuit according to an embodiment of the invention. FIG. 3 is a circuit diagram of a gain control circuit according to another embodiment of the present invention. R/IR+2. R31R4t, Rj, Rot, R7゜B,
i""9'R10"resistance,Q/"2"3'Q
,-,Q, ,...transistor, Q, ga, Q,,Q
, g... Current control transistor, D, , D,... Diode, θ1... Input signal, ■7. ■、! , ■3.
v4t base bias. Deru f1 agent boar crotch bay part 1 Figure l VcC

Claims (1)

【特許請求の範囲】 差動構成された一対のトランジスタの負荷としてそれぞ
れダイオードを接続して、このダイオードに流れる菫1
流を変化させることにより差動増幅回路の利得を制御す
る利得制御回路において、コレクタ端子を、前記トラン
ジスタと前記ダイオードとの接続点にそれぞれ接続し、
ベース端子を共通接続した一対の電流制御トランジスタ
を備え。 これらの電流制御トランジスタのベース端子電圧を変化
することにより、前記ダイオードに流れる電流を制御す
ることを特徴とする利得制御回路。
[Claims] Diodes are connected as loads for a pair of differentially configured transistors, and violet 1 flows through the diodes.
In a gain control circuit that controls the gain of a differential amplifier circuit by changing the current, a collector terminal is connected to a connection point between the transistor and the diode, respectively,
Equipped with a pair of current control transistors whose base terminals are commonly connected. A gain control circuit characterized in that the current flowing through the diode is controlled by changing the base terminal voltage of these current control transistors.
JP11794182A 1982-07-07 1982-07-07 Gain control circuit Pending JPS5910013A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11794182A JPS5910013A (en) 1982-07-07 1982-07-07 Gain control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11794182A JPS5910013A (en) 1982-07-07 1982-07-07 Gain control circuit

Publications (1)

Publication Number Publication Date
JPS5910013A true JPS5910013A (en) 1984-01-19

Family

ID=14724007

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11794182A Pending JPS5910013A (en) 1982-07-07 1982-07-07 Gain control circuit

Country Status (1)

Country Link
JP (1) JPS5910013A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6266538A (en) * 1985-09-19 1987-03-26 Sony Tektronix Corp Shadow mask type cathode-ray tube
JPS62272710A (en) * 1986-05-21 1987-11-26 Mitsubishi Electric Corp Control amplifier

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6266538A (en) * 1985-09-19 1987-03-26 Sony Tektronix Corp Shadow mask type cathode-ray tube
JPS62272710A (en) * 1986-05-21 1987-11-26 Mitsubishi Electric Corp Control amplifier

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