JPS59125834U - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS59125834U
JPS59125834U JP1983018340U JP1834083U JPS59125834U JP S59125834 U JPS59125834 U JP S59125834U JP 1983018340 U JP1983018340 U JP 1983018340U JP 1834083 U JP1834083 U JP 1834083U JP S59125834 U JPS59125834 U JP S59125834U
Authority
JP
Japan
Prior art keywords
semiconductor element
conductive paste
semiconductor equipment
substrate
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983018340U
Other languages
English (en)
Inventor
寛 山田
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP1983018340U priority Critical patent/JPS59125834U/ja
Publication of JPS59125834U publication Critical patent/JPS59125834U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H10W72/01308—Manufacture or treatment of die-attach connectors using permanent auxiliary members, e.g. using alignment marks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07311—Treating the bonding area before connecting, e.g. by applying flux or cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は従来例の側断面図、第２図は半導体素子の基板
へのマウント方法を説明する側断面図、第３図は本案の
一実施例を示す側断面図、第４図は基板の平面図、第５
図は基板の他の実施例を示す平面図である。 図中、１は基板（放熱板）、２は溝部、３は半導体素子
、４は導電性ペースト、５はリード、７は樹脂材である
。 第２図

Claims (1)

    【実用新案登録請求の範囲】
  1. 基板に半導体素子を導電性ペーストを介在させて固定す
    ると共に、半導体素子の電極とリードとを電気的に接続
    し、かつ半導体素子を含む主要部分を樹脂材にてモール
    ド被覆したものにおいて、上記基板の、半導体素子の周
    縁に隣接する部分に溝部を形成すると共に、導電性ペー
    ストの平均的な厚みを１５μｍ以下に設定したことを特
    徴とする半導体装置。
JP1983018340U 1983-02-09 1983-02-09 半導体装置 Pending JPS59125834U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983018340U JPS59125834U (ja) 1983-02-09 1983-02-09 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983018340U JPS59125834U (ja) 1983-02-09 1983-02-09 半導体装置

Publications (1)

Publication Number Publication Date
JPS59125834U true JPS59125834U (ja) 1984-08-24

Family

ID=30149542

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983018340U Pending JPS59125834U (ja) 1983-02-09 1983-02-09 半導体装置

Country Status (1)

Country Link
JP (1) JPS59125834U (ja)

Similar Documents

Publication Publication Date Title
JPS5827934U (ja) 半導体装置
JPS59125834U (ja) 半導体装置
JPS59125833U (ja) 半導体装置
JPS6033411U (ja) 集合抵抗体
JPS5933254U (ja) 半導体装置
JPS5929048U (ja) 半導体部品の放熱器取付構造
JPS59125835U (ja) 半導体装置
JPS6117752U (ja) テ−プキヤリア半導体装置
JPS58159764U (ja) 磁電変換素子
JPS5881937U (ja) 半導体装置
JPS58114049U (ja) 半導体装置
JPS5958941U (ja) 半導体装置
JPS6127248U (ja) リ−ドフレ−ム
JPS6094836U (ja) 半導体装置
JPS6057140U (ja) 樹脂モ−ルド半導体装置
JPS609226U (ja) 半導体の実装用パツケ−ジ
JPS5954961U (ja) 半導体装置
JPS6090841U (ja) 半導体装置
JPS58148903U (ja) チツプ抵抗体
JPS59112953U (ja) 外部リ−ドの取付構造
JPS5989547U (ja) 半導体装置
JPS6033449U (ja) 半導体装置
JPS59192846U (ja) 半導体装置
JPS60181031U (ja) チツプキヤリアの基板構造
JPS5945998U (ja) 半導体装置のテ−ピング構体