JPS59150480A - Semiconductor pressure conversion device - Google Patents

Semiconductor pressure conversion device

Info

Publication number
JPS59150480A
JPS59150480A JP58016122A JP1612283A JPS59150480A JP S59150480 A JPS59150480 A JP S59150480A JP 58016122 A JP58016122 A JP 58016122A JP 1612283 A JP1612283 A JP 1612283A JP S59150480 A JPS59150480 A JP S59150480A
Authority
JP
Japan
Prior art keywords
reverse bias
diffused
layer
diaphragm
resistance layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58016122A
Other languages
Japanese (ja)
Other versions
JPH0636427B2 (en
Inventor
Susumu Kimijima
君島 進
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58016122A priority Critical patent/JPH0636427B2/en
Publication of JPS59150480A publication Critical patent/JPS59150480A/en
Publication of JPH0636427B2 publication Critical patent/JPH0636427B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/50Devices controlled by mechanical forces, e.g. pressure

Landscapes

  • Pressure Sensors (AREA)

Abstract

PURPOSE:To reduce the temperature change of the output voltage of a bridge circuit by eliminating the inequality of the reverse bias voltage between each diffused layer and thus enhance the accuracy by making equal the distance between a reverse bias electrode and a diffused resistance layer. CONSTITUTION:A thin diaphragm 42 is formed by etching, etc. from the back surface of a single crystal plate 41, and the diffused resistance layers 43 (431,... 434) are provided on the diaphragm. The reverse bias electrode 44 is provided at the center of the diaphragm 42 at the same distance from each diffused resistance layer 431, 432, 433, and 434. The reverse bias voltages impressed on the P-N junctions between said plate 41 and said layers 43 via said electrode 44 become equal, and therefore the temperature change of the output voltage becomes small.

Description

【発明の詳細な説明】 〔発明の縞する技術分野〕 この発明は半導体のピエゾ抵抗効果を利用して流体圧力
の測定を行う半導体圧力変換装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor pressure transducer that measures fluid pressure by utilizing the piezoresistance effect of a semiconductor.

〔従来技術とその問題点〕[Prior art and its problems]

半導体プレーナ技術の応用によりシリコンやゲルマニウ
ム等の半導体単結晶板の一部に肉薄のダイヤフラムを設
け、このダイヤプラムに感圧素子として拡散抵抗層を形
成して、そのピエゾ抵抗効果を利用した圧力変換装置が
実用化されている。
By applying semiconductor planar technology, a thin diaphragm is provided on a part of a semiconductor single crystal plate such as silicon or germanium, and a diffused resistance layer is formed as a pressure-sensitive element on this diaphragm. Pressure conversion is performed using the piezoresistance effect of the thin diaphragm. The device has been put into practical use.

その−例の概略構造を示すと第1図のようになっている
。図において1は例えばn型のシリコン単結晶板であり
、その中央部に肉薄のダイヤフラム2を設け、このダイ
ヤフラム2にp型の拡散キト(抗層3(3い32、・・
・)を形成している。表面は絶縁層4で覆われ、その上
にA/等からなる電極配線層5が配設式れている。電極
配線層5は絶縁層4に設けたコンタクトホールを介して
、単結晶板1と拡散抵抗層3の端部に接触し、単結晶板
1や拡散層3の内部結線や外部への電極取出し端子の役
割を果たしている。従って、電極配線層5には必要に応
じてリード線6(68,68,68,64は拡散11(
抗層3へ接続するリード線、6.は単結晶板1に接線す
るリード線である。)がボンディングてれている。この
ような圧力変換基板10は例えはシリコンからなる固定
台7に接着剤9により接着固定される。固定台7には貫
スm孔8が設けられていて、この貫通孔8に流入する流
体の圧力pがダイヤフラム2の変形をもたらすことにな
る。
The schematic structure of this example is shown in FIG. In the figure, reference numeral 1 is, for example, an n-type silicon single crystal plate, and a thin diaphragm 2 is provided in the center of the plate, and a p-type diffusion layer 3 (3, 32, . . .
・) is formed. The surface is covered with an insulating layer 4, and an electrode wiring layer 5 made of A/etc. is disposed thereon. The electrode wiring layer 5 contacts the ends of the single crystal plate 1 and the diffused resistance layer 3 through contact holes provided in the insulating layer 4, and is used for internal wiring of the single crystal plate 1 and the diffused layer 3 and for taking out the electrode to the outside. It plays the role of a terminal. Therefore, the lead wires 6 (68, 68, 68, 64 are connected to the diffusion 11 (
6. Lead wire connecting to anti-layer 3; is a lead wire tangential to the single crystal plate 1. ) is bonded. Such a pressure conversion board 10 is adhesively fixed to a fixing base 7 made of silicon, for example, with an adhesive 9. The fixing base 7 is provided with a through hole 8, and the pressure p of the fluid flowing into the through hole 8 causes the diaphragm 2 to deform.

実際の流体圧力測定は、例えば上記圧力変換基板10に
更に2個の固定抵抗pt、、h、、を加え33.32R
,、R,とでブリッジ回路を組んで行なわれる。この場
合、拡散抵抗3..32は一方が流体圧力pによって抵
抗値の増大するもの、他方が流体圧力pによって抵抗値
が減小するものとする。このような抵抗IIi!変化の
異方性は拡散抵抗層をダイヤフラム2のどの領域にどの
ようなパターンで設けるかによって決まる。このとき、
ブリッジ回路の出力電圧ΔVが外部からの電気的ノイズ
等に影響キれにくくするだめに、例えば第1図に示すよ
うに、単結晶板1けリード線6.を介して電源Eに接続
されている。そしてn型の単結晶板1とp型の拡散抵抗
層3との間のp−n接合に逆バイアス電圧が印加される
For actual fluid pressure measurement, for example, two fixed resistors pt, h, and 33.32R are added to the pressure conversion board 10.
, , R, form a bridge circuit. In this case, the diffused resistance 3. .. 32, one of which has a resistance value that increases with the fluid pressure p, and the other whose resistance value decreases with the fluid pressure p. Such resistance IIi! The anisotropy of the change is determined by which region of the diaphragm 2 and in what pattern the diffused resistance layer is provided. At this time,
In order to make the output voltage ΔV of the bridge circuit less likely to be affected by external electrical noise, etc., for example, as shown in FIG. 1, a lead wire 6. It is connected to power supply E via. Then, a reverse bias voltage is applied to the pn junction between the n-type single crystal plate 1 and the p-type diffused resistance layer 3.

しかし、従来の圧力変換基板では例えば第2図に示すよ
うに単結晶板31に逆バイアスのための電圧を印加する
゛電極あとそれぞれの拡散抵抗層;(31,332,3
3s 、334との距離が異なっていた。そのためにそ
れぞれの拡散抵抗層331.332.338.33.に
加わる逆バイアス電比に差が生じて、その結果各折抗層
の温度特性に差が生じてブリッジ回路の出力電圧△■の
温度変化が大きくなっていた。
However, in the conventional pressure transducer substrate, for example, as shown in FIG. 2, a voltage for reverse bias is applied to the single crystal plate 31.
3s and 334 were different. For this purpose, the respective diffused resistance layers 331, 332, 338, 33. There was a difference in the reverse bias electric ratio applied to the , which resulted in a difference in the temperature characteristics of each folded layer, resulting in a large temperature change in the output voltage Δ■ of the bridge circuit.

〔発明の目的〕[Purpose of the invention]

この発明は、上記した点に鑑みてなをれたもので、ブリ
ッジ回路の出力電1圧△■の温度変化が小さい^精度の
半導体圧力変換装置を提供するものである。
The present invention has been developed in view of the above-mentioned points, and it is an object of the present invention to provide an accurate semiconductor pressure transducer in which the temperature change in the output voltage △■ of the bridge circuit is small.

〔発明の概要〕[Summary of the invention]

この発明は、半導体単結晶板と拡散抵抗層との間のp−
n接合に逆バイアス電圧を印加するだめに半導体単結晶
板上に設けられた電極(以後逆バイアス電極と呼ぶ。)
とそれぞれの拡散抵抗層との距離を等しくしたことを特
徴としている。省fバイアスit極と拡散抵抗層との距
離を等しぐすることにより単結晶板の抵抗が原因となっ
ている各拡散層間の逆バイアス電圧の不均衡をなくして
ブリッジ回路の出力知;圧△V(以後出力′lip圧△
■と吋−ぶ。)の温度変化を小さくしようというもので
ある。
This invention provides a p-
An electrode provided on a semiconductor single crystal plate to apply a reverse bias voltage to the n-junction (hereinafter referred to as a reverse bias electrode).
It is characterized in that the distances between and the respective diffused resistance layers are made equal. By making the distance between the f-saving bias it pole and the diffused resistance layer equal, the imbalance in reverse bias voltage between each diffused layer caused by the resistance of the single crystal plate is eliminated, and the output voltage of the bridge circuit is improved. △V (hereinafter output 'lip pressure△
■ and sing. ) to reduce the temperature change.

〔発明の効果〕〔Effect of the invention〕

本発明による半導体圧力変換装置は従来の半導体圧力変
換装置に比べて、出力電圧△■の温度変化、とりわけダ
イヤフラムに流体圧力が加わらないときの出力電圧△■
(これを零点出力と呼ぶ)の温度変化が小きくなった。
Compared to conventional semiconductor pressure transducers, the semiconductor pressure transducer according to the present invention is more sensitive to temperature changes in the output voltage △■, especially when no fluid pressure is applied to the diaphragm.
(This is called zero point output) temperature change has become smaller.

従来は逆バイアス電極と拡散抵抗との距離が等しくない
ために同−半導体圧力変換装置角内においてもどの拡散
抵抗層を使用するかに依り、零点出力の温度変化に差が
生じ零点出力の需1度変化の太きさも周囲Y黒度が一加
℃から80℃に変化すると1.2%FSであった。本発
明によるとどの拡散抵抗層を使用しても零壱出力の温度
変化に差がなくなり、零点温度変化の太ききも1.0%
FSと小きくなった。
Conventionally, since the distance between the reverse bias electrode and the diffused resistor was not equal, there was a difference in the temperature change of the zero point output depending on which diffused resistor layer was used even within the same semiconductor pressure transducer angle, and the demand for the zero point output was affected. The width of a 1 degree change in ambient Y blackness was 1.2% FS when the ambient Y blackness changed from 1°C to 80°C. According to the present invention, no matter which diffused resistance layer is used, there is no difference in the temperature change in zero point output, and the thickness of the zero point temperature change is also 1.0%.
FS became smaller.

〔発明の実施例〕[Embodiments of the invention]

以下、図面を参照しながらこの発明の実施例を醋明する
Embodiments of the present invention will be explained below with reference to the drawings.

第3図は、本発明による半導体圧力変換装置のり略図で
ある。単結晶板41の裏面よりエツチング等により肉薄
のダイヤフラム42を形IJii’ Lダイヤフラム4
2上に拡散抵抗層43 (43,、・・・434)が設
けられている。そして逆バイアス電極44が各拡散抵抗
層43h432.433.434から距離が等しいダイ
ヤフラム。
FIG. 3 is a schematic diagram of a semiconductor pressure transducer according to the present invention. A thin diaphragm 42 is formed from the back side of the single crystal plate 41 by etching or the like.
A diffused resistance layer 43 (43, . . . 434) is provided on top of the resistive layer 2 . The reverse bias electrode 44 is a diaphragm whose distance is equal from each diffused resistance layer 43h432.433.434.

42の中央部に設けられている。それゆえ1更バイアス
雷、極44を介して単結晶板4】と拡散抵抗層43との
間のp−n接合に印加する逆バイアス電圧が等しくなり
、出力電圧ΔVの温度変化が小さくなる。
It is provided in the center of 42. Therefore, the reverse bias voltage applied to the pn junction between the single crystal plate 4 and the diffused resistance layer 43 through the bias lightning pole 44 becomes equal, and the temperature change in the output voltage ΔV becomes small.

〔発明の他の実施例〕[Other embodiments of the invention]

第4図に他の実施例を示す。第3図に示した実施イク1
1は形が単純であるが5p−バイアス電極44がダイヤ
フラム42の中央にあるためにこれに面接リード線をポ
ンディグすることはできない。そこで、ダイヤフラム4
2の中央の逆バイアス電圧極44から羊結晶41の肉厚
の周辺部までA/等の金槙剖、線層又は低抵抗のP配線
層で配線しなければならないが、第4図に示す実施例で
は各拡散抵抗層53.〜534の近くの肉厚部にそれぞ
れ逆バイアス電極54.〜54番が設けられている。
FIG. 4 shows another embodiment. Implementation step 1 shown in Figure 3
1 has a simple shape, but since the 5p-bias electrode 44 is located at the center of the diaphragm 42, it is not possible to connect a surface lead wire to it. Therefore, diaphragm 4
Wiring must be done from the reverse bias voltage pole 44 at the center of 2 to the thick periphery of the crystal 41 using a metal wire layer such as A/2 or a low-resistance P wiring layer, as shown in FIG. In the embodiment, each diffused resistance layer 53. Reverse bias electrodes 54. - No. 54 are provided.

第5図に示した実施例では拡散抵抗層6.31〜6:3
4及びダイヤフラム62を周むように方形の逆バイアス
7に憔64が設けられている。逆バイアス電極64の形
状は方形にかぎらず谷拡散抵抗層との距離が弄しいとい
う条件を満していれば円形でも他の任意の形でもよい。
In the embodiment shown in FIG. 5, the diffusion resistance layer is 6.31 to 6:3.
A wedge 64 is provided on the rectangular reverse bias 7 so as to surround the diaphragm 62 and the diaphragm 62. The shape of the reverse bias electrode 64 is not limited to a rectangle, but may be circular or any other shape as long as it satisfies the condition that the distance from the valley diffusion resistance layer is reasonable.

第6図に示した実施例では、拡散抵抗1?I 73 +
〜734はダイヤフラム72の一部分に集まっている。
In the embodiment shown in FIG. 6, the diffused resistance 1? I 73 +
734 are concentrated in a portion of the diaphragm 72.

これに対し逆バイアス電極74ヲ単結晶板71の拡散抵
抗層と反対の(1111に設けて逆バイアス電極74と
各拡散抵抗層73.〜′z34の間の距離を逆バイアス
電極74と各拡散抵抗層73.〜73.間の距離の差に
比べて大きくすることにより実質的には逆バイアス電極
74と各拡散抵抗層73.〜734との距離を等しくし
たのと同じ効果になっている。
On the other hand, the reverse bias electrode 74 is provided on the opposite side (1111) of the diffusion resistance layer of the single crystal plate 71, and the distance between the reverse bias electrode 74 and each diffusion resistance layer 73. By making the distances larger than the difference between the resistance layers 73. to 73., the effect is substantially the same as making the distances between the reverse bias electrode 74 and each of the diffused resistance layers 73. to 734 equal. .

@7図に示した実施例では拡散抵抗層83.の周囲に逆
バイアス電極831の周囲に逆バイアス841が設けら
れているように、1つの拡散抵抗層の周囲を1つの逆バ
イアス電極が囲んでいる。fバイアス電極の形状は方形
に限らずそれぞれ拡散抵抗層と逆バイアス電極との距離
が等しければ任意の形でよい。また、2つ又は2つ以上
の拡散抵抗層をひとめにして逆バイアス官、極が囲んで
もよい。
@7 In the embodiment shown in Figure 7, the diffused resistance layer 83. One reverse bias electrode surrounds one diffused resistance layer, such that a reverse bias electrode 841 is provided around a reverse bias electrode 831. The shape of the f bias electrode is not limited to a rectangle, but may be any shape as long as the distances between the diffused resistance layer and the reverse bias electrode are equal. Alternatively, two or more diffused resistance layers may be surrounded by a reverse bias electrode or pole.

第8図に示した実施例でけ拡散抵抗層93の周囲をPの
分離層95が囲み、他の拡散抵抗層と電気的に分離し、
その分離された島96の中に逆バイアス電極94を設け
である。この場合Pの分離層95で分離された島96の
形状は各分禽aされた島()6内での拡散抵抗層93と
逆バイアス11L極94との間の距離が等しけれは、そ
れぞれの分離された島96の形は任意の形でよい。また
この実施例ではいままでの実屏1】例とは逆にそれぞれ
の分離された島96内での拡散抵抗層93と逆バイアス
電極94との間の距離をfi911N的に変化させて、
出力電圧△■を制御することもできるし、拡散抵抗層9
3は分離層95でqいに41.気的に分離はれているの
で、それぞれの逆バイアス電極り4.〜944ごとに印
加する逆バイアス電圧を変化させても出力電圧ΔVを制
御することもできる。
In the embodiment shown in FIG. 8, a P separation layer 95 surrounds the diffused resistance layer 93 and electrically isolates it from other diffused resistance layers.
A reverse bias electrode 94 is provided within the isolated island 96. In this case, the shape of the islands 96 separated by the separation layer 95 of P is such that if the distance between the diffusion resistance layer 93 and the reverse bias 11L pole 94 in each divided island ( ) 6 is equal, each The isolated islands 96 may have any shape. Also, in this embodiment, contrary to the previous example, the distance between the diffused resistance layer 93 and the reverse bias electrode 94 in each separated island 96 is changed in a fi911N manner,
It is also possible to control the output voltage △■, and the diffusion resistance layer 9
3 is a separation layer 95 and 41. Since they are gaseously separated, each reverse bias electrode 4. The output voltage ΔV can also be controlled by changing the reverse bias voltage applied every .about.944.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は健来の半導体圧力変換装置の概略の構造を示す
断面図(下側)にこの圧力変換装置をブリッジ回路に組
んだ測定回路(上側)を組み合わせた図、第2図はその
拡散抵抗層と逆バイアス電極の配置を平面的に示した図
、@3図は本発明によるH:、力変換装置の拡散抵抗層
と逆バイアス電極の配置を平面的に示した図、第4図、
第5図、第6図、第7図、第8図は本発明の他の実施例
の圧力変換装置を平面的に示した図である。 1.31.41.51.61.71.81.91・・・
単結晶板2.32.42.52.62.72.82.9
2・・・肉薄のダイヤフラム3.33.43.53.6
3.73.83.93・・・拡散抵抗層4゛°°絶縁層
      5・・・電極配線層6・・・リード線  
    7・・・同定台8・・・1通孔      9
・・・接着剤10・・・圧力変換基板 34.44.51.64.74.84.94・・・逆バ
イアス電極95・・・P の分m1層   06・・・
分離された島代flt+人弁球士 則 近 憲 佑 (
はが1名)第1図 r 第2図 5ご3 第4図 3−J
Figure 1 is a cross-sectional view showing the general structure of Kento's semiconductor pressure transducer (lower side) and a measurement circuit (upper side) in which this pressure transducer is assembled into a bridge circuit, and Figure 2 shows its diffusion. A plan view showing the arrangement of the resistance layer and the reverse bias electrode, Figure @3 is a plan view showing the arrangement of the diffused resistance layer and the reverse bias electrode of the force transducer according to the present invention. ,
FIG. 5, FIG. 6, FIG. 7, and FIG. 8 are plan views showing pressure transducers according to other embodiments of the present invention. 1.31.41.51.61.71.81.91...
Single crystal plate 2.32.42.52.62.72.82.9
2... Thin diaphragm 3.33.43.53.6
3.73.83.93... Diffused resistance layer 4゛°° Insulating layer 5... Electrode wiring layer 6... Lead wire
7...Identification stand 8...1 through hole 9
...Adhesive 10...Pressure conversion board 34.44.51.64.74.84.94...Reverse bias electrode 95...m1 layer for P 06...
Separated Shimashiro FLT + Hitoben baseball player Kensuke Chika (
(1 person) Figure 1 r Figure 2 5 3 Figure 4 3-J

Claims (1)

【特許請求の範囲】[Claims] 半導体結晶板の中央部に流体圧によし変形する肉薄部を
設け、その肉薄部に感圧素子としての拡散抵抗層を形成
してなる半導体圧力変換装置において、前記単結晶板と
前記拡散抵抗間のp−n接合に逆バイアス10;圧を印
加する際に前記i1結晶板に設ける電極と該拡散抵抗と
の距離を等しくすることを特徴とする半導体圧力変換装
置。
In a semiconductor pressure transducer device, a semiconductor crystal plate is provided with a thin part deformed by fluid pressure in the center thereof, and a diffused resistance layer as a pressure sensitive element is formed in the thin part, between the single crystal plate and the diffused resistor. A semiconductor pressure transducer device characterized in that when applying a reverse bias pressure of 10 to the p-n junction of the semiconductor device, the distance between the electrode provided on the i1 crystal plate and the diffused resistor is made equal.
JP58016122A 1983-02-04 1983-02-04 Semiconductor pressure converter Expired - Lifetime JPH0636427B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58016122A JPH0636427B2 (en) 1983-02-04 1983-02-04 Semiconductor pressure converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58016122A JPH0636427B2 (en) 1983-02-04 1983-02-04 Semiconductor pressure converter

Publications (2)

Publication Number Publication Date
JPS59150480A true JPS59150480A (en) 1984-08-28
JPH0636427B2 JPH0636427B2 (en) 1994-05-11

Family

ID=11907703

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58016122A Expired - Lifetime JPH0636427B2 (en) 1983-02-04 1983-02-04 Semiconductor pressure converter

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02202066A (en) * 1989-01-31 1990-08-10 Mitsubishi Electric Corp Semiconductor pressure sensor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5734373A (en) * 1980-08-09 1982-02-24 Nippon Denso Co Ltd Silicon diaphragm
JPS5734374A (en) * 1980-08-08 1982-02-24 Mitsubishi Electric Corp Semiconductor device
JPS5892746U (en) * 1981-12-16 1983-06-23 株式会社山武 semiconductor pressure transducer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5734374A (en) * 1980-08-08 1982-02-24 Mitsubishi Electric Corp Semiconductor device
JPS5734373A (en) * 1980-08-09 1982-02-24 Nippon Denso Co Ltd Silicon diaphragm
JPS5892746U (en) * 1981-12-16 1983-06-23 株式会社山武 semiconductor pressure transducer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02202066A (en) * 1989-01-31 1990-08-10 Mitsubishi Electric Corp Semiconductor pressure sensor

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JPH0636427B2 (en) 1994-05-11

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