JPS5916341A - 集積回路用基板の製造方法 - Google Patents

集積回路用基板の製造方法

Info

Publication number
JPS5916341A
JPS5916341A JP57125542A JP12554282A JPS5916341A JP S5916341 A JPS5916341 A JP S5916341A JP 57125542 A JP57125542 A JP 57125542A JP 12554282 A JP12554282 A JP 12554282A JP S5916341 A JPS5916341 A JP S5916341A
Authority
JP
Japan
Prior art keywords
single crystal
silicon
substrate
oxide film
crystal silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57125542A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6244412B2 (2
Inventor
Akinobu Satou
佐藤 倬暢
Seiji Kato
誠司 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI
Original Assignee
JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI filed Critical JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI
Priority to JP57125542A priority Critical patent/JPS5916341A/ja
Publication of JPS5916341A publication Critical patent/JPS5916341A/ja
Publication of JPS6244412B2 publication Critical patent/JPS6244412B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/061Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/191Preparing SOI wafers using full isolation by porous oxide silicon [FIPOS]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/13Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
  • Weting (AREA)
JP57125542A 1982-07-19 1982-07-19 集積回路用基板の製造方法 Granted JPS5916341A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57125542A JPS5916341A (ja) 1982-07-19 1982-07-19 集積回路用基板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57125542A JPS5916341A (ja) 1982-07-19 1982-07-19 集積回路用基板の製造方法

Publications (2)

Publication Number Publication Date
JPS5916341A true JPS5916341A (ja) 1984-01-27
JPS6244412B2 JPS6244412B2 (2) 1987-09-21

Family

ID=14912768

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57125542A Granted JPS5916341A (ja) 1982-07-19 1982-07-19 集積回路用基板の製造方法

Country Status (1)

Country Link
JP (1) JPS5916341A (2)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7829971B2 (en) 2007-12-14 2010-11-09 Denso Corporation Semiconductor apparatus
US8148809B2 (en) 2009-01-15 2012-04-03 Denso Corporation Semiconductor device, method for manufacturing the same, and multilayer substrate having the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7829971B2 (en) 2007-12-14 2010-11-09 Denso Corporation Semiconductor apparatus
US8148809B2 (en) 2009-01-15 2012-04-03 Denso Corporation Semiconductor device, method for manufacturing the same, and multilayer substrate having the same

Also Published As

Publication number Publication date
JPS6244412B2 (2) 1987-09-21

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