JPS5925538B2 - Packet transfer device - Google Patents

Packet transfer device

Info

Publication number
JPS5925538B2
JPS5925538B2 JP54093422A JP9342279A JPS5925538B2 JP S5925538 B2 JPS5925538 B2 JP S5925538B2 JP 54093422 A JP54093422 A JP 54093422A JP 9342279 A JP9342279 A JP 9342279A JP S5925538 B2 JPS5925538 B2 JP S5925538B2
Authority
JP
Japan
Prior art keywords
packet
transfer device
packet transfer
packets
transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54093422A
Other languages
Japanese (ja)
Other versions
JPS5617553A (en
Inventor
勇 高橋
「きよ」曠 結城
英男 松田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP54093422A priority Critical patent/JPS5925538B2/en
Publication of JPS5617553A publication Critical patent/JPS5617553A/en
Publication of JPS5925538B2 publication Critical patent/JPS5925538B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)

Description

【発明の詳細な説明】 本発明は相手装置におけるパケット受信の効率を向上さ
せ得るとともに経済的にも有利なパケット転送装置に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a packet transfer device that can improve the efficiency of packet reception in a partner device and is also economically advantageous.

従来この種の装置は、転送情報をパケットにして相手装
置へ転送する場合、パケット長の長短に関係なく連続し
て転送を行なつていた。
Conventionally, when this type of device converts transfer information into packets and transfers them to a partner device, the transfer is performed continuously regardless of the length of the packet.

第1図は従来のパケット転送装置の一例である。FIG. 1 is an example of a conventional packet transfer device.

第1図において、1、2はデータの転送を行うパケット
転送装置、3および8はパケット転送を制御する制御装
置、4およびTはパケットを相手装置へ送出する回路、
5および6は相手装置からパケットを受信する回路、9
および10はパケットを転送する通信回線、11および
12は部側装置が有している記憶装置である。例えばパ
ケット転送装置1から多くのパケットを連続してパケッ
ト転送装置2へ送る場合、制御装置3はパケット送出回
路4を介して連続してパケットを相手装置のパケット受
信回路6に送り、パケット受信回路6はパケットを受信
した事を制御装置8に報告する。
In FIG. 1, 1 and 2 are packet transfer devices that transfer data, 3 and 8 are control devices that control packet transfer, 4 and T are circuits that send packets to a partner device,
5 and 6 are circuits that receive packets from the other device; 9
and 10 are communication lines for transferring packets, and 11 and 12 are storage devices possessed by the unit. For example, when sending many packets continuously from the packet transfer device 1 to the packet transfer device 2, the control device 3 continuously sends the packets to the packet receiving circuit 6 of the other device via the packet sending circuit 4, and 6 reports to the control device 8 that the packet has been received.

制御装置8はパケットの伝送制御に関する情報を解釈し
て転送情報を湘脚装置内の記憶装置12に格納処理する
。このような処理を連続して転送される各パケットの受
信ごとに実行する。従つて、従来のパケット転送装置に
おいては、長さの短かい連続したパケットを受信した場
合、パケット長が短かいため前のパケットの解釈終了前
次のパケットが到着し、次のパケットの解釈を行うこと
が出来ない場合が生じた。
The control device 8 interprets information related to packet transmission control and stores the transfer information in the storage device 12 in the mobile device. Such processing is executed every time each successively transferred packet is received. Therefore, in a conventional packet transfer device, when consecutive short packets are received, the next packet arrives before the previous packet has been interpreted because the packet length is short, and the next packet cannot be interpreted. There were cases where it was not possible to do so.

そのため、特に長いパケットの使用が大部分を占めるよ
うな装置の場合、たまにしか生じない短かいパケットの
連続送信に対して許容し得るごとく装置を構成すると、
装置の処理速度に対する要求として、大部分の長いパケ
ットでは不必要な高速処理が必要となり、装置処理速度
に過大な要求条件を課し、経済的な設計が出来なくなる
欠点があつた。本発明はこのような従来技術の欠点を除
去するため、パケット送出時パケット長を検出して、パ
ケットの長さによりパケットを送出する間隔を変える機
能をパケット転送装置に持たせる様にしたもので、以下
図面について詳細に説明する。
Therefore, especially in the case of a device that mostly uses long packets, if the device is configured to tolerate continuous transmission of short packets that occur only occasionally,
As for the processing speed requirements of the device, most long packets require unnecessary high-speed processing, which imposes excessive requirements on the device processing speed and has the disadvantage that an economical design cannot be achieved. In order to eliminate such drawbacks of the prior art, the present invention provides a packet transfer device with a function of detecting the packet length at the time of packet transmission and changing the packet transmission interval depending on the packet length. , the drawings will be explained in detail below.

第2図は本発明のパケット転送装置の一実施例であつて
、21お一よび22はデータの転送を行うパケツト転送
装置、23および30はパケツト転送を制御する制御装
置、26および31はパケツト長検出およびタイミング
機能を有する回路、27および32は制御装置23およ
び30が管理し、転送パケツトを蓄える記憶装置、24
および29はパケツトを相手装置へ送出する回路、25
および28はパケツトを相手装置から受信する回路、3
3および34はパケツトを転送する通信回線である。こ
のパケツト転送装置21を使用して相手装置22へ情報
を転送する場合、制御装置23は、記憶装置27にある
パケツトを取り出し制御情報を先頭に付加して、パケツ
ト長を検出する回路26を介して送出する処理をする。
FIG. 2 shows an embodiment of the packet transfer device of the present invention, in which 21 and 22 are packet transfer devices that transfer data, 23 and 30 are control devices that control packet transfer, and 26 and 31 are packet transfer devices. circuits 27 and 32 having length detection and timing functions are managed by control devices 23 and 30, and storage devices 24 for storing transfer packets;
and 29 is a circuit that sends the packet to the other device, 25
and 28, a circuit for receiving packets from the partner device; 3;
3 and 34 are communication lines for transferring packets. When using this packet transfer device 21 to transfer information to the other device 22, the control device 23 takes out the packet from the storage device 27, adds control information to the beginning, and sends the packet via the circuit 26 that detects the packet length. process to send it.

パケツト長を検出する回路26は、前のパケツトが短か
くて、且つ、現在送出しようとしているパケツトが短か
い場合は最小タイミングより長い一定タイミングをとり
、そうでない場合は最小タイミングをとつて、パケツト
送出回路24に送る。パケツト送出回路24は、通信回
線33を使用してパケツトを相手パケツト転送装置22
へ転送する。パケツト転送装置22はパケツト受信回路
28を介して受信し、制御装置30で制御情報を解釈し
、記憶装置32へ転送する情報を含んだパケツトであれ
ば記憶装置32へ転送する処理を行い、そうでない装置
間の制御情報だけであれば制御情報に対応した処理を行
う。制御装置30は、パケツトを受信したことをパケツ
ト転送装置21へ報告するために報告処理を行う。報告
処理は制御装置30がパケツト転送装置21へ送出する
パケツトがある場合はそれに乗せてやり、ない場合は新
たに報告用のパケツトを作成し、制御装置23が行なつ
たパケツト送出処理と同様にして、パケツト長検出回路
31を介してパケツト転送装置21へ送出し、情報の授
受を行う。この様にして、パケツト長検出回路26およ
び31を介したことにより、短かいパケツトを連続して
送る場合、送信側で一定タイミングをとつて送出するの
で、その効果として受信側の制御装置30はパケツトの
制御情報の解釈を一定時間内に終了し、次のパケツトが
転送されてきても、制御情報の解釈が間に合わなくなる
ことはなくなり、装置処理速度を適当な値に設定した経
済的な装置設計が可能となる。以上説明した様に本発明
のパケツト転送装置においては、短かいパケツトの連続
送信において一定タイミングをとつて送信しているため
、受信側装置ではパケツトの解釈が出来なくなつたりす
ることがなくなり、再送回数が減少する。
The circuit 26 for detecting the packet length takes a constant timing longer than the minimum timing if the previous packet was short and the packet currently being sent is short, otherwise it takes the minimum timing and sends the packet. It is sent to the sending circuit 24. The packet sending circuit 24 uses the communication line 33 to send the packet to the other party's packet transfer device 22.
Transfer to. The packet transfer device 22 receives the control information via the packet receiving circuit 28, interprets the control information in the control device 30, and if the packet includes information to be transferred to the storage device 32, performs processing to transfer the packet to the storage device 32, and then transfers the packet to the storage device 32. If there is only control information between devices that are not connected to each other, processing corresponding to the control information is performed. The control device 30 performs a reporting process to report to the packet transfer device 21 that the packet has been received. In the reporting process, if there is a packet that the control device 30 sends to the packet transfer device 21, it is carried on it, and if there is no packet, a new report packet is created, and the same process as the packet sending process performed by the control device 23 is performed. Then, it is sent to the packet transfer device 21 via the packet length detection circuit 31, and information is exchanged. In this way, when short packets are sent consecutively via the packet length detection circuits 26 and 31, the sending side sends them out at a certain timing, and as a result, the receiving side control device 30 An economical equipment design that allows the interpretation of the control information of a packet to be completed within a certain amount of time, so that even if the next packet is transferred, the interpretation of the control information will not be delayed, and the equipment processing speed can be set to an appropriate value. becomes possible. As explained above, in the packet transfer device of the present invention, since short packets are sent at a fixed timing in continuous transmission, the receiving device does not become unable to interpret the packets, and the packets are not retransmitted. The number of times decreases.

再送は転送装置での応答待ちタイミングである数秒間の
タイミングで転送制御しており、パケツト送出間隔であ
る最小時間制限の数Msに比べ遥力東長い。従つて再送
回数の減少により従来装置に比べ極めて少ない時間損失
で転送制御が出来る。また、再送がなくなることによつ
て装置間の有効情報転送量が増加するという利点が生ず
る。さらに装置処理速度の速い装置を必要とせず適度な
値に速度を設定出来るので、経済的な装置が設計出来る
ことも利点である。
Retransmission is controlled at a timing of several seconds, which is the response waiting timing in the transfer device, and is much longer than the minimum time limit of number Ms, which is the packet transmission interval. Therefore, by reducing the number of retransmissions, transfer control can be performed with extremely less time loss compared to conventional devices. Furthermore, eliminating retransmissions has the advantage of increasing the amount of effective information transfer between devices. Another advantage is that an economical device can be designed because the speed can be set to an appropriate value without requiring a device with a high processing speed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のパケツト転送装置と通信回線の接続プロ
ツク図、第2図は本発明装置の一実施例のパケツト転送
装置と通信回線の接続プロツク図である。 1,2,21,22・・・・・・パケツト転送装置、3
,8,23,30・・・・・・パケツト制御装置、26
,31・・・・・・パケツト長検出回路およびタイミン
グ回路、4,7,24,29・・・・・・パケツト送出
回路、5,6,25,28・・・・・・パケツト受信回
路、11,12,27,32・・・・・・記憶装置、9
,10,33,34・・・・・・通信回線。
FIG. 1 is a diagram of a connection between a conventional packet transfer device and a communication line, and FIG. 2 is a diagram of a connection between a packet transfer device and a communication line according to an embodiment of the present invention. 1, 2, 21, 22...Packet transfer device, 3
, 8, 23, 30...Packet control device, 26
, 31... Packet length detection circuit and timing circuit, 4, 7, 24, 29... Packet sending circuit, 5, 6, 25, 28... Packet receiving circuit, 11, 12, 27, 32... Storage device, 9
, 10, 33, 34... Communication line.

Claims (1)

【特許請求の範囲】[Claims] 1 制御機能およびデータ記憶機能を有し一連のディジ
タルデータ信号をパケット形式で転送するパケット転送
装置において、パケットの長さを検出するとともにパケ
ット転送のタイミングを定める手段を具え、パケット転
送間階に最小時間制限を設けるとともに連続する短いパ
ケットの転送に際しては少くとも前記最小時間より長い
間隔をおいてパケットを転送することを特徴とするパケ
ット転送装置。
1. A packet transfer device that has a control function and a data storage function and transfers a series of digital data signals in packet format, is equipped with means for detecting the length of a packet and determining the timing of packet transfer, and has a minimum A packet transfer device characterized by setting a time limit and transferring packets at intervals longer than the minimum time when transferring successive short packets.
JP54093422A 1979-07-23 1979-07-23 Packet transfer device Expired JPS5925538B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54093422A JPS5925538B2 (en) 1979-07-23 1979-07-23 Packet transfer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54093422A JPS5925538B2 (en) 1979-07-23 1979-07-23 Packet transfer device

Publications (2)

Publication Number Publication Date
JPS5617553A JPS5617553A (en) 1981-02-19
JPS5925538B2 true JPS5925538B2 (en) 1984-06-19

Family

ID=14081855

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54093422A Expired JPS5925538B2 (en) 1979-07-23 1979-07-23 Packet transfer device

Country Status (1)

Country Link
JP (1) JPS5925538B2 (en)

Also Published As

Publication number Publication date
JPS5617553A (en) 1981-02-19

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