JPS5932032Y2 - magnetic recording and playback device - Google Patents

magnetic recording and playback device

Info

Publication number
JPS5932032Y2
JPS5932032Y2 JP7463578U JP7463578U JPS5932032Y2 JP S5932032 Y2 JPS5932032 Y2 JP S5932032Y2 JP 7463578 U JP7463578 U JP 7463578U JP 7463578 U JP7463578 U JP 7463578U JP S5932032 Y2 JPS5932032 Y2 JP S5932032Y2
Authority
JP
Japan
Prior art keywords
recording
terminal
playback
resistor
equalizer amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7463578U
Other languages
Japanese (ja)
Other versions
JPS54176308U (en
Inventor
孝純 岡田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP7463578U priority Critical patent/JPS5932032Y2/en
Publication of JPS54176308U publication Critical patent/JPS54176308U/ja
Application granted granted Critical
Publication of JPS5932032Y2 publication Critical patent/JPS5932032Y2/en
Expired legal-status Critical Current

Links

Description

【考案の詳細な説明】 本考案は磁気録音再生装置に関するもので、録音時にイ
コライザアンプの入力端子に入ってくる交流バイアス信
号漏れを防止するとともに、再生時における信号の高域
を補償することを目的とする。
[Detailed description of the invention] The present invention relates to a magnetic recording and playback device, which prevents the leakage of AC bias signals that enter the input terminal of an equalizer amplifier during recording, and compensates for the high frequency range of the signal during playback. purpose.

以下本考案の一実施例について添付図面を用いて説明す
る。
An embodiment of the present invention will be described below with reference to the accompanying drawings.

図において1は録音・再生ヘッド、2はイコライザアン
プ、3,4.5は録音・再生切換スイッチで、互いに連
動し、おのおの録音端子R1再生端子Pおよび共通端子
Cを有する。
In the figure, 1 is a recording/playback head, 2 is an equalizer amplifier, and 3, 4.5 are recording/playback changeover switches, which are interlocked with each other and each has a recording terminal R1, a playback terminal P, and a common terminal C.

前記切換スイッチ3は再生端子Pを録音・再生ヘッド1
に接続するとともに結合用コンデンサ6を介して録音交
流バイアス発振回路(図示せず)に接続している。
The changeover switch 3 connects the playback terminal P to the recording/playback head 1.
It is also connected to a recording AC bias oscillation circuit (not shown) via a coupling capacitor 6.

また切換スイッチ3ばその共通端子Cを接地する一方、
録音端子Rを録音・再生ヘッド1およびコンデンサIを
介してイコライザアンプ2の入力端子2aにおのおの接
続するとともに、コンデンサ8を介して接地している。
In addition, while the common terminal C of the changeover switch 3 is grounded,
The recording terminal R is connected to the recording/reproducing head 1 and the input terminal 2a of the equalizer amplifier 2 via the capacitor I, and is grounded via the capacitor 8.

なお、前記コンデンサ8は再生時、録音・再生ヘッド1
のインダクタンスと共振回路を構成して再生信号の高域
を補償する。
Note that the capacitor 8 is connected to the recording/playback head 1 during playback.
The inductance and resonant circuit are configured to compensate for the high frequency range of the reproduced signal.

筐た、切換スイッチ4は再生端子Pを切換スイッチ3の
録音端子Rvc接続し、共通端子Cを抵抗9を介してイ
コライザアンプ2の入力端子2aに接続するとともに、
録音端子Rを録音信号入力端子10に接続している。
In addition, the changeover switch 4 connects the playback terminal P to the recording terminal Rvc of the changeover switch 3, and connects the common terminal C to the input terminal 2a of the equalizer amplifier 2 via a resistor 9.
A recording terminal R is connected to a recording signal input terminal 10.

一方、切換スイッチ5はその再生端子Pを音声出力増巾
器(図示せず)に接続される再生信号出力端子11に接
続し、共通端子Cをイコライザアンプ2の出力端子2b
[接続するとともに、録音端子Rは録音レベル調整用で
あり、かつ録音時の高域補償用の抵抗12とコンデンサ
13の並列回路および並列共振トラップ回路を構成する
可変コイル14とコンデンサ15の並列回路を介して切
換スイッチ3の再生端子Pと結合用コンデンサ6の接続
点に接続している。
On the other hand, the changeover switch 5 connects its playback terminal P to a playback signal output terminal 11 connected to an audio output amplifier (not shown), and its common terminal C to the output terminal 2b of the equalizer amplifier 2.
[In addition to the connection, the recording terminal R is for adjusting the recording level, and a parallel circuit of a resistor 12 and a capacitor 13 for high frequency compensation during recording, and a parallel circuit of a variable coil 14 and a capacitor 15 forming a parallel resonance trap circuit. It is connected to the connection point between the regeneration terminal P of the changeover switch 3 and the coupling capacitor 6 via.

なお、イコライザアンプ2の共通端子2cは接地してい
る。
Note that the common terminal 2c of the equalizer amplifier 2 is grounded.

上記構成において動作を簡単に説明すると、1ず切換ス
イッチ3,4.5の可動片を図示するごとく再生端子P
1共通端子C間を短絡するように切換えると再生状態と
なり、録音・再生ヘッド1からの再生信号はコンデンサ
7と抵抗9の並列回路、イコライザアンプ2を通り、切
換スイッチ5゜出力端子11を介して音声出力増巾5に
入力される。
To briefly explain the operation in the above configuration, first, the movable pieces of the changeover switches 3, 4.5 are connected to the playback terminal P as shown in the diagram.
1 and common terminal C to short-circuit, the playback state is entered, and the playback signal from the recording/playback head 1 passes through a parallel circuit of a capacitor 7 and a resistor 9, an equalizer amplifier 2, and then via a changeover switch 5° and an output terminal 11. and is input to the audio output amplification unit 5.

−15、切換スイッチ3,4.5の可動片を録音端子R
1共通端子C間を短絡するよ5に切換えると録音状態と
なり、入力端子10に印加される録音信号は切換スイッ
チ4、イコライザアンプ2、切換スイッチ5、各並列回
路を通してバイアス信号とともに磁気テープ(図示せず
)に録音されるにとで、コンデンサTを削除し、抵抗9
を短絡した場合を考える。
-15, changeover switch 3, 4.5 movable piece to recording terminal R
1 to short-circuit the common terminals C to enter the recording state, and the recording signal applied to the input terminal 10 is transmitted to the magnetic tape (Fig. (not shown), remove capacitor T and replace resistor 9.
Consider the case where is shorted.

この場合、図示するように録音時の交流バイアス信号漏
れを防止するためにトラップ回路(可変コイル14とコ
ンデンサ15の並夕哄振回路)を設けているが、実際に
プリント基板上に本回路を構成したとき、切換スイッチ
3と4が隣接して配置されるため、結合用コンデンサ6
を通った交流バイアス信号が漏れて直接、切換スイッチ
3より切換スイッチ4の共通端子Cを経てイコライザア
ンプ2の入力に入ってくる。
In this case, as shown in the figure, a trap circuit (parallel oscillation circuit of variable coil 14 and capacitor 15) is provided to prevent AC bias signal leakage during recording, but this circuit is actually installed on the printed circuit board. When configured, since the changeover switches 3 and 4 are arranged adjacent to each other, the coupling capacitor 6
The AC bias signal that has passed through leaks and directly enters the input of the equalizer amplifier 2 via the changeover switch 3 and the common terminal C of the changeover switch 4.

これがイコライザアンプ2で増巾されて出力されるため
、交流バイアス信号をトラップ回路(可変コイル14、
コンデンサ15)で減衰させていても、イコライザアン
プ2の出力にどうしても交流バイアス信号漏れが生じ、
録音信号に悪影響を与えるという問題がある。
Since this is amplified by the equalizer amplifier 2 and output, the AC bias signal is transmitted to the trap circuit (variable coil 14,
Even if it is attenuated by the capacitor 15), AC bias signal leakage will inevitably occur in the output of the equalizer amplifier 2.
There is a problem in that it adversely affects the recording signal.

本考案はこの問題を解決しようとするもので、図示する
ように切換スイッチ4の共通端子Cとイコライザアンプ
2の入力端子2aとの間に抵抗9を挿入するとともに、
切換スイッチ4の再生端子Pと前記抵抗9のイコライザ
アンプ入力側端子の間にコンデンサIを挿入して、交流
バイアス信号に対するフィルタ回路を構成したものであ
る。
The present invention attempts to solve this problem by inserting a resistor 9 between the common terminal C of the changeover switch 4 and the input terminal 2a of the equalizer amplifier 2 as shown in the figure.
A capacitor I is inserted between the reproduction terminal P of the changeover switch 4 and the input terminal of the equalizer amplifier of the resistor 9 to constitute a filter circuit for the AC bias signal.

上記構成において録音時、コンデンサIの一端は切換ス
イッチ3の録音端子R1共通端子Cを介して接地される
ことにより、上記コンデンサ7の値を適当に選ぶことに
よって交流バイアス信号のフィルターとして動作し、イ
コライザアンプ2の入力端子2aに交流バイアス信号が
混入することはない。
In the above configuration, when recording, one end of the capacitor I is grounded through the common terminal C of the recording terminal R1 of the changeover switch 3, and by appropriately selecting the value of the capacitor 7, it operates as a filter for the AC bias signal. No AC bias signal is mixed into the input terminal 2a of the equalizer amplifier 2.

一方、再生時には前記コンデンサIは切換スイッチ4の
共通端子C1再生端子Pを通じて抵抗9と並列に接続さ
れることになり、録音・再生ヘッド1からイコライザア
ンプ2へ入る再生信号の高域補償用コンデンサとして動
作する。
On the other hand, during playback, the capacitor I is connected in parallel with the resistor 9 through the common terminal C1 of the selector switch 4 and the playback terminal P, and is a high-frequency compensation capacitor for the playback signal input from the recording/playback head 1 to the equalizer amplifier 2. It works as.

以上説明したように本考案によればコンデンサと抵抗を
追加するのみで、録音・再生切換スイッチを隣接して配
置するにもかかわらず録音時における交流バイアス信号
漏れのイコライザアンプへの混入を防止することができ
るとともに、再生時には再生信号の高域を補償すること
ができ、実用上極めて有効となる。
As explained above, according to the present invention, by simply adding a capacitor and a resistor, it is possible to prevent AC bias signal leakage from entering the equalizer amplifier during recording, even though the recording/playback switch is placed adjacent to it. In addition, it is possible to compensate for the high frequency range of the reproduced signal during reproduction, which is extremely effective in practice.

【図面の簡単な説明】[Brief explanation of drawings]

図面は本考案の一実施例における磁気録音再生装置の要
部回路図である。 1・・・・・・録音・再生ヘッド、2・・・・・・イコ
ライザアンプ、3,4,5・・・・・・録音・再生切換
スイッチ、I・・・・・・コンデンサ、9・・・・・・
抵抗。
The drawing is a circuit diagram of a main part of a magnetic recording and reproducing device according to an embodiment of the present invention. 1... Recording/playback head, 2... Equalizer amplifier, 3, 4, 5... Recording/playback selection switch, I... Capacitor, 9.・・・・・・
resistance.

Claims (1)

【実用新案登録請求の範囲】 再生端子が録音再生ヘッドおよび結合コンデンサを介し
て交流バイアス発振回路におのおの接続される第1の録
音・再生切換スイッチに隣接して前記第1の切換スイッ
チに連動する第2の録音・再生切換スイッチを設け、前
記第2の録音・再生切換スイッチは録音端子を録音信号
入力端子に接続し、共通端子を抵抗を介してイコライザ
アンプの入力端子に接続するとともに、録音時には一端
が前記第1の録音・再生切換スイッチの録音端子、共通
端子を介してアースに接続され、再生時には前記第2の
録音・再生切換スイッチの再生端子。 共通端子を介して前記抵抗と並列接続されるコンデンサ
を前記抵抗のイコライザアンプ入力側端子との間に挿入
して、再生時、録音・再生ヘッドからの信号を前記並列
回路を介してイコライザアンプに加えるようにしたこと
を特徴とする磁気録音再生装置。
[Claims for Utility Model Registration] A playback terminal is adjacent to a first recording/playback switch connected to the AC bias oscillation circuit via a recording/playback head and a coupling capacitor, and is interlocked with the first switch. A second recording/playback switch is provided, and the second record/playback switch connects the recording terminal to the recording signal input terminal, connects the common terminal to the input terminal of the equalizer amplifier via a resistor, and connects the recording terminal to the input terminal of the equalizer amplifier via a resistor. At times, one end is connected to ground via the recording terminal and common terminal of the first recording/playback switch, and during playback, the playback terminal of the second recording/playback switch. A capacitor connected in parallel with the resistor through a common terminal is inserted between the equalizer amplifier input side terminal of the resistor, and during playback, the signal from the recording/playback head is passed through the parallel circuit to the equalizer amplifier. A magnetic recording and reproducing device characterized in that:
JP7463578U 1978-05-31 1978-05-31 magnetic recording and playback device Expired JPS5932032Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7463578U JPS5932032Y2 (en) 1978-05-31 1978-05-31 magnetic recording and playback device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7463578U JPS5932032Y2 (en) 1978-05-31 1978-05-31 magnetic recording and playback device

Publications (2)

Publication Number Publication Date
JPS54176308U JPS54176308U (en) 1979-12-13
JPS5932032Y2 true JPS5932032Y2 (en) 1984-09-08

Family

ID=28988342

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7463578U Expired JPS5932032Y2 (en) 1978-05-31 1978-05-31 magnetic recording and playback device

Country Status (1)

Country Link
JP (1) JPS5932032Y2 (en)

Also Published As

Publication number Publication date
JPS54176308U (en) 1979-12-13

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