JPS5935525A - Overload detecting circuit for short time capacity device - Google Patents
Overload detecting circuit for short time capacity deviceInfo
- Publication number
- JPS5935525A JPS5935525A JP14640182A JP14640182A JPS5935525A JP S5935525 A JPS5935525 A JP S5935525A JP 14640182 A JP14640182 A JP 14640182A JP 14640182 A JP14640182 A JP 14640182A JP S5935525 A JPS5935525 A JP S5935525A
- Authority
- JP
- Japan
- Prior art keywords
- value
- load current
- circuit
- integrating circuit
- overload
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Protection Of Static Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、短時間容量機器の過負荷検出回路に係シ、特
に核融合用電源等に使用される短時間容量の制御整流器
の過負荷検出回路に関するものである。[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to an overload detection circuit for short-time capacity equipment, particularly for overload detection of short-time capacity controlled rectifiers used in nuclear fusion power sources, etc. It is related to circuits.
トカマク式核融合炉は、現状では間欠的に核融合メ応を
起こさせることが考えられておシ、プラズマ制御用電源
には間欠的に運転される制御整流器が使用される。との
ような制御整流器を設計する場合には短時間通電時温度
上昇、休止期間での温度低下を計算し、要求されるどの
ような運転パターンにおいても制御整流素子の温度が許
容値以下となるよう設計する。〜まだ、核融合用電源の
場合、プラズマを封じ込める真空容器をベーキングする
ため、低レベル電流で連続運転する場合もある。第1図
に間欠運転時の負荷電流波形を、第2図に連続運転時の
負荷電流波形を示す。又、第1図の間欠運転の休止期間
に、低レベル電流の運転を行なう場合もある。Tokamak-type fusion reactors are currently considered to cause fusion reaction intermittently, and a controlled rectifier that is operated intermittently is used as a power source for plasma control. When designing a controlled rectifier such as this, calculate the temperature rise during short-time energization and temperature drop during non-operation periods, and ensure that the temperature of the controlled rectifier element remains below the allowable value in any required operating pattern. Design it like this. ~In the case of nuclear fusion power supplies, they may still be operated continuously at a low level of current in order to bake the vacuum chamber that confines the plasma. Fig. 1 shows the load current waveform during intermittent operation, and Fig. 2 shows the load current waveform during continuous operation. Further, during the pause period of the intermittent operation shown in FIG. 1, operation with a low level current may be performed.
このため、従来制御整流器を保鰻するために、各運転ノ
J?ターンによシ、過電流設定値を変更すると共に、通
電時間、休止期間の許容値を各運転パターンによシ定め
、通電時間が一定値を越えた場合、休止期間が短−場合
を過負荷として検出していた。ところが、核融合は、現
在まだ開発中であシ、これに使用される制御整流器も各
種パターンの運転が考えられておシ、各運転パターン毎
に、保護検出器の設定値を変更することは煩雑であると
共に、信頼性を著しく低下されるという不具合があった
。For this reason, in order to protect the conventionally controlled rectifier, each operation of the J? In addition to changing the overcurrent set value for each turn, the allowable values for energization time and rest period are determined for each operation pattern, and if the energization time exceeds a certain value or the rest period is short, an overload is detected. It was detected as. However, nuclear fusion is currently still under development, and the control rectifiers used for it are designed to operate in various patterns, and it is not possible to change the set value of the protection detector for each operation pattern. There are problems in that it is complicated and reliability is significantly lowered.
本発明の目的は、短時間容量機器、特に核融合用電源の
過負荷検出方法の前記不具合を解消し、簡単で信頼性の
高い短時間容量機器の過負荷検出回路を提供することで
ある。SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned problems in the overload detection method for short-term capacity equipment, particularly nuclear fusion power supplies, and to provide a simple and reliable overload detection circuit for short-term capacity equipment.
本発明は、連続運転する場合の電流を長時間の時定数で
積分し、制御整流素子の飽和温度に相当する値で固定す
るリミット付の第1の積分回路と、負荷電流が一定レベ
ル以上になると積分し、一定レベル以下になると、機器
の熱容量によシ予め定められた値によシ放電する第2の
積分回路を設け、第1の積分回路と、第2の積分回路の
和によシ、過負荷を検出するようにしたものである。The present invention includes a first integrating circuit with a limit that integrates the current with a long time constant during continuous operation and fixes it at a value corresponding to the saturation temperature of the control rectifying element, and A second integrating circuit is provided that discharges the heat capacity of the device to a predetermined value when the temperature falls below a certain level. It is designed to detect overload.
第3図に本発明の一実施例のブロック図を示す。第3図
において、′1は、前述の請1の積分回路を、2は前述
の第2の積分回路を示す。FIG. 3 shows a block diagram of an embodiment of the present invention. In FIG. 3, '1' represents the above-mentioned integration circuit 1, and 2 represents the above-mentioned second integration circuit.
5−1は第1の積分回路を構成する増幅器、7−1は入
力抵抗器Rノ、8−1はフィードバックコンデンサC−
1であ、る。9−1.9−2は起動停止指令54によシ
開閉されるアナログスイッチ、4−1は、第1の積分回
路1の放電の傾きを決定する設定器である。51は負荷
電流値、52は第1の積分回路1の出力値を示す。5-1 is an amplifier constituting the first integrating circuit, 7-1 is an input resistor R, and 8-1 is a feedback capacitor C-.
It's 1. Reference numerals 9-1 and 9-2 are analog switches that are opened and closed by the start/stop command 54, and 4-1 is a setting device that determines the slope of discharge of the first integrating circuit 1. Reference numeral 51 indicates a load current value, and 52 indicates an output value of the first integrating circuit 1.
6は、第1の積分回路の出力値に、制限値を設けるリミ
ッタであシ、定電圧ダイオード、又は、ダイオード使用
のリミッタ回路として公知のもので十分である。3−1
は、負荷電流の値を検出し、第2の積分回路の充放電を
制御するレベル検出器、7−2は充電用抵抗器R2,7
−3は放電用抵抗器R3,4−3は放電の傾きを決定す
る設定器、5−2は増幅器、8−2はフィードバックコ
ンデンサC−2である04−4はレベル検出器3−1の
レベルを決定する設定器、9−3.9−4はレベル検出
器3−1の出力によシ、開閉制御され′るアナログスイ
ッチである。6 may be a limiter that sets a limit value on the output value of the first integrating circuit, a constant voltage diode, or a known limiter circuit using a diode is sufficient. 3-1
7-2 is a level detector that detects the value of the load current and controls charging and discharging of the second integrating circuit, and 7-2 is a charging resistor R2, 7.
-3 is a discharge resistor R3, 4-3 is a setting device that determines the slope of discharge, 5-2 is an amplifier, 8-2 is a feedback capacitor C-2, and 04-4 is a level detector 3-1. Setting devices 9-3 and 9-4 for determining the level are analog switches whose opening and closing are controlled by the output of the level detector 3-1.
5−3は第1の積分回路1と、第2の積分回路2との和
を取るための増幅器、3−2は増幅器5−3の出力値を
設定器4−2の値と比較し、設定値よシ大きいと過負荷
信号を出力するレベル検出器である。7−4〜7−6は
抵抗器である。5-3 is an amplifier for calculating the sum of the first integrating circuit 1 and the second integrating circuit 2; 3-2 compares the output value of the amplifier 5-3 with the value of the setting device 4-2; This is a level detector that outputs an overload signal if it is larger than the set value. 7-4 to 7-6 are resistors.
以下第3図によシ本発明の詳細な説明する。The present invention will be explained in detail below with reference to FIG.
負荷電流値が連続定格電流値よシ小さい場合、起動停止
指令54が起動となると、アナログスイッチ9−1が閉
、9−2が開となシ、第1の積分回路1によシ負荷電流
が積分され、リミッタ6にて設定された値に制限される
。負荷電流をrdとすると、積分出力52は、Ed1=
Id・t/RICIとなる。RICIは、制御整流素子
及び冷却フィンの熱容量によシ、制御整流素子の温度が
飽和する時間以上とする。Edlのリミッタ値EdIL
は、連続運転時の制御整流素子の飽和温度TIA相当と
する。すなわち、制御整流素子の許容最大温度をTMA
Xとし、との七きの電流時間る。設定器4−2はEMA
Xに設定する。通常運転時、Ed I L (EMAX
でアシ、正常に運転される。When the load current value is smaller than the continuous rated current value, when the start/stop command 54 is activated, the analog switch 9-1 closes and 9-2 opens, and the load current is reduced by the first integrating circuit 1. is integrated and limited to the value set by the limiter 6. If the load current is rd, the integral output 52 is Ed1=
Id・t/RICI. The RICI is determined by the heat capacity of the control rectifier and cooling fins, and is set to be equal to or longer than the time at which the temperature of the control rectifier is saturated. Edl limiter value EdIL
is equivalent to the saturation temperature TIA of the control rectifier during continuous operation. In other words, the maximum allowable temperature of the control rectifier is TMA
Let X be the current of seven times. Setting device 4-2 is EMA
Set to X. During normal operation, Ed I L (EMAX
With reeds, it is operated normally.
起動停止指令54.が停止となるとアナログ・スイッチ
9−1が開、9−2が閉となシ、予め定めた傾きによシ
放電される。Start/stop command 54. When it stops, the analog switch 9-1 is opened and the analog switch 9-2 is closed, causing discharge according to a predetermined slope.
次に、第1図に示すような間欠運転となった場合、連続
定格電流値相当を設定する設定器4−4の値よシ、負荷
電流が大きくなると、レベル検出器3−1の出力が“1
#となシ、アナログスイッチ9−3が閉、9−4が開と
なシ、第2の積分回路によシ負荷電流が積分され、その
出力53は、Ed2 = Id−t/R2C2(!:
fx ル。Next, in the case of intermittent operation as shown in Fig. 1, when the load current becomes larger than the value of the setting device 4-4 which sets the continuous rated current value, the output of the level detector 3-1 will change. “1
# When analog switch 9-3 is closed and analog switch 9-4 is open, the load current is integrated by the second integrating circuit, and its output 53 is Ed2 = Id-t/R2C2 (! :
fx le.
R2Cz << RICIに設定しておき、第1の積分
回路Ed1の出力は、短時間では無視できるように構成
する。負荷電流が設定器4−4の設定値よシ小さくなる
と、アナログスイッチ9−3が開、9−4が閉となシ、
R8C2と設定値4−3で決定される傾きによυ放電さ
れる。R3C2は制御整流素子の温度降下特性に合わせ
て決定する。連続運転モードの場合の積分出力値52の
値を第4図に、間欠運転の場合の積分出力値53の値を
第5図に示す。R2Cz << RICI is set so that the output of the first integrating circuit Ed1 can be ignored for a short time. When the load current becomes smaller than the setting value of the setting device 4-4, the analog switch 9-3 opens and 9-4 closes.
υ is discharged according to the slope determined by R8C2 and the set value 4-3. R3C2 is determined according to the temperature drop characteristics of the controlled rectifier. FIG. 4 shows the value of the integral output value 52 in the case of continuous operation mode, and FIG. 5 shows the value of the integral output value 53 in the case of intermittent operation.
以上のように第1の積分回路、第2の積分回路を設け、
設定器4−2を前述のEMAXに設定しておくと、間欠
運転において、通電時間が所定の値よシ長い場合、Ed
、≧EMAXとなシ、過負荷が検出できる。また、休止
時間が所定の値よシ短い場合は通電開始時、Ed゛2が
零とならないため、通電中にEd、≧EMAXとなシ過
負荷が検出される。As described above, the first integrating circuit and the second integrating circuit are provided,
If the setting device 4-2 is set to EMAX as described above, during intermittent operation, if the energization time is longer than the specified value, Ed
, ≧EMAX, overload can be detected. Furthermore, if the downtime is shorter than a predetermined value, Ed2 will not become zero at the start of energization, so if Ed≧EMAX during energization, an overload will be detected.
また、間欠運転の休止期間に低レベル運転を行なう場合
は、低レベル運転による温度上昇値と、短時間運転によ
る温度上昇の和が、制御整流素子の許容最大温度TMA
X以下でなければならないので、gdl ’+ rd2
<、 EMAXとなるよう短時間運転時の、電流レベル
と運転時間を設定しないと過負荷として検出するこ、と
ができる。In addition, when low-level operation is performed during the pause period of intermittent operation, the sum of the temperature rise value due to low-level operation and the temperature rise due to short-time operation is the maximum allowable temperature TMA of the control rectifier.
It must be less than or equal to X, so gdl '+ rd2
If the current level and operating time during short-time operation are not set so that <, EMAX, it will be detected as an overload.
以上説明したように、本発明の短時間容量機器の過負荷
検出回路を用いると、運転/J?ターン毎に過電流設定
値、通電時間異常検出値、休止時間異常検出値を設定変
更することなく、機器の熱容量の設計値をもとに、簡単
に過負荷を検出できる短時間容量機器の過負荷検出回路
を提供することができる。As explained above, when the overload detection circuit for short-time capacity equipment of the present invention is used, the operation/J? Overloads can be easily detected for short-time capacity equipment based on the design value of the heat capacity of the equipment, without changing the overcurrent set value, abnormality detection value for energization time, and abnormality detection value for down time for each turn. A load detection circuit can be provided.
第1図は、間欠運転時の負荷電流波形図、第2図は、連
続運転時の負荷電流波形図、第3図は本発明の一実施例
を示すプロッ汐図、第4図は、連続運転時の負荷電流波
形図と、第3図の第1の積分回路の出力との関係を示す
特性図、第5図は、間欠運転時の負荷電流波形図と、第
3図の第2の積分回路の出力との関係を示す特性図であ
る。
1・・・第1の積分回路、2・・・第2の積分回路、3
−113−2・・・レベル検出器、4−1〜4−4・・
・設定器、5−1〜5−3・・・増幅器、6・・・リミ
ッタ、7−1〜7−5・・・抵抗器、8−1〜8−イ・
・・コンデンサ、9−1〜9−4・・・アナログスイッ
チ。
出願人代理人 弁理士 鈴 江 武 彦第1図
第2[
4−4
第4図
第5図Figure 1 is a load current waveform diagram during intermittent operation, Figure 2 is a load current waveform diagram during continuous operation, Figure 3 is a plot diagram showing an embodiment of the present invention, and Figure 4 is a continuous load current waveform diagram. Figure 5 is a characteristic diagram showing the relationship between the load current waveform diagram during operation and the output of the first integrating circuit in Figure 3; FIG. 3 is a characteristic diagram showing the relationship with the output of the integrating circuit. 1... First integrating circuit, 2... Second integrating circuit, 3
-113-2... Level detector, 4-1 to 4-4...
・Setting device, 5-1 to 5-3...Amplifier, 6...Limiter, 7-1 to 7-5...Resistor, 8-1 to 8-i・
...Capacitor, 9-1 to 9-4...Analog switch. Applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 2 [4-4 Figure 4 Figure 5
Claims (1)
の積分回路と、負荷電流が一定レベル以上になると負荷
電流を積分し、一定レベル以下では、機器の熱容量によ
シ予め設定された値により放電を行なう第2の積分回路
とを具備し、第1の積分回路と、第2の積分回路の出力
の和が、所定の値よシ大きくなったことによシ過負荷状
態を検出することを特徴とする短時間容量機器の過負荷
検出回路。The first circuit integrates the load current and is limited at a certain level.
and a second integrating circuit that integrates the load current when the load current exceeds a certain level, and discharges at a preset value depending on the heat capacity of the device when the load current is below the certain level. 1. An overload detection circuit for short-time capacity equipment, characterized in that an overload state is detected when the sum of the outputs of a first integration circuit and a second integration circuit becomes larger than a predetermined value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14640182A JPS5935525A (en) | 1982-08-24 | 1982-08-24 | Overload detecting circuit for short time capacity device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14640182A JPS5935525A (en) | 1982-08-24 | 1982-08-24 | Overload detecting circuit for short time capacity device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5935525A true JPS5935525A (en) | 1984-02-27 |
Family
ID=15406864
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14640182A Pending JPS5935525A (en) | 1982-08-24 | 1982-08-24 | Overload detecting circuit for short time capacity device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5935525A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0299603A (en) * | 1988-06-13 | 1990-04-11 | Wl Gore & Co Gmbh | Apparel for clothing having air-permeable material |
-
1982
- 1982-08-24 JP JP14640182A patent/JPS5935525A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0299603A (en) * | 1988-06-13 | 1990-04-11 | Wl Gore & Co Gmbh | Apparel for clothing having air-permeable material |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5187653A (en) | Current limiting device | |
| JP2784463B2 (en) | AC line stabilization circuit | |
| EP0129624A1 (en) | Control circuit for a circuit interrupter | |
| JPS58112423A (en) | Power converting facility control system | |
| JPH05137253A (en) | Abnormal voltage detection controller | |
| JPS5935525A (en) | Overload detecting circuit for short time capacity device | |
| CA1234221A (en) | Device for stopping the running of programs being executed in a microprocessor prior to the disappearance of the power supply voltage of the microprocessor | |
| KR102299582B1 (en) | Short circuit current protection device and smps for elevator inverter with the same | |
| JP2006121779A (en) | Converter and servo controller for robot using the same | |
| JPS6030168U (en) | elevator equipment | |
| US4450516A (en) | Device for controlling the regulating facilities in an electric high-power AC-DC converter | |
| JPH08277468A (en) | Dc power source of vacuum device | |
| JPS5983527A (en) | Overcurrent protecting relaying device | |
| JP2722875B2 (en) | Battery over-discharge prevention circuit | |
| JPS6130416Y2 (en) | ||
| US3588673A (en) | Multilevel solid state dc voltage standard | |
| JPS61177516A (en) | Protecting device for transistor | |
| JP2527395B2 (en) | Battery temperature detection method for charger | |
| KR920005722Y1 (en) | Automatic cut off circuit | |
| JPS6389053A (en) | Switching power source device | |
| JPH11187570A (en) | Power source equipment | |
| JPS62248014A (en) | Power source unit | |
| TW202610198A (en) | Switch circuit with soft start and switch control circuit and method thereof | |
| JPS62173943A (en) | Quick charging circuit | |
| JPS63186532A (en) | Control system of reactive power compensator |