JPS5936486A - Driving system of matrix display panel - Google Patents

Driving system of matrix display panel

Info

Publication number
JPS5936486A
JPS5936486A JP14594282A JP14594282A JPS5936486A JP S5936486 A JPS5936486 A JP S5936486A JP 14594282 A JP14594282 A JP 14594282A JP 14594282 A JP14594282 A JP 14594282A JP S5936486 A JPS5936486 A JP S5936486A
Authority
JP
Japan
Prior art keywords
period
circuits
display
data line
timing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14594282A
Other languages
Japanese (ja)
Other versions
JPS6343039B2 (en
Inventor
Shinji Morozumi
両角 伸治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP14594282A priority Critical patent/JPS5936486A/en
Priority to DE3329130A priority patent/DE3329130C2/en
Priority to GB08322095A priority patent/GB2131217B/en
Priority to US06/524,621 priority patent/US4604617A/en
Publication of JPS5936486A publication Critical patent/JPS5936486A/en
Priority to HK889/87A priority patent/HK88987A/en
Publication of JPS6343039B2 publication Critical patent/JPS6343039B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3622Control of matrices with row and column drivers using a passive matrix
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • G09G3/3681Details of drivers for scan electrodes suitable for passive matrices only
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3685Details of drivers for data electrodes
    • G09G3/3692Details of drivers for data electrodes suitable for passive matrices only
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/66Transforming electric information into light information
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2014Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

PURPOSE:To improve the display contrast of liquid crystal, by providing a period giving a pause to a display in the vicinity of a vertical blanking period and keeping a potential difference between a data line and a timing line to zero at the pause period. CONSTITUTION:A drive circuit of the data line consists of voltage selecting circuits 10-16. The voltage selecting circuits 10-12 are circuits to invert the polarity with a frame signal fL and the voltage selecting circuits 13-14 are circuits to bring the data line to the same level as the non-selecting level of the timing line during the pause period with a pause period signal fD. Further, the voltage selecting circuits 15-16 are circuits inputting the drive output to the data line according to a display data input Di and n-set of blocks 17 are provided.

Description

【発明の詳細な説明】 本発明はマトリックス・ディスプレイ・パネルの駆動方
法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for driving a matrix display panel.

マトリックス・ディスプレイ・パネルとは、駆動i!極
がX、Y両方向にマトリックス状に配置され、文字やグ
ラフ、又は画像を表示するために用いられる。例えば液
晶ディスプレイの場合N本のデータ線とM本のタイミン
グ線により構成さ、れる(NXM)個の画素により表示
が行なわれる。この時普通では、1つのタイミング線を
選択し、その列の画素にデータ線からデータを書き込み
駆動するマルチプレックス駆動が用いられ、1つの画素
に対応するデータが印加される期間は全体の17 Mと
なり、通常これをデユーティと称する。
What is a matrix display panel? The poles are arranged in a matrix in both the X and Y directions and are used to display characters, graphs, or images. For example, in the case of a liquid crystal display, display is performed using (NXM) pixels formed by N data lines and M timing lines. At this time, multiplex driving is normally used in which one timing line is selected and data is written and driven from the data line to the pixels in that column, and the period during which data corresponding to one pixel is applied is a total of 17M. This is usually called duty.

一般に画像やグラフィック表示の場合、タイミング線1
00本は必要である。
Generally, in the case of image or graphic display, timing line 1
00 is necessary.

第1図は液晶マ) IJソックスパネルの駆動電極配置
を示して“いる。駆動電極をなすデータ線81〜Snが
配置され、又タイミングmC1〜Omにより(rLXr
n)個の画素を構成している。
Figure 1 shows the drive electrode arrangement of the liquid crystal IJ sock panel. Data lines 81 to Sn forming the drive electrodes are arranged, and timings mC1 to Om (rLXr
n) pixels.

第2図は第1図のパネルの駆動波形例であり、タイミン
グ線01,02.・・・・・・・・・Ofnというよう
にスキャンするのでデス−テイは常本のタイミング線に
より1 / mとなる。画像表示の場合は階調が必要と
なり、階調性は第2図の如くデータ線に印加する駆動パ
ルス幅を変W1フすることにより実現できる。このよう
な駆動方式とパネルを用いて、ラスタ・スキャン方式の
ようなテレビ画像表示を行なう時の問題点として通常の
テレビ信号の場合タイミング線に対応する走査線は1フ
レームで525本、又奇数フィールドと偶数フィールド
を各々262゜5本づつインターレースして構成されて
いるので、そのまま画像表示を行なうと1/262゜5
デユーテイの駆動を要求されることにある。又解像度を
半分に落としたとすると1/131.25デユーテイで
駆動することが必要となる。ところがこの駆動デユーテ
ィでは液晶は十分のコントラストは現状で得ることはむ
ずかしい。従って何らかの手段により等測的に液晶の駆
動デス−テイを下げ、表示のコントラストを改良して、
見やすい表示体にする必要がある。
FIG. 2 shows an example of the drive waveform for the panel in FIG. 1, with timing lines 01, 02 . Since the scan is performed as ``Ofn'', the death stay will be 1/m according to the regular timing line. In the case of image display, gradation is required, and gradation can be achieved by varying the driving pulse width W1 applied to the data line as shown in FIG. The problem when displaying television images using the raster scan method using such a drive system and panel is that in the case of a normal television signal, there are 525 scanning lines corresponding to the timing lines in one frame, and an odd number of scan lines. Since the field and even field are constructed by interlacing 5 lines of 262° each, if the image is displayed as is, it will be 1/262°5.
The reason is that a duty drive is required. Also, if the resolution is reduced to half, it will be necessary to drive at a duty of 1/131.25. However, with this driving duty, it is currently difficult to obtain sufficient contrast with liquid crystals. Therefore, by some means isometrically lowering the driving death of the liquid crystal and improving the display contrast,
It needs to be displayed in an easy-to-read format.

従って本発明の目的はコントラストの改良可能な液晶マ
トリックス・パネルの駆動方法を提供することにある。
SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a method for driving a liquid crystal matrix panel in which the contrast can be improved.

本発明はビデオ信号中の垂直消去期間前後のす〃報の入
っていないような期間を9液晶体に電圧が印加されない
状態にすることにより1、液晶体(こ加わる0N10F
Fの実効値比を大きくしてコントラストを向上させるも
のである。
According to the present invention, the voltage is not applied to the liquid crystal element during the period before and after the vertical erasing period in which no information is included in the video signal.
The contrast is improved by increasing the effective value ratio of F.

本発明を更に詳しく説明するために、1例として通常用
いられるNTSO方式のビデオ信号に基づい゛て話を進
める。第3図はその信号系であり、信号(イ)は垂直同
期信号V−S、(ロ)は水平同期信号H−8,(ハ)は
その拡大図、(ニ)はビデオ信号V、Sを表わしている
。又第4図は第3図の水平同期信号をわかりやすく表わ
したものであり、1フイールドの時間は1/60秒即ち
16.667m5ecであり、この中に262.5本し
こ相当する走査線が含まれている。液晶マ) IJソッ
クスパネルの場合この半分の走査f#数、即ち131本
でも画像の認識は十分可能であるので、例えば走査線2
本に1本を間引いて表示すると、1/131デユーテイ
と等価な駆動になるが、実際には画像情報としては26
2.5のうち200〜220本を表示すれば十分であり
、むしろ残りの垂直帰線消去期間を含む40〜60本分
に相当する時間は何の情報信号が含まれていないことが
多い。従って、例えば@4図の20番目から24040
番目査部のみ画像表示を行ない、1〜19.241〜2
62.5までは休止期間とするとパネルのタイミング線
数は220本となる。しかし−タイミング線のライン選
択期間は1/131゜25のままであるが、ここで休止
期間中は液晶表示体に実効値のかからないように、タイ
ミング線とデータ線の電位を同一に保つことにより同一
の選択期間でも、液晶にかかる実効値比を向上でき、従
ってコントラストを向上できる。
To explain the present invention in more detail, we will proceed based on a commonly used NTSO video signal as an example. Figure 3 shows the signal system, where signal (a) is the vertical synchronizing signal VS, (b) is the horizontal synchronizing signal H-8, (c) is an enlarged view of it, and (d) is the video signal V, S. It represents. Also, Fig. 4 shows the horizontal synchronization signal in Fig. 3 in an easy-to-understand manner, and the time of one field is 1/60 second, or 16.667 m5ec, and within this field there are 262.5 scanning lines. It is included. In the case of an IJ sock panel, it is possible to recognize an image even with half the number of scan f#s, that is, 131 lines, so for example, 2 scan lines
If one line is thinned out and displayed in a book, the drive becomes equivalent to 1/131 duty, but in reality, the image information is 26
It is sufficient to display 200 to 220 lines out of 2.5, and in fact, the time equivalent to 40 to 60 lines, including the remaining vertical blanking period, often does not contain any information signals. Therefore, for example, 24040 from the 20th in diagram @4
Image display is performed only in the inspection section, 1 to 19.241 to 2
If the period up to 62.5 is a rest period, the number of timing lines on the panel will be 220. However, the line selection period of the timing line remains at 1/131°25, but by keeping the potentials of the timing line and data line the same so that no effective value is applied to the liquid crystal display during the pause period. Even with the same selection period, the effective value ratio applied to the liquid crystal can be improved, and therefore the contrast can be improved.

一般にV−MV方式の電圧平均化法を例にとると、デユ
ーティを1 / Dとするとコントラストの目安となる
液晶の点灯時と非点灯時の実効値比は一方休止期間内に
割り合てられる走査線数をM本とすると休止期間内に実
効値を0とするように駆動することにより実効値比は となり、明らかに(1)より(2)式の方が比が大きく
なる。例えばN=1[1,D=131.M=30とする
と従来のままでは比が1.089であるが、本発明の駆
動法では1.104と大きくなりコントラストが改善さ
れることがわかる。
Generally, taking the voltage averaging method of the V-MV method as an example, if the duty is set to 1/D, the effective value ratio between when the liquid crystal is lit and when it is not lit, which is a measure of contrast, is divided into the rest period. When the number of scanning lines is M, the effective value ratio is obtained by driving so that the effective value becomes 0 within the pause period, and the ratio is clearly larger in equation (2) than in equation (1). For example, N=1[1, D=131. When M=30, the ratio is 1.089 in the conventional case, but it increases to 1.104 in the driving method of the present invention, indicating that the contrast is improved.

第5図は本発明の駆動波形を説明したものであり、水平
同期信号)(−8を標準にしてタイミングを表わしてい
る。一画面は奇数フィールドと偶数フィールドによる1
フレームにより構成されており、1フイールドは1/6
0秒である。簡略化のため奇数フィールドと偶数フィー
ルドは同一の信号とみなす。1フイ一ルド期間内におい
て262゜5本分に対応する走査線のうち表示期間とし
てm本を用いて、垂直帰線消去期間付近の1本と9本は
休止期間とする。タイミング線01〜CfrLは、表示
期間内に01から順次スキャンし、Omで終了する。こ
の時データ線S1〜snには振幅変調された表示データ
が入力される。このデータ線の振幅は■。−Nvoのt
圧平増化法において、2■oとなる。この波形で特徴的
なことは、データ線は休止期間、pとqにおいては、奇
数フレームではVN80.偶数フレームではVNsBと
タイミング線の非選択レベルと同一電位にして、休止期
間中は液晶に電圧が印加されない、即ちこの期間中に実
効値の増加を防ぐことにある。又フレーム信号fLは、
奇数フレームと偶数フレーム毎に交流反転駆動するため
の基本信号である。
Fig. 5 explains the drive waveform of the present invention, and shows the timing using horizontal synchronization signal (-8) as the standard.
It is composed of frames, and one field is 1/6
It is 0 seconds. For simplicity, the odd and even fields are considered to be the same signal. Among the five scanning lines at 262° within one field period, m lines are used as the display period, and one line and nine lines near the vertical blanking period are set as rest periods. The timing lines 01 to CfrL are sequentially scanned from 01 within the display period and end at Om. At this time, amplitude-modulated display data is input to the data lines S1 to sn. The amplitude of this data line is ■. -Nvo's t
In the applanation and enhancement method, it becomes 2■o. What is characteristic about this waveform is that the data line is at rest, and in odd frames, VN80. In even-numbered frames, VNsB is set to the same potential as the non-selection level of the timing line, and no voltage is applied to the liquid crystal during the rest period, that is, to prevent the effective value from increasing during this period. Also, the frame signal fL is
This is a basic signal for AC inversion drive for every odd-numbered frame and even-numbered frame.

第6図は第5図の方式を実現するだめのデータ線の駆動
回路のブロック図であり、電圧選択回路10〜16によ
り構成される。′電圧選択回路10〜12はフレーム信
号fLにより、極性反転するための回路であり、電圧選
択回路13〜14は、体重期間信号fDにより、休止期
間はデータ線をタイミング線の非選択レベルと同一にす
るための回路である。又電圧選択回路15〜16は表示
データ入力D1に従って、駆動出力をデータisiに入
力する回路でありブロック17がn個用意されることに
なる。
FIG. 6 is a block diagram of a data line drive circuit that implements the method shown in FIG. 5, and is composed of voltage selection circuits 10 to 16. 'The voltage selection circuits 10 to 12 are circuits for inverting the polarity in response to the frame signal fL, and the voltage selection circuits 13 to 14 are circuits for inverting the polarity in accordance with the frame signal fL. This is a circuit to make it. Further, the voltage selection circuits 15 to 16 are circuits for inputting the drive output to the data isi according to the display data input D1, and n blocks 17 are prepared.

以上述べたように本発明は垂直帰線消去期間付近に表示
を休止する期間を設け、その休止期間はデータ線とタイ
ミング線の電位差を0に保つことにより、液晶の表示コ
ントラストを改善するものであり、前述の例示のみでな
く、液晶マトリックス・パネルであれば、上下分割電極
方式や、2重々゛トリックス方式等の2重、4重のタイ
ミング線のスキャン方式には全て応用できるものである
As described above, the present invention improves the display contrast of the liquid crystal by providing a period in which the display is paused near the vertical blanking period, and maintaining the potential difference between the data line and the timing line at 0 during the pause period. In addition to the above-mentioned examples, all liquid crystal matrix panels can be applied to scanning methods using double or quadruple timing lines, such as an upper and lower split electrode method or a double matrix method.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は液晶マ) IJソックスパネルの構成例、第2
図はその駆動波形、第3図、第4図はラスタス、キャン
方式の信号例であり、V−Sは垂直同期信号、H−Sは
水平同期信号である。 第5図は本発明による駆動波形例であり、pとqは休止
期間、毒は表示期間であり、01〜amはタイミング線
の、Siはデータ線の信号波形である。又第6図は第5
図のデータ線の駆動波形を形成するブロック図であり、
電圧選択[0回路10〜16により構成される。 以  上 出願人 株式会社諏訪精工舎 代理人 弁理士 最上  務 −4・
Figure 1 shows an example of the configuration of an IJ sock panel (see Figure 2).
The figure shows the driving waveform, and FIGS. 3 and 4 show examples of signals for the raster and scan systems, where VS is a vertical synchronizing signal and H-S is a horizontal synchronizing signal. FIG. 5 shows an example of the driving waveform according to the present invention, in which p and q are the rest periods, poison is the display period, 01 to am are the signal waveforms of the timing line, and Si is the signal waveform of the data line. Also, Figure 6 is the 5th
It is a block diagram forming the drive waveform of the data line in the figure,
Voltage selection [0 is composed of circuits 10 to 16. Applicant Suwa Seikosha Co., Ltd. Agent Patent Attorney Tsutomu Mogami-4

Claims (1)

【特許請求の範囲】[Claims] (])  タイミング線により選択された画素に対しデ
ータ線により表示データを与えるマトリックス・ディス
プレイ・パネルにおいて、垂直帰線消去期間伺近に表示
体止期間を設け、前記休止期間中はタイミング線とデー
タ線を同一電位に保つことを特徴とするマトリックス・
ディスプレイ・パネルの駆動方式。
(]) In a matrix display panel in which display data is provided via a data line to a pixel selected by a timing line, a display stop period is provided near the vertical blanking period, and during the pause period, the timing line and data are A matrix characterized by keeping the lines at the same potential.
Display panel drive method.
JP14594282A 1982-08-23 1982-08-23 Driving system of matrix display panel Granted JPS5936486A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP14594282A JPS5936486A (en) 1982-08-23 1982-08-23 Driving system of matrix display panel
DE3329130A DE3329130C2 (en) 1982-08-23 1983-08-12 Method for controlling a matrix display board
GB08322095A GB2131217B (en) 1982-08-23 1983-08-17 Matrix display panel and method of driving the same
US06/524,621 US4604617A (en) 1982-08-23 1983-08-19 Driving system for a matrix display panel
HK889/87A HK88987A (en) 1982-08-23 1987-11-26 Matrix display panel and method of driving the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14594282A JPS5936486A (en) 1982-08-23 1982-08-23 Driving system of matrix display panel

Publications (2)

Publication Number Publication Date
JPS5936486A true JPS5936486A (en) 1984-02-28
JPS6343039B2 JPS6343039B2 (en) 1988-08-26

Family

ID=15396607

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14594282A Granted JPS5936486A (en) 1982-08-23 1982-08-23 Driving system of matrix display panel

Country Status (1)

Country Link
JP (1) JPS5936486A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07140442A (en) * 1994-07-11 1995-06-02 Oki Electric Ind Co Ltd Method for driving ldc matrix panel
KR19990042559A (en) * 1997-11-27 1999-06-15 구자홍 Method of driving a plasma display device
US10339889B2 (en) 2016-09-21 2019-07-02 Kabushiki Kaisha Toshiba Liquid crystal drive device and liquid crystal drive method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07140442A (en) * 1994-07-11 1995-06-02 Oki Electric Ind Co Ltd Method for driving ldc matrix panel
KR19990042559A (en) * 1997-11-27 1999-06-15 구자홍 Method of driving a plasma display device
US10339889B2 (en) 2016-09-21 2019-07-02 Kabushiki Kaisha Toshiba Liquid crystal drive device and liquid crystal drive method

Also Published As

Publication number Publication date
JPS6343039B2 (en) 1988-08-26

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