JPS5936628U - State change detection circuit - Google Patents

State change detection circuit

Info

Publication number
JPS5936628U
JPS5936628U JP13358082U JP13358082U JPS5936628U JP S5936628 U JPS5936628 U JP S5936628U JP 13358082 U JP13358082 U JP 13358082U JP 13358082 U JP13358082 U JP 13358082U JP S5936628 U JPS5936628 U JP S5936628U
Authority
JP
Japan
Prior art keywords
detection circuit
state change
change detection
input signal
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13358082U
Other languages
Japanese (ja)
Inventor
「かや」木 一仁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP13358082U priority Critical patent/JPS5936628U/en
Publication of JPS5936628U publication Critical patent/JPS5936628U/en
Pending legal-status Critical Current

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  • Manipulation Of Pulses (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図乃至第3図は本願考案の従来例を説明する図面で
あって、第1図乃至第2図は電気回路図を、第3図は第
1図の波形図を示す。第4図乃至第5図は本願考案の一
実施例を示し、第4図は電゛気回路図、第5図は波形図
を示す。 1・・・・・・エクスクル−シブオアゲート、2・・・
・・・積分回路、3・・・・・・抵抗、4・・・・・・
コンデンサー、Th・・・・・・エクスクル−シブオア
ゲートのスレシホールドレベル。
1 to 3 are drawings for explaining a conventional example of the present invention, in which FIGS. 1 to 2 show electric circuit diagrams, and FIG. 3 shows a waveform diagram of FIG. 1. 4 and 5 show an embodiment of the present invention, FIG. 4 shows an electrical circuit diagram, and FIG. 5 shows a waveform diagram. 1...exclusive or gate, 2...
...Integrator circuit, 3...Resistor, 4...
Capacitor, Th...Exclusive OR gate threshold level.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 2人力エクスクルーシブオアゲートの一方の入力端子に
は直接入力信号を加え、他の残りの入力端子には積分回
路を介して接続するようにして入力信号の立ち上り時と
立ち下がり時に夫々パルス信号を出力するうにした。こ
とを特徴とする状態変化検出回路。
A direct input signal is applied to one input terminal of the two-person exclusive OR gate, and the remaining input terminals are connected via an integrating circuit to output pulse signals at the rise and fall of the input signal, respectively. I decided to do it. A state change detection circuit characterized by:
JP13358082U 1982-08-31 1982-08-31 State change detection circuit Pending JPS5936628U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13358082U JPS5936628U (en) 1982-08-31 1982-08-31 State change detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13358082U JPS5936628U (en) 1982-08-31 1982-08-31 State change detection circuit

Publications (1)

Publication Number Publication Date
JPS5936628U true JPS5936628U (en) 1984-03-07

Family

ID=30301272

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13358082U Pending JPS5936628U (en) 1982-08-31 1982-08-31 State change detection circuit

Country Status (1)

Country Link
JP (1) JPS5936628U (en)

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