JPS5937699U

JPS5937699U - Relative signal level measuring device for analog signals

Info

Publication number: JPS5937699U
Application number: JP13066282U
Authority: JP
Inventors: 雅裕宮森
Original assignee: 日本電気ホームエレクトロニクス株式会社
Priority date: 1982-08-31
Filing date: 1982-08-31
Publication date: 1984-03-09
Also published as: JPH035990Y2

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は本考案の１実施例に係る、アナログ信号の相対
信号レベル測定装置のブロック図である。１．１′・・・・・・サンプル＆ホールド回路、２・・
・・・・発振器、３．３′・・・・・・Ｖ／ｆ変換回路
、４・・・・・・基準パルス数入力装置、５・・・・・
・基準パルスカウンタ、６・・・・・・デコーダ、７・
・・・・・プログラマブル分周カウンタ、８．　８’・
・・・・・ゲート回路、９．１０・・・・・・レジスタ
、１１・・・・・・表示装置。FIG. 1 is a block diagram of a relative signal level measuring device for analog signals according to an embodiment of the present invention. 1.1'...Sample & hold circuit, 2...
...Oscillator, 3.3'...V/f conversion circuit, 4...Reference pulse number input device, 5...
・Reference pulse counter, 6... Decoder, 7.
...Programmable dividing counter, 8. 8'・
...Gate circuit, 9.10...Register, 11...Display device.

Claims

[Scope of utility model registration request]

, a first voltage/frequency conversion circuit that samples a reference analog signal at a predetermined sampling rate, holds it, and converts it into a frequency; a second voltage/frequency conversion circuit that samples, holds, and converts into a frequency;
a counter that counts the number of output pulses of the voltage/frequency conversion circuit until it matches a predetermined reference value; and a counter that counts the number of output pulses of the voltage/frequency conversion circuit until it matches a predetermined reference value, and displays the reference value as an m×10p (m: positive integer not including zero, P: non-negative integer) index. The values of m and P when expressed as
a decoder that calculates the maximum number of input pulses; while the counter counts the output pulses of the first voltage/frequency conversion circuit, the output pulses of the second voltage/frequency conversion circuit are input; a programmable frequency dividing counter that outputs the number m' of pulses obtained by dividing the frequency of the analog signal by the value of m, and the relative signal level m'×10− of the analog signal under test with respect to the reference analog signal.
A relative signal level measuring device for an analog signal, characterized in that it calculates p.