JPS5939084A - Mounting structure for optical integrated circuit - Google Patents

Mounting structure for optical integrated circuit

Info

Publication number
JPS5939084A
JPS5939084A JP14893182A JP14893182A JPS5939084A JP S5939084 A JPS5939084 A JP S5939084A JP 14893182 A JP14893182 A JP 14893182A JP 14893182 A JP14893182 A JP 14893182A JP S5939084 A JPS5939084 A JP S5939084A
Authority
JP
Japan
Prior art keywords
chip
integrated circuit
optical integrated
fiber
fiber array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14893182A
Other languages
Japanese (ja)
Inventor
Tadashi Okiyama
沖山 正
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14893182A priority Critical patent/JPS5939084A/en
Publication of JPS5939084A publication Critical patent/JPS5939084A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4202Packages, e.g. shape, construction, internal or external details for coupling an active element with fibres without intermediate optical elements, e.g. fibres with plane ends, fibres with shaped ends, bundles
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4204Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • G02B6/4214Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4246Bidirectionally operating package structures

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Optical Couplings Of Light Guides (AREA)
  • Optical Integrated Circuits (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To simplify the connecting process of input output fiber and chip by a method wherein a reflector converting the direction of emitting beam is provided on a ceramic substrate to contain and hold the input output fiber arrays almost vertically in the fiber array connecting blocks. CONSTITUTION:An optical integrated circuit chip 1 is contained in a hollow space of the ceramic substrate 10. The part 11 opposing to the light emitting part 3 of the chip 1 is mirror ground into the gradient almost 45 deg. to be chrome plated forming a reflector of emitting beam. The input output fiber arrays 4', 5' are contained and held in the fiber array connecting blocks 13, 14 of the ceramic block 12 blazed at both side of the base. The fiber ends are respectively opposing to a light receiving part 2 of the chip 1 and the reflector 11 of the substrate 10 making a little gap 15 therebetween.

Description

【発明の詳細な説明】 fa+81発明術分野 本発明は光集積回路チップに入出カフアイバーアレーを
効率よく結合させる実装構成の改良に関す。魁・ (b)技術の背景 半導体レーザ、受光ダイオード、および伝送損失の著し
く小さい光ファイバーの開発は、所謂オプトエレクトニ
クスを飛躍的に進歩させ、大きい伝送容量、外界より静
電的、電磁的影響を受けない利点と相俟って既に光通信
技術は実用化に入り、年々その需要は増大しつつある。
DETAILED DESCRIPTION OF THE INVENTION fa+81 Field of the Invention The present invention relates to an improvement in a mounting structure for efficiently coupling input and output cuff fiber arrays to an optical integrated circuit chip. Kai・ (b) Technology background The development of semiconductor lasers, photodiodes, and optical fibers with extremely low transmission loss has led to dramatic advances in so-called optoelectronics, and has enabled large transmission capacity and resistance to electrostatic and electromagnetic influences from the outside world. Optical communication technology has already entered practical use, and the demand for it is increasing year by year.

この増大する需要に応え、既述光部品の改良、小型化、
ひいては構成機器の小型化と高信頼性のため所謂光集積
回路チップの開発も進み、これに入出カフアイバーアレ
ーを結合させる構成が実用化されつつある。
In response to this increasing demand, improvements and miniaturization of the optical components mentioned above,
Furthermore, the development of so-called optical integrated circuit chips has progressed in order to reduce the size and reliability of component devices, and structures in which input and output cuff fiber arrays are coupled to these chips are being put into practical use.

半導体レーザ、受光ダイオードの構成には現在GaAs
系半導体が最も広く使用されており、その生産過程より
半導体レーザ、即ら発光部は結晶の成長方向に直角、従
ってチップの側端面に形−成され、−力受光ダイオ〜l
゛、即ち受光部は千ノブ上面に形成される。
GaAs is currently used in the configuration of semiconductor lasers and photodiodes.
Based on the production process, the semiconductor laser, i.e., the light emitting part, is formed perpendicular to the crystal growth direction, and therefore on the side end face of the chip.
That is, the light receiving part is formed on the top surface of the knob.

第1図(イ)はこの状況を模型的に斜視図を以て示すも
ので1はチップ、2は受光部列、3は発光部列を示す。
FIG. 1(A) schematically shows this situation in a perspective view, where 1 is a chip, 2 is a light receiving section array, and 3 is a light emitting section array.

チップには勿論その化トランジスター、ダイオードが形
成され、表面にはコンデンサー、抵抗および相互接続の
配線パターンが作成されること一般の集積回路と同様で
ある。
Of course, transistors and diodes are formed on the chip, and wiring patterns for capacitors, resistors, and interconnections are formed on the surface, similar to a general integrated circuit.

これに入出カフアイバーアレーを夫々受光部列2と発光
部列3とに結合させて一体化し、外部より電源を供給す
るだけで、例えば光通信用中継器として動作する光集積
化回路が得られる。
By combining the input and output cuff fiber arrays with the light receiving section row 2 and the light emitting section row 3, respectively, and simply supplying power from the outside, an optical integrated circuit that operates as a repeater for optical communications, for example, can be obtained. .

fcl従来技術と問題点 第1図(ロ)は上記入出カフアイバーアレー4゜5と受
光部列2と発光部列3との従来の結合を側面略図で示す
もので、同一水平方向にファイバーアレー4.5を配設
するために入力ファイバーアレー4の端部に反射面6を
形成させている。
fcl Prior Art and Problems Figure 1 (b) is a schematic side view showing the conventional combination of the input and output cuff fiber array 4°5, the light receiving section row 2, and the light emitting section row 3, in which the fibers are connected in the same horizontal direction. A reflective surface 6 is formed at the end of the input fiber array 4 for arranging the array 4.5.

このような構成では細かいファイバーアレー4の端部に
正確な反射面6を形成することは容易ではなく、更に入
力部、出力部2開所において位置合せ調整を必要とし、
組立工数が著しく大きくなる。
With such a configuration, it is not easy to form an accurate reflective surface 6 at the end of the fine fiber array 4, and furthermore, alignment adjustment is required at the openings of the input section and the output section 2.
Assembly man-hours significantly increase.

fd1発明の目的 本発明は上記欠点を除去した新規なこの種、光集積回路
実装構造を提供することをその目的とする。
fd1 OBJECTS OF THE INVENTION It is an object of the present invention to provide a new type of optical integrated circuit mounting structure which eliminates the above-mentioned drawbacks.

te)発明の構成 上記本発明の目的は出射ビーム方向を転換する反射面を
発光部面前に備える光集積回路チップを収容するセラミ
ック基板と、該基板上に配設される入出カフアイバーア
レーを略垂直に収容保持するファイバーアレー結合部よ
りなる本発明による構成によって達成される。
te) Structure of the Invention The object of the present invention is to provide a ceramic substrate accommodating an optical integrated circuit chip having a reflective surface for changing the direction of an emitted beam in front of a light emitting part, and an input/output cuff fiber array disposed on the substrate. This is achieved by an arrangement according to the invention consisting of a vertically housed fiber array coupling.

チップを収容するセラミック基板の発光部面前に正確な
反射面を備えるには、該当斜面に鏡面研摩を施した上、
例えばクローム鍍金して得られ、この工程はファイバー
アレーの先端に反射面を形成するより遥かに容易かつ正
確に実行できる。
In order to provide an accurate reflective surface in front of the light emitting part of the ceramic substrate that houses the chip, the corresponding slope is mirror polished and then
For example, it can be obtained by plating with chrome, a process that is much easier and more accurate than forming reflective surfaces on the tips of fiber arrays.

又入出カフアイバーアレーを略垂直に収容保持するファ
イバーアレー結合部を使用し、該結合部をチップを収容
するセラミック基板上に出射ビーム出力、入力ヒーム出
力を測定しつつ最高感度位置で例えば鑞付けによって結
合させることによって一挙に組み立てを完了させること
ができる。
In addition, a fiber array coupling part that accommodates and holds the input and output cuff fiber arrays approximately vertically is used, and the coupling part is soldered, for example, to the ceramic substrate housing the chip at the highest sensitivity position while measuring the output beam output and input beam output. The assembly can be completed in one go by combining the parts.

(f1発、明の実施例 以下図面に示す本発明の実施例により本発明の要旨を具
体的に説明する。全図を通じ同一符号は同一対象物を示
す。
(Embodiments of the invention from f1) The gist of the present invention will be specifically explained below with reference to embodiments of the present invention shown in the drawings. The same reference numerals indicate the same objects throughout the drawings.

第2図(イ)は一実施例の要部斜視図、同図(ロ)は同
図(イ)のA−、A側断面図を示す。
FIG. 2(A) is a perspective view of a main part of one embodiment, and FIG. 2(B) is a sectional view taken along the line A and A in FIG.

光集積回路チップ1は底面を銅よりなるヒートシンク7
上に接着剤8により固定されて表面に所定配線パターン
9を備えたセラミック基板1oの中空部に収容されてい
る。該中空部内壁のチップIの発光部3に対向する部分
11は略45°の斜面に鏡面6Jf摩された上クローム
めっきが施されて出射ビームの反射面を形成している。
The optical integrated circuit chip 1 has a heat sink 7 made of copper on the bottom surface.
It is housed in a hollow part of a ceramic substrate 1o which is fixed with an adhesive 8 and has a predetermined wiring pattern 9 on its surface. A portion 11 of the inner wall of the hollow portion facing the light emitting portion 3 of the chip I has a mirror surface 6Jf polished to an approximately 45° slope and is plated with chrome to form a reflection surface for the emitted beam.

一方入出力フアイバーアレー4″、5゛は底面両側に鑞
付は用めっきを施したセラミックブロック12のファイ
バーアレー結合ブロック13.14に収容固定され、夫
々のファイバ一端面を僅少な間隙15を隔てて、夫々チ
ップ1の受光部2、および基板10の内壁反射面11と
対向している。
On the other hand, the input/output fiber arrays 4'' and 5'' are housed and fixed in fiber array coupling blocks 13 and 14 of the ceramic block 12, which are brazed and plated on both sides of the bottom surface, and one end surface of each fiber is separated by a small gap 15. They face the light receiving section 2 of the chip 1 and the inner wall reflective surface 11 of the substrate 10, respectively.

セラミックブロック12ばその底板の下面両側において
セラミック基板1oと半田15により鑞付り固定されて
いる。この際治工具を使用し、半田15の熔融中、デツ
プ1を動作状態として出射ヒーム出力、入力ビーム出力
を測定っつ最高感度位置で冷却固定させる。
The ceramic block 12 is fixed to the ceramic substrate 1o by solder 15 on both sides of the lower surface of the bottom plate thereof. At this time, a jig is used to set the depth 1 in an operating state while the solder 15 is melting, and cool and fix it at the highest sensitivity position while measuring the output beam output and the input beam output.

第2図(ハ)に要部側断面図で示す他の実施例では、セ
ラミック基板1oの内壁反射面11には半球状レンズ1
6が設りられ、出力ファイバーアレ−5゛端面に出射ビ
ームを収束せしめて出方感度を向上させている。
In another embodiment shown in a side sectional view of the main part in FIG. 2(c), a hemispherical lens 1
6 is provided to improve the output sensitivity by converging the output beam on the end face of the output fiber array 5.

又この半球状レンズ16に代り、第2図(ニ)には結合
部13.14の先端に球形レンズ17.18を設は光結
合効率の改善をはかった別の実施例が要部側断面図で示
されている。
In addition, in place of the hemispherical lens 16, FIG. 2(d) shows another embodiment in which a spherical lens 17.18 is provided at the tip of the coupling portion 13.14 in order to improve the optical coupling efficiency. Shown in the figure.

(g+発明の詳細 な説明のように本発明による光集積回路実装においては
入出カフアイバーとチップとの結合工程を簡易化する著
しい効果を備えている。
(g+ As described in the detailed description of the invention, the optical integrated circuit mounting according to the present invention has a remarkable effect of simplifying the process of connecting the input/output cuff fibers and the chip.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は光集積回路チップ(伺と入出刃ファイバーアレ
ーとの従来の結合実装構造(ロ)の−例を、第2図は本
発明の一実施例の要部斜視図(図において1は光集積回
路チップ、2,3は夫々そ老受光部および発光部、4.
4″、  5. 5’は夫々入力、出力ファイバーアレ
ー、7はヒートシンク、10はセラミック基板、11は
反射面、12はセラミックブロック、13. 14はフ
ァイバーアレー結合部を示す。 孫1図 (イン (Δ)
Fig. 1 shows an example of a conventional coupling mounting structure (b) between an optical integrated circuit chip (in-board and an input/output fiber array), and Fig. 2 is a perspective view of a main part of an embodiment of the present invention (in the figure, 1 is 4. an optical integrated circuit chip; 2 and 3 are respectively a photoreceiver section and a light emitting section;
4'', 5. 5' are input and output fiber arrays, 7 is a heat sink, 10 is a ceramic substrate, 11 is a reflective surface, 12 is a ceramic block, 13. 14 is a fiber array coupling part. (Δ)

Claims (1)

【特許請求の範囲】[Claims] 出射ビーム方向を転換する反射面を発光部直前に備える
光集積回路チップを収容するセラミック基板と、該基板
上に配設される入出力ファーイパーアレーを略垂直に収
容保持するファイバーアレー結合部よりなることを特徴
とする光集積回路実装構造。
A ceramic substrate that houses an optical integrated circuit chip that has a reflective surface for changing the direction of the emitted beam just in front of the light emitting section, and a fiber array coupling section that houses and holds an input/output fiber array disposed on the substrate in a substantially vertical manner. An optical integrated circuit mounting structure characterized by:
JP14893182A 1982-08-27 1982-08-27 Mounting structure for optical integrated circuit Pending JPS5939084A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14893182A JPS5939084A (en) 1982-08-27 1982-08-27 Mounting structure for optical integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14893182A JPS5939084A (en) 1982-08-27 1982-08-27 Mounting structure for optical integrated circuit

Publications (1)

Publication Number Publication Date
JPS5939084A true JPS5939084A (en) 1984-03-03

Family

ID=15463858

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14893182A Pending JPS5939084A (en) 1982-08-27 1982-08-27 Mounting structure for optical integrated circuit

Country Status (1)

Country Link
JP (1) JPS5939084A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61148009U (en) * 1985-03-06 1986-09-12
FR2592744A1 (en) * 1986-01-06 1987-07-10 Ferraz DEVICE FOR DETECTING THE WEAR THRESHOLD OF ELECTRICAL CONTACTS OF THE FRICTION TYPE
JPS62215909A (en) * 1986-03-17 1987-09-22 Nec Corp Parallel optical signal processing semiconductor element
JPS6337307A (en) * 1986-08-01 1988-02-18 Derufuai:Kk Constitution of optical fiber connector
JPS63173021U (en) * 1987-05-01 1988-11-10
JPH02920U (en) * 1988-06-14 1990-01-08
JPH026421U (en) * 1988-06-27 1990-01-17
JPH0229217U (en) * 1988-08-13 1990-02-26
JPH0675111U (en) * 1993-11-16 1994-10-25 セイレイ工業株式会社 Residual structure of root of foliage processor
JPH0675112U (en) * 1993-11-16 1994-10-25 セイレイ工業株式会社 Structure for improving straightness of foliage processing machine

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61148009U (en) * 1985-03-06 1986-09-12
FR2592744A1 (en) * 1986-01-06 1987-07-10 Ferraz DEVICE FOR DETECTING THE WEAR THRESHOLD OF ELECTRICAL CONTACTS OF THE FRICTION TYPE
EP0232209A1 (en) * 1986-01-06 1987-08-12 FERRAZ Société Anonyme Detection device for wear threshold of friction-type electrical contacts
JPS62215909A (en) * 1986-03-17 1987-09-22 Nec Corp Parallel optical signal processing semiconductor element
JPS6337307A (en) * 1986-08-01 1988-02-18 Derufuai:Kk Constitution of optical fiber connector
JPS63173021U (en) * 1987-05-01 1988-11-10
JPH02920U (en) * 1988-06-14 1990-01-08
JPH026421U (en) * 1988-06-27 1990-01-17
JPH0229217U (en) * 1988-08-13 1990-02-26
JPH0675111U (en) * 1993-11-16 1994-10-25 セイレイ工業株式会社 Residual structure of root of foliage processor
JPH0675112U (en) * 1993-11-16 1994-10-25 セイレイ工業株式会社 Structure for improving straightness of foliage processing machine

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