JPS595290A - Automatic rhythm performer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an autorhythm performance device that can provide a greater variety of rhythm autovariations without increasing the number of rhythm 71-1 to variation in selection switches compared to conventional devices.

In conventional autorhythm performance devices, for example, there are rhythm autovariation devices that automatically change the rhythm of one measure every 4.8 or 16 measures. , this conventional autorhythm performance device is equipped with a switch for selecting the type of variation from 1 to 1, but the pattern content of the changing measures is 4, 8/16 measures. It is the same regardless of the selection, and depending on the switch, you can only select the bar where the Vari 1-sine occurs, that is, the change period of the rhythm, from 4.8 or 16 bars. When a switch is pressed, there is no choice but to enable only one change period determined by the switch with the highest priority according to the preset priority among the pressed switches.There are 8 automatic variations. Even so, the rhythm was relatively monotonous.

In view of the problems with the conventional type described above, this invention
- In the M.Rhythm calculator, Rhythm A-1-Barry 1-John selection, Yip (-e.g. 4.8 and 16
When the change period of each measure is selected individually, each change measure has a unique rhythm pattern, and if multiple switches are pressed, the variations selected by these switches can be combined. Based on the idea that each variation measure should be particularly pronounced, especially when multiple variation selection switches are pressed,
The purpose is to make the rhythm more varied than before and to alleviate the monotony of autorhythm. In order to achieve this object, the J-1-LIST 18 rendition device of the present invention has a pattern method in which one normal pattern and a plurality of variation patterns are stored. dynamic successive means for reading out the normal pattern and the variation pattern while automatically progressing sequentially at a predetermined tempo; a selection switch, and a pattern selection means for replacing and outputting the variation pattern related to the variation selected by pressing one or more of the switches with the normal pattern for a certain period of time. The present invention is characterized by comprising a rhythm sound source that generates rhythm sounds according to the rhythm pattern output by the selection means.

A detailed explanation of the present invention will be given below using the drawings.

FIG. 1 is a 1-block diagram showing the general structure of a Δ-trism playing device according to an embodiment of the present invention.

In the figure, the clock oscillator 1 consists of a variable frequency oscillator, and the period of the tempo clock TCL generated by the oscillator 1 determines the tempo of the rhythm generated by the A-triz l\ performance device in Figure 1. is determined. The beat counter 2 sequentially uses the tempo clock TCL to address the h run 1 - lever run l - 1 direct C pattern me (su 3).
A beat signal 11N is output for each predetermined callan value. The bar counter 4 counts the bar signal 11N and outputs a bar signal SYO every 3 or 4 beats depending on whether the selected rhythm is 3 beats or 4 beats. Pattern menu [Niri 3 has 1g normal pattern and 3111 for each rhythm.
The iJ variation pattern is stored in a3, and the rhythm selection switch f5 selects J! Koris 110
Normal pattern a3 J, 3 B1 symbol patterns are read out sequentially according to the address specified by the count value of 9 beat counter 2.
,B.

C, ]] respectively. Now, the lowest pitch 1 of the output SYO of the measure counter 4 is added to the highest pitch I and 1 (A 1) to the output of the beat counter 2, and the rhythm pattern stored in the pattern memory is a 2-measure pattern C. The generating circuit 6 generates the measure signal SYO generated by the measure counter 4.
Output by clicking 1~? 4.4 P, 8 P and 1
4.8 or 16 as shown in Figure 2 for each of the 6P.
The variation selection switch circuit 7 generates a ``1'' level signal for one bar 11'' at a bar period.
To select Barry ■, - John every 16 bars
One end is connected to level "1", and the other end is connected to AND circuit 7b,
It includes switches 7B and 70.7D connected to one input terminal of each of switches 7c and 7d. AND circuit 7b
-A's other end of the horn is 4/8/'1G
Output terminals 4P and 8P of the bar signal generation circuit 6.

161] and is connected to C. Therefore, when the switch 7B is pressed, the output of the AND circuit 7b will be at the "1" level for one bar every fourth bar, and when the switch 7C is pressed, the output of the AND circuit 7b will be at the "1" level for one bar every fourth bar.
When the output of D circuit 7C is at "1" level for 1 bar every 8 bars, when switch 7D is pressed, △Nl)Circuit 7
(The output of 1 becomes i+ 1 ++ level at the 16th bar: 1 small ff1j. The priority circuit 8 outputs -C at each time point.
A book that specifies the rhythm pattern that should occur, in Paris.
Specify which rhythm pattern to select for each of the 1st to 16th measures of the rhythm when none of the rhythm selection switches 78-D are pressed or when one or more switches are pressed. do. The pattern selector 9 selects and outputs one of the input signals to the input terminals A to D that is specified by the level input to the specified person horn terminals 5A to 3D. The operation of 9 is as follows.

For example, when switch 7B is pressed,
7. Measures 9-11 and J: and 13-15 are AND circuit 7b
-d outputs are all “'Q”r, so these three
The logical product after the inversion of the two outputs, that is, the output of the △ND circuit 8a, the designated input terminal SA becomes 1'', the selector 9 outputs the normal pattern input to the A terminal, and the fourth...
8. 12. At the 16th measure, the output of the AND circuit 81) and the designated input terminal SB become 1'', and the filler 9 outputs the variation pattern 1 input to the B terminal.

Further, when switches 7B and 7D are pressed, the first to
From 3.5 to 7.9 to 11 and 13 ・For the 15th measure, the normal pattern is selected as described above, and for the 4th, 8th, and 12th measures, the variation pattern 1 is selected, but the 16th
For the measure, the output of the AND circuit 7d and therefore only the designated input terminal SD is 1'', so variation pattern 3 input to the D terminal is selected and output.Switch 7 is shown in FIG.
B only (1), switch 7C only (2), switch 7D
Only (3) 33 and switch 78. 7C, 71) The state of the rhythm pattern selected for each measure in each case when all (4) is pressed is shown.

In the figure, . is a normal pattern, ◯ is a variation pattern 1, mouth is a variation pattern 2, and Δ is a variation pattern 3F.

As can be seen from the block diagram of FIG. 1 and the rhythm pattern diagram of FIG. In the measure where the variation pattern is longer, priority is given to the variation pattern with the longer variation period.

The percussion instrument sound of the rhythm pattern selected with selector 9 is
Well-known rhythm sound source circuit '10 and round system 1
It is pronounced via 1. Note that the pattern memory 3 also stores an auto chord pattern and an A-to bass pattern at the same time. Specified - C: 1 - Doro and base blind are pronounced in a predetermined pattern through the round system 11.

(Explanation of overall configuration of another embodiment) FIG. 4 shows the overall configuration of an electronic musical instrument according to another embodiment of the present invention. In the same figure (the keyboard 21 is shown in the figure, there are 6 upper keyboards (UK), lower keyboards (LK), and beta keyboards (PK).
) etc., and generates key information according to the player's key presses.

The panel 22 includes a musical tone selection operator 23 and a rhythm operator 2.
4, and generates operator information such as musical tone selection and rhythm type selection. The control unit 30 scans the keyboard 21 and panel 22, captures the generated key information and operator information, and based on these information,
Generates various control data related to board sounds and rhythm sounds.

The keyboard sound forming circuit 65 inputs data related to the keyboard sound from the control section 30 and outputs data on a plurality of time-division channels [121 in 7 channels].
1? It forms sound data and outputs a keyboard sound signal by time-division multiplexing these data. The rhythm sound forming circuit 70 is
Data regarding the rhythm l'a M from the control section 30 is inputted to generate iJ instrument sound signals for each of the eight time-division channels, and a rhythm sound signal obtained by time-division multiplexing these percussion instrument sound signals is output. The register 90 performs data for all channels included in the keyboard sound signal and the rhythm sound signal, and outputs each keyboard sound and each percussion instrument sound as a post-musical sound signal which is acoustically mixed. This musical tone signal is sent to a digital input 1 sound system 95 including a D/A converter 92, a TFJ amplifier 93A3, and a speaker 94.
Converted to f4 Hibiki and Mitsuoto Riru.

(1) Rhythm Operators 24 FIG. 5 shows the arrangement of the 834 rhythm operators 24 on the panel 22. In the same figure (A-1 ~ Burr work selection switch 25 (25-1° 25-2.2
5-3) Is the rhythm change layer WJ? l that is Δ-1~
Switch C, which selects the number of bars in which variations are inserted, switches 25-1 to select automatic variations with a rhythm change period of 4 bars (hereinafter referred to as 4bar, 8 bars, 1 bar).
The switches 25-2 and 25-3, which are used to select B bar and 161+ar, correspond to switch 7B in FIG. 1, respectively. This corresponds to switches 7C and 7D in FIG. In addition, in the electronic musical instrument shown in FIG. 4, when multiple of these auto variation selection switches 25-1 to 25-3 are pressed, the variation pattern with the longest cycle is selected as shown in FIG. 3 when multiple variations exist. to generate a Balinese rhythm.

Rhythm selection switch 26 (26-1, 26-2,...
・) is used to select a rhythm type such as march or waltz.

The start/stop switch 27 controls the start and stop of the rhythm.

The tempo setter 28 is for setting the tempo and is connected to a multi-stage digital switch or variable resistor and Δ, / (
) converter, etc., and generates digital tempo data at the set position.

1~-Talporium 29 is for adjusting the volume of rhythm sounds,
It has the same structure as the tempo setter 28, and generates panel level data corresponding to the setting position.

(2) Control unit 30 In FIG. 4, the control unit 30 is a central processing unit ( CPLJ)31
, program memory 32, working memory 33, rhythm pattern memory 34, pattern start address memory 3
5. Pass line 36, key switch interface, -face 37, panel interface 38, key tone interface 39, rhythm interface 40 and panel data interface 41 are excluded.

The program memory 32 is a one-ready memory (ROM) in which control programs for the CPU 31 are stored. Working memory 33 is random knockless memory (
A working memory (RAM) is provided in a part thereof for temporarily storing various data generated when the CPU 31 executes a control program. This working area consists of registers or flags as shown in Table 1. In addition, in the following explanation, the contents of each register etc. in J3 will be expressed using the same symbols as these register caps. For example, the contents of the beat number register and the divisor register are (pHKP["'c indicated.

Table 1 Label Capacity Contents (bytes) TEMPO1 Tempo data register TO'1l-EV 1 Volume data register Rl-
I Y P T N 1 Rhythm type register 5W
AVΔR171-1-Paris John type register P CHN GF 1 Pattern change flag 1-
I K P E 1 Beat number (0 to 3) register RHYRUN 1 Rhythm run flag RHLI L N D 1 Beat 1 pulse RHP
N T 1 Pattern repointer TMPM
AX 1 Maximum timing (35 or 47) register RD I S P F 1 Beat/measure up flag TMPCNT 1 Intra-beat timing (to 0/11)
TIMIN, 0 1 Intra-measure timing (0 to 35,
0 to 47) Counter S Y O N -1' 1 Measure counter ゝVARITOLG '1 Variation norag RI
IYROM 1 Squirrel 11 pattern start address register Ni2OM 1 Normal pattern start address register Denvota register TEMP'O, wealth! Data register OT, 1-EV, rhythm type register R1-IY
l]TN and J-1-Variation type register SWΔVRR respectively have the 7-key setter 28.1-1 of the rhythm operator 22, the tarborium 29, the rhythm selection switch 26, and the A-1-variation 1- Operator information of the version selection switch 25 is stored.

The rhythm pattern memory 34 is composed of a ROM, and stores one normal pattern and three variation patterns for each type of rhythm such as march, waltz, etc., as shown in Figure 6 (a). Each of these patterns has an instrument group pick-up IG at the start address, as shown in the enlarged view in Figure 6(l)).
N is followed by J3 L at the timing within each beat of C. Event data E V -r J3 and beat end data B111
l-OD J (hereinafter referred to as 1″$OD+) in hexadecimal notation, and finally the return data RTN ($
OF) is stored. Here, the instrument is a percussion instrument that is formed by extracting 8 types of percussion/instrument sounds to generate each rhythm sound into a rhythm sound generation circuit. For each group, the percussion instruments forming the group are assigned to each sound source forming channel. By studying the concept of Insu 1~Ramen 1~Group, this electronic musical instrument can perform ft regardless of the rhythm type.
It is possible to generate an autorhythm consisting of eight types of percussion instrument sounds. By the way, the conventional 71. - In the trirhythm performance device - C, the percussion instrument used for all rhythm sounds has the number of sound source forming channels, for example 8#! In Class J and C, the number of percussion instruments used for each rhythm type is usually less than the number of sound source forming channels, but according to this embodiment, for example, eight desired types can be used for each rhythm type, and any number of percussion instruments can be used for all rhythm types. It is also easy to form rhythm sounds using percussion sounds. This electronic musical instrument has one beat, or 1/12 of a beat.
The rhythm pattern memory 34 stores event data EV T in the order of the number of beats at which the event occurs and the timing within the 12 beats. This event data EVT is 8 as shown in FIG. 6(C).
Using 2 bytes of memory that takes 1 byte of bits]- (in the lower 4 bits of the 1st byte 1- (to the 4th to 1st bits), the in-beat timing lil1MING overturns the occurrence of event 1~,
Sound source formation on 7th to 5th pitch 1- tunnel number CHNo.
, Top 4 picks 1 to 2nd buy 1~ (8th to 5th picks h)
The pitch PI of the percussion instrument sound that occurs within the beat of
TCH, 4th pitch 1-1J Sudein 7'-ta S/L
And in the 3rd to 1st bits, the level of the percussion instrument note on the musical note LEVEL-! In other words, data indicating whether the level of the percussion instrument sound generated at each timing is from A fultissimo ([") to pianissimo (pp) is stored. Beat end data B [ is the boundary between the beat and the beat. , and the return data RTN indicates the end of the rhythm pattern.Also, these beat 1nd data and return data indicate that there is no event within the beat after the within-beat timing indicated by the own event f-even. Show that.

The pattern start address memory 35 stores the start addresses of the normal patterns and parison patterns of each rhythm in the rhythm pattern memory 31 (), and the contents of the rhythm type register R11Y
This is a conversion ROM that outputs the start addresses of normal and variation patterns in response to input of P T N.

The pass line 36 consists of a data bus (DB) and an address bus (ADB), and is connected to the CPLJ 31 and each memory 32.
~35 and each interface 37~/11 are connected. CPU 31 and these memories 32...35
, and interfaces 37 . . . 41 (data is exchanged via the real path line 36).

Rhythm interface 40 temporarily stores the rhythm sound source data output by 31, CI')U
31, the stored data is converted into serial data OPCI D along with buffer clear γ-Y, break set signals, etc., and rhythm sound generation circuit 7
0 or when the rhythm start signal from the CPU 31 is manually transmitted to J3 and thereafter every beat CPtJ.
An interrupt signal RINTRPT is generated to cause the data transfer process to be performed by the interrupt signal RINTRPT.

FIG. 7 shows a detailed block diagram of the rhythm interface 40. In the same figure, de]-g 42 is (';PLJ
31 (Fig. 4) sends an address signal to the address bus, the tempo register 43, rhythm sound source data register/
I4, channel register 45, and function register 4G, a load signal RHYD is sent to each register 43 to 46 according to the address signal.
r to C1/I/l! - Send. Therefore CPtJ3
1 sends out via the data bus D['3 - CP
LJ 31 is stored in the register specified by address j.

The tempo register 43 has a tempo data register TEMP.
Every time the contents of O are changed, new tempo data T E
M I) 0 is stored, and the tempo ROM 47 converts the tempo data TEMPO output from the tempo register 43 into brissera 1 to data PSD of the counter 48. When the load terminal LD, that is, the output of the OR1 circuit 49, is "i", the counter 48 transfers the data PSD to the precera 1, and then counts the clock signal φ of a constant frequency output from the clock generation circuit 50, and overflows. When 1" is output to output terminal CO
, this output is input to one input terminal of the OR circuit 49, and the counter 48 is overflowed l:l-? It is preset every time you turn on the screen. That is, if the overflow L1 value is N and the preset value is M, this counter 48 divides the frequency of the tarock signal φ by 1/(N-M) and sends it to the C tempo setter 28 (FIG. 5). Generates output at the set tempo. Note that this counter 48 outputs ``1'' to the terminal CO at the count value O after counting down the clock signal φ, and outputs the clock signal φ to 1.
/M, or other well-known variable frequency division type counters may be used. The other input terminal of the OR circuit 49 is connected to the start output terminal of the function register 46 (and also presets the counter 48 when the function register 46 generates a start signal 5TART, which will be described later). Furthermore, it is sent to CPtJ31 as an interrupt signal RINPPT,
The CPtJ 31 starts an interrupt processing operation, which will be described later, at the same time that the counter 48 is reset. The output of the clock generation circuit 50 is input to one input terminal of the OR circuit 51, and the output of the OR circuit 51 is input to the clock generation circuit 5.
Since the clock generating circuit 50 is connected to the 0 relay terminal, the clock generating circuit 50 is reset as soon as it generates an output, and therefore generates a short pulse width clock signal φ. Further, the start signal 5TART is input to the other input terminal of the OR circuit 51.

Therefore, when the start signal is generated, the counter 48 is reset and the clock generation circuit 50 is also reset.

Event data read from the rhythm pattern memory 34 by the CPU 31 (Fig. 4) [VT is 8-bit data with 3-bit level LEVEL, 1-bit sustain S/L, and 4-bit pitch PITCH. The channel number C)-INO is temporarily stored in the channel register 45.

The channel counter 52 repeatedly counts the channel timing signal Chl' from 0 to 7, and the comparator 5
3 compares the output of the channel counter 52 with the channel number CHNO output from the channel register 45, and when they match, sends out a channel match signal CHEQ via the AND circuit 54. The flipflop 55 receives the load signal R of the channel register 45.
It is set by ITI Y D E C3 and reset by the channel match signal CH[Q, where the channel match signal CH[Q is the comparator! ] 3 and the set output Q of the flip-flop 55, and outputs "C". An f'p channel matching signal CHEQ having a differential waveform is output. This channel matching signal CHEQ is input to the SB terminal of the selector 56.
Only when this digital channel match signal CHEQ is generated, it is stored in the rhythm sound source data register 44 in the 8-stage 8-bit Gino 1 register 57.
The input signal of VITI-P8 is Ll-coded. Also,
The channel matching signal CHEQ is stored in the 8 stage 1 pin 1- shift register 58 as a key-on signal KON, and is further stored in the 8 stage 1 bit shift register 59.
Inverted signal of the channel match signal CI-I E Q
Input I+ to clear the buffer clear signal. These Gino 1~Register 57. 58. 59 and channel counter 52 are both operated by the same busennel timing signal CIIT, the data stored in the rhythm J data register 44 is transferred to the channel register in synchronization with the channel timing of shift registers 57 to 59. It is loaded into the 1 fV channel corresponding to the Zhang Nelson channel CHN O in 45.

The function register 46 indicates that the output RHYDEC4 of the decoder 42 is “
1" CI) U 31 via the data bus DB. This data value is $
01, the register 46 is automatically cleared after a short 111 I+ pulse is sent as the start signal 5TART. Also, if the data value is $04 or $20
At the time of , the time buffer clear signal BU is outputted as serial output, etc., all the data for every 8 Runnels.
FCLR (at $04) or transfer signal T-
Outputs RANS (at $20) and automatically clears the rest. When the data value is $08 and $10, the break set signal C and break relay I-
Output Shingetsu. In addition, this break output]~・Relet 1~ signal is, for example, break output B Rl knee ΔK
may be set with "1" and reset with "Ooo".

In the P/S converter 60, the rhythm data stored in the shift register 57.5859 for each eight channels is input to the parallel data input horn terminals P1 to P11 in synchronization with the digital timing signal ChT. The channel timing signal CI+T is also input to the load terminal LD.Then, when the function register 46 generates the transfer signal TRANS, the P/S converter 60 In the section where the tunnel timing signal ChT is "'1",
The data of 11 is captured every runnel, and the captured data is sent to the rhythm generating circuit 70 as a clock signal φ゛C serial 7'-0PCIDAT during the period when the channel timing signal is O''. By repeating this process several times, data for all 8P channels is sent out.

(3) Panel γ-interface 41 Jj in Figure 4
The panel data interface 41
Intertone data TOTLEV read from the 1-1 talborium 29 of the rhythm operator 24 by the CPLI 31 or data obtained by logarithmically converting this, and the normal, paris, and 1-chicon rhythm instructors read from the rhythm pattern memory 34 by the CPLI 31 Menu 1 - group number IGN as serial data LVINT and P
It is converted into ANC[)[) and sent to the rhythm sound generation circuit 70.

(4> Rhythm sound generation circuit 70 Fig. 8 shows a detailed diagram of the rhythm sound generation circuit 70.
, selector 72.8 stage 8 bits 1~ shift register 73, S/[] conversion latch circuit 74, channel counter 75, musical instrument Pumba balance channel ROM 76
, a rhythm sound signal generation circuit 77, a cone bellow blur 1 generator 78, an S/'P conversion circuit 79, a level control circuit 80, and a P/S converter 81, and the rhythm interface 40 of the control section 30 (FIG. 4). and rhythm-related data serially sent from the panel data interface 41 PCIDAT, LVINT, PA
N CD D is input, a percussion instrument sound signal is generated in each of the eight verse-divided Bouyannelles, and this percussion instrument sound signal is converted into a time division multiplexed serial rhythm sound signal and transmitted.

This rhythm & generation circuit 70 overall beam II check signal φA8
The eight rhythm sound source formation tunnels are formed in a time-division manner for each period of the cock signal φ8B. These eight f's
One of the eight types of percussion instruments that make up the Rance I Lamento Clouzot are assigned to each of the 11 channels.

The s,'p converter 71 converts the serial data 0PCIDΔF transferred from the rhythm interface 40 (FIG. 4) into parallel data, temporarily stores it in the memory 81, and synchronizes with the channel counter 75 to convert the serial data 0PCIDΔF into parallel data. Output to output terminals 1-11...-1.

The selector 72 has a selector terminal SB of 1101 in the @ stage.
Since it is 1, a signal input to the input terminal Δ is output. The following C shift 1 register 73 receives the manually input signal 1.
The shift register 73 is stored in shift 1 sequentially for each MnφAB while cyclically
/' 4 knees A (i @
If K CI N occurs, the direct terminal S of the filter 72
Output end t)11 of S/P converter 71 where S is 1°'
1) A squirrel 1XPi source jitter that generates light at 4 is input. In this case, in order to match the channel with the rhythm interface 40 (FIG. 4) on the sending side, for example, the function register 46 (FIG. 7) 1 to transfer signal TI' (A N S) must be input to the channel of the channel counter 52. 0, the data from channel 0 to channel 7 must be transferred in order, and
In the input side rhythm l\ generation circuit 70, the output of the converter 71 is converted to SIP, and the output of the converter 71 is output to the channel 7B of the channel counter 75.The output of the output of the clock 5 or the system clock signal φA is output from the channel counter 75. [
] and skips C output.

The S,/P conversion latch circuit 74 receives each of the 4 bits 1 transferred from the panel data interface 41 (FIG. 4).
Convert the serial data PANCDD of 8 bits consisting of Ins 1 - Ramen 1 - Glue - Non-No-No-Ba IGN for the normal pattern and the variation 31 pattern into parallel data, and convert this parallel data into serial data PANCDD. It's a wrap that comes in. In addition, this S,.../P conversion latch circuit 74 receives the Break Sera 1~ and Reset 1~ signals inputted from the rhythm interface 40 (Fig. 4) through the output terminal []3 of the S, /P converter 71. Yo U let and reset 1
- When a break set signal is input and the break flag BRKFG is set, the instrument group number IGN on the variation side is output, and when a break hit signal is input, the break flag BRKFG is reset. Then, the instrument 1-group number IGN on the normal side is output.

The channel counter 75 receives the system clock signal φA.
B is counted and channel numbers 0 to 7 are output.

The instrument pick-up balance channel ROM 76 contains instrument numbers 1 to group, number IGN and channel number CI.
-When I NO is input, instrument pick-up I
This is a conversion ROM that outputs NO, that is, the instrument name.

The S/F' conversion circuit 79 is a panel interface, L-
Serial data such as the volume data TOTLEV outputted by the bus 41 is converted into VINT into parallel data.

The rhythm bass signal generation circuit 77 generates a C percussion type name waveform based on the instrument non-balance channel ROM 76 outputting the instrument non-balance channel ROM 76 and the shift register 73 outputting the bit data PITC)-1. As this rhythm sound signal generation circuit, a known waveform memory type or arithmetic type (b) can be used.

In case of waveform memory method, instrument pick-up INO
and the bit data PI'I'CI-1 specify the start node of the memory. In the case of the arithmetic method, the pips are determined and the constants for determining the timbre are set using the ins i to lament pick-up INO, and the pitch data PITCH is used to slightly modify the pitch.

The 1-envelope generator 78 attacks the -V--A signal KON generated at the output terminal P2 of the S/P converter 71 and generates the output signal (waveform determined by the waveform determined by the instrument number balance channel ROM 76) of the instrument number balance channel ROM 76. Envelope data of ``G wo light ii, ?j'ru.Also,
1 nosdin signal S/L from shift register 73 is 1
'', when T-beam [1-beam's rise is gentle, S
/l) When the buffer clear signal 8UFCLR is generated at the output terminal 1) 1 of the converter 71, the 1st channel [-1-Z] of all 81+ channels is immediately set to O, and the rhythm sound is danced.

The level control circuit 80 includes, for example, a multiplier, and includes source waveform data from the rhythm sound signal generation circuit 77, rhythm sound level data from the S/P conversion circuit 79, and level data 1 from the shift 1 register 73. ．． EV and S/
Rhythm level data from P converter 79 VINT,
In addition, the envelope data EG from the 1-busier generator 78 is calculated for each channel to generate a time division multiplexed parallel 1J musical instrument sound signal. This percussion sound signal is converted into a serial rhythm high signal by a P/'S converter 81, mixed with a keyboard sound by a register 90 in FIG. C is pronounced.

(Explanation of the operation of the electronic musical instrument shown in FIG. 4) Next, the operation of the electronic musical instrument shown in FIG. 4 will be explained with particular reference to the control section 30 with reference to frames L1-1 to FIGS. 9-14. Referring to FIG. 9, when the power is turned on to this electronic musical instrument, C)) LJ 31 is
Starts the C operation according to the control program stored in the
Sudetsub/100”).Sfutsub101 is CPU3
1. Working memory 33 and rhythm interface J-
Clear each register, flag, etc. such as bus/IO, initialize the entire C circuit, and scan each operator on the 12K keyboard 21, J, and panel 22 4 times, and select the changed operator. Detect J3 and its operator information.
This detection includes, for example, the operator information of each operator and each register TEMPO, TOTL, EV, R1-IYPIN.
, SWΔvAR, etc. If the exclusive OR of the previous control information stored in SWΔvAR, etc. is not O, it can be detected as control information change 1, that is, an event has occurred. The operator information C is, for example, the position of the 1-talporium 29 from O to 1.
It is expressed as digital data of 16 steps of 5, and this 1
-Evening remains as it is 1~-Talporium register TOTL[
Store it in an EV. A-Tobari J-John selection switch 2
For example, 4 for 5.

8. Each of the 16 bar variations in A-Tobari J
--Assigned to the 1st, 2.3rd bits of John type register 5WAVAR, switches 25-1 (4 measures), 25-2 (8 measures), and 25-3 degrees (16 measures)
one or more of them remain in the same state for a predetermined time (for example, 0.
When the switch is pressed for more than 5 seconds, the bit corresponding to the pressed switch is set, and the other pins 1 to 1 are reset.

In step 103, it is determined whether or not event l~ was detected in step 102, and if the event occurs, step 1
Return to step 02 to detect more events, and detect event 1.
~ If there is, perform processing according to the type of event detected in the subsequent step.

If the event 1~ detected in step 102 is a musical tone change caused by pressing or releasing a key or pressing the musical tone selection operator 23, the process proceeds to step 11.0. Step 1
In step 10, each key data or tone selection data is processed.
(Output to the key tone interface 39. The key tone interface 39 further sends these data to the keyboard tone forming circuit 65.

If the above event is a start command C from the start switch 27, the start command C is executed at step 120.
Rhythm run flag R11Y RU in Ningmetsu33
After setting N, the rhythm data is synchronized in step 121. This synchronization is performed by loading the data $01 into the function register 46 (FIG. 7) of the rhythm interface 40 and writing the star 1 into the function register 46.
This is done by generating a signal 5TART and resetting the counter 48 and the tempo clock generator 50 by this star 1 signal.
, an interrupt is applied to the CPU 31, and the CPU 31 transmits serial data OPC DAT related to the rhythm pitch to the rhythm sound generation circuit 70 via the rhythm interface 40 and panel data interface 41 by interrupt processing I NTR, P T2O0, which will be described later. ,LVINT,
Sends PANCDD etc.

When the event 1) in step 102 is triggered by the start/stop switch 27,
At step 130, data $04 is input to the function register 46 (FIG. 7) of the rhythm interface 40.
Doshi CC Buff 2F 99F No. 1 B U F OL R
After generating the shift I to register 59 (FIG. 7) to set the entire stage (eight tunnels worth) to 111 TI, roughly step 131 outputs the f-data transfer command, including clearing the buffer 1 of -. The rhythm data 0PCIDA is sent from the rhythm interface 40 to the rhythm sound generation circuit 70. The rhythm sound generation circuit 70 clears this buffer 1 (g
QB U F CL R by - L Nberobeji■
Clear the nerator 78 and dump the rhythm sound. In addition, the pattern change flag P CHN G F, rhythm run flag RHY shown in Table 1
Clear the rhythm-related registers and flags of (]HN with r.

Event I- in step 102 is the tempo setter 28
If there is a change in the tempo data T[:E Nq po o in the rhythm interface 40's i-impo register 43 (Fig. 7) at Sudetsu/140, [1-
do. This is stored in the -j- register 43:
The tempo data includes J, S and pitch C of one beat, that is, the tempo at which the rhythm pattern is read out is determined.

If the event 1- in step 102 is a change in the rhythmic sound path by the 1-1 tarborium 29, step 150 outputs the sound velocity data r O"I' L [V to the panel data interface 41. −
The panel interface 41 uses this panel level data T.
The OTLE V is converted into a serial rhythm level) LVINH and output to the C rhythm joint circuit 70.

When event 1~ in step 102 is a change in rhythm type R11YPTN by pressing the rhythm selection switch 26, rhythm 1~ shown in FIG. ．． Ttsubu・dokoro 1! ! Execute Rtl Y S E T I C30. In step 161, the rhythm run "knock Rl-I Y RUN" is checked, and if the rhythm is progressing, the pattern is changed in step 162.
After performing "G N I" from L tsu 1 to step 16
If the 1C rhythm progresses and there is no sound, the slur is 162.
1 nip and proceed to step 163. Step 1
62 'C-Pattern change flag CHNG [When the rhythm type changes in the middle of Squirrel 11, the previous rhythm sound is changed] In order to perform A-singdanzo, this pattern change flag is used during the next interrupt process. PC It N G
If F is set and C is present, buffer clear signal 13 U
[C to send CL R to the rhythm high formation circuit 70
be.

Step 163 Intra-measure timing counter TIMI
Referring to the contents of NG, set the number of beats in the beat number register to 1 if timing 1NM I N G is 0-11, 2 if 12-23, 3 if 24-35, 4 if 36-47. cover This is to make the rhythm after the change continue at the same timing as before the change, and in step 167 the pattern pointer P HP N T is placed at the address where the rhythm pattern data with the same number of beats and the same within-beat timing f is stored.
Used when setting. Step 164 T checks the rhythm run flag Rl-I Y RU N again, and if the rhythm is progressing, the beat end flag Rl-I is set in step 165.
Clear I N E N D 4. This means that if the beat 1nd flags RHLI E and N'D remain set, if the rhythm after the change has event data after the timing of the change, the reading of these event data will be skipped. Since C is put away, there is C (see step 401). Even in the rhythm after the change, the event occurs after the timing of the change] ~ If the data does not exist,
Rhythm Boink (R) - When playing I P NT, set the beat 1 ind flag RHI - I EN D. If the judgment in step 164 is that the rhythm is stopped, in step 132 during rhythm 1 to tsubu processing, °C beat 1.
Since the -end flag RI-11-IEND has already been cleared, step 165 is skipped and the process proceeds to step 166.

Step 166 is the content Rl- of the rhythm type register.
I Y P T N to start pattern address memory 35
Read the start addresses of the normal pattern and each variation pattern of the selected rhythm type, and write these start addresses to the respective start address registers NROMSV4ROMSV8ROM and V
16 ROM, and further allocates the contents of NROM to the rhythm pattern head address register Rl-I Y ROM. Step 167
4 sequentially from the leading address Rl-I Y ROM, and the read number of beat 1nd and intra-beat timing, beat number II K P [and intra-measure timing T I
The pattern pointer Rl- is compared with M I N G.
Spell I P N T from Sera 1. At step 168, the start address NROM is determined.

The input group pickup stored in the V4ROM, V8ROM, and Vl6ROM is read out and output to the panel y'-interface T-space 41. Panel data interface 1-41 c, L These instrument groove numbers rGN are for normal and variant versions (/ll+ar, 81ear).

16 bar) are converted into 4-bit old 8-bit serial signals PΔNCD'D, respectively.C rhythm sound generation circuit 7
Send to 0.

Step 169 Rhythm type R)-I Y PT N
It is determined whether it is a 3-beat or a 4-beat, and if it is a 3-beat, the suit knob 170 is set, and if it is a 4-beat, the maximum timing register TMPMΔX is set to 35 in step 171.
and 47 are recorded respectively.

After detecting event 1- in step 102r, after completing the processing in steps 110-172 for each type of event, the process returns to step 102 and detects a new event 1-.

As mentioned above, in the electronic musical instrument shown in Figure 4, star 1
- When the stop switch 27 is set to star 1 and the counter 48 is set to 1 of 1 beat according to the set tempo.
/12, that is, when 1 beat is counted, the rhythm interface 40 sends an interrupt signal RIN to the CPU 3i.
T P-r is sent out.

Therefore, the CPU 31 executes the interrupt process II'! of FIG. I N T R
Run PT200.

First, in step 201, each register, program counter, etc. are cleared so that it can return to any state even after the interrupt processing is completed, and then rhythm sound generation data output processing RHIRQ210 shown in FIG. 12 is executed.

Referring to FIG. 12, step 211'c checks the rhythm run flag Rl-I Y RU N to determine whether or not the rhythm is in progress. If this judgment is 1-no-1-4, and the rhythm is stopped, there is no need to output the rhythm sound, so step 260 (FIG. 11) is performed directly.
5, the interrupt is canceled and the original routine is returned. If the rhythm is in progress in step 21, the pattern change flag is checked in step 212, and if the pattern change flag is set, this is the first data output after changing the rhythm or switching between normal and break, so step 213 And rhythm interface [-s 40 buff? Send clear BUFCLR signal.

This buffer clear signal is transferred to the rhythm sound generation circuit 70 in step 239, which will be described later, and the rhythm sound generation circuit 70 clears the encoder 78 from the envelope 11 to clear the previous rhythm sound.

Next, in step 21/I, the pattern change flag P
Clear CI-I N G F and next step 21
Proceed to step 5. Judgment e in step 212: If there is no rhythm change, the process directly proceeds to step 215. In step 215, the beat/measure up flag R[) ISPF is checked to determine whether the previous measure has ended in the previous interrupt processing, that is, whether there is currently a measure beginning C or not. . If the beat/measure up flag RD I S P
Specified by variation switch f25 to A-1 in G300; d-1-variation type register 5
Variation stored in WAVAR''--according to the type of John pattern. If so, the program proceeds directly to the rhythm arter output routine (FIG. 14) starting from step 400.

Referring to FIG. 13, in step 301, the bar counter 5YOCNT is incremented to count the number of bar ups, and in step 302, the Paris Gorgeon flag VARI is incremented.
FG is inspected to determine whether the measure before -C is a break.

If the previous measure is a break and has no number, then in step 303, the Ohmy Balinese 21 type register 5WAVAR is checked to determine whether auto variation is set or not. If autovariation is not set, there is no need to generate a break pattern and the process returns to the original routine (Figure 12). If A-1~variation is set, in step 304 the lower 4 pips 1- of the measure counter 5YOCNT are taken out to the A register, and then in steps 305-310 the 71-variation type register 5WAVΔR and A register are set. The type of rhythm pattern to be generated next can be determined by inspecting the contents of the rhythm pattern. That is, step 305. At steps 307 and 309, it is determined whether or not 3.2.1 pits 1 to 1 of 5WAVAR are 1, and at steps 306 and 308.310, the contents of the △ register, that is, the number of elapsed measures, are $OF and $OF, respectively.
07. It is determined whether the amount is $03.

Step 305 If the judgments of J3 and 306 are both “yes”, the A-to variation (
16 bar) is set, and since it is the beginning of the 16th bar of the table, in order to generate variations every 16 bars, the read pattern start address RI-I is set in step 311.
Set Y ROM to the beginning address V16ROM of the variation pattern every 16 measures. Similarly, if the judgments in step 307d3 ``J'' and 308 are all ``yes'', RHY RO is performed in step 312.
M to V8ROM, and if the judgments in steps 309 and 310 are both "yes", step 3
After setting the RHY ROM to V4ROM in step 13 and changing the read pattern from the normal pattern to a predetermined variation pattern, step 314 sets the F variation flag MARI FG to the serial number 1, and step 315 sets the function register 46 (seventh one) of the rhythm interface 40. Send break set signal $08 to (Figure),
At step 316, the pattern change flag PCHNGF is set.
1 to 1, and return to the original routine (FIG. 12).

If the determination at steps 305 to 310 is other than the above, the process jumps from step 309 or 310 to step 317 and returns to the original routine (FIG. 12).

If the judgment in step 302 is that there is a break, that is, the previous measure was a break, then in step 320 the rhythm pattern start address register RHYROM is set to the normal pattern start address NROM from 1 to 1 and the variation pattern is changed to the normal pattern. , step 3
At step 21, the variation flag VARIFG is reset. At step 322, the play reseller 1~signal $10 is sent to the function register/16 (FIG. 7). At step 323, the pattern change flag P CHN G is reset.
After setting ", return to the original routine (Figure 12).

In FIG. 12, if the judgment of the C sumitsub 215 is 1 or no, and the judgment of step 215 is r il 2 J, the 13th
If you return after executing the exchange subroutine Cl-18NG300 in the figure, then execute the data output subroutine R1-IYCNV/100 (Figure 1/1).
j.

Referring to FIG. 14, check the beat end flag R11HEN D at the corner 401, and if it is the end, check the intra-beat timing T MI) C
Since there is no event data in NT, the process returns to any routine (FIG. 12). beat]-nd(” 1
．． 't G), the software 402 hits the contents of the rhythm pointer RHPN'r in the Y register, and then in steps 403 and 404 the rhythm pattern start address Rl-I Y ROM and the contents of the Y register Y( In other words, the contents of the rhythm pointer R14P
Channel data of the first byte of Cl-INO
and intrabeat timing γ-ta1-I T I M rN
Read G and store it in the Δ register and the X register.

Next, in step 405, the contents of the A register are logically summed with $01, and the contents of the Δ register are used as the intra-beat timing data HTIMING t, ftj of the lower 4 bits.In step 406, this intra-beat timing data 1- I T I
M I N G and tenbo counter TMPCN T r
It is determined whether the indicated timing matches J or not. If these timings match in step 406, this data is valid at the current processing timing TMPCNT, so the contents are saved.In step 408, the second event data EVT in FIG. 6(C) is processed. By 1-'s bit Pr T CLl, 4) S'j In S/L
, a3 YoU 17 Hell L, IE VELf-Y is read and stored in the A register.

Step 409 transfers the pitch, sustain and level data stored in the △ register to the rhythm sound source data register 44 (Figure 7), and transfers the pitch, sustain and level data stored in the △ register to the channel number register CI-I NO 17 stored in the X register. 45 (Figure 7).

In step 410, the next event 1-data EVT
The contents of the Y register as a rhythm pattern memory pointer are further incremented in order to read out the rhythm pattern memory pointer.

In step 4''11-414, steps 403-406
Repeat the steps 407 to 414 to read all data to event 1 having the same intra-beat timing data as the current intra-beat timing T' M P CN T.

In step 406 or 414, if there is no event 1 data having the same intra-beat timing, the process proceeds to step 415, and if the timing data left in the A register in step 405 or 413 is greater than or equal to $OD, that is, if the timing data is within the beat or Determine if it is a return. Since the intra-beat timing is always between f$0 and $B, the contents of the A register are A.
is more than $OD when beat 1nd data BE ($Ol
) ) or return data RTN ($OF) is read. Therefore, if the A register is $ID in the above judgment, then in step /116 it is judged whether or not it is a return.
If it is a return, clear the Y register in step /117, and if it is a beat]nind e, skip step 417 and proceed to step 418. In step 418, the beat 1 flag R1-IHEND is set, in step 419 the content of the Y register is incremented, and in step 420 the content Y of the Y register is set in the rhythm pointer RHPNT, and the original routine (step 239 in FIG. 12) is performed. ). When the return data RT N is detected by the processing in steps 417, 419 and 420 above, the rhythm pointer P)-(PNT is set to 1, and when the beat end data B is detected, the rhythm pointer In step 419, RHPNT roars to indicate the address next to the address where beat] nindo data [3E is stored.Step 41
In the judgment of step 5 (if there is no F beat end or return r, proceed to step 420, and in step 420 set the rhythm pointer RH13N T to timing -1-M I).
After the address at which the intra-beat timing that does not match N-1 is read is stored as is, ff! ? Returning to step 239 of the routine of FIG.

Referring to FIG. 12, step 23 sends a data transfer command to the rhythm interface 4o. This is done by designating the function register 46 (FIG. 7) with an address and subtracting U$02 by [3-]. )j7 link register 46 transfers @TRANS
Output C1 This signal is applied to the P,/S converter 6o, outputted to the rhythm interface 4o at shift/4o9, and stored in shift register 57 according to the pitch, sustain and The level data is stored in the shift register 58.
taKON and the baranoa clear signal stored in registers 1 to 59 in steps 213 and the like, step 315
．． 322 is function register 7! Breaklet reset 1-signal set to I6 is P/S
Converter 60 converts serial data 0PCIDΔ
and sent to the rhythm sound generation circuit 70 (FIG. 8).

Switch 240 T is measure/beat 1-end flag RDI
sPI is reset]~, and in step 241, the within-beat timing counter CN'I is incremented and it is determined whether it is the beat A-bar or not in the slap 242.Step 2+!
If it is determined that the beat is A-bar at 12, the next IJ step is 24.
Step 3 to step the timing force counter IIMING within the measure.
Rir. Since beats A-bar and 8 of measure A-bar are always ``beat A-bar,'' next in step 244, the beat A-bar of step 243 is small ■i) Check whether the beat A-bar of step 243 is ∆-bar or not, and check whether it is the content T of the timing counter within the measure. I M I N G is the maximum timing - I
It is determined whether M P MΔX has been reached. If the measure is over, step 245-(-beat [-beat flag R
In step 246, reset the intra-measure timing 13929 IMING and the intra-beat timing counter 1' M l) CNT]
・In step 247, measure/beat a/tub flag RDI
I decremented the SPI and changed the content to $EF, which indicates measure up (before decrementing, step 240
), step 252 'c first
Returning to step 260 in FIG. Also, there is a beat A-bar, but if it is not a small 1i1) A-bar, the beat 1 count flag RHHrEND is reset in step 248, and the in-beat timing counter is reset in step 2719-C.
In step 250, measure/beat up flag RD I
Increment S P l] - indicates a beat up $0
1, the process returns to step 260 in FIG.

If the determination in step 242 is that it is not a beat A-bar, step 251 is performed and the intra-beat timing counter T 1tvl I
After incrementing N G, step 2 in Figure 11
Return to 60.

With reference to FIG. 11, rhythm sound generation data output processing RH
Steps 211.247. of IRQ210 (Figure 12).
After returning via 250 and 251, in step 260, the block [1 gram counter, each register, etc.] saved for this interrupt processing INTRPT is restored,
Return to the state before the interrupt.

As described above, in this invention, variation patterns of 4 measures, 8 measures, and 16 measures are separately created.
When multiple variation selection switches are pressed at the same time, the variation pattern with the longest variation period after the variation pattern selected there is generated for each change measure, so the variation type For example, for three over-1 to 1-variation selection switches, it is possible to create the same 7 types of switch combinations and more.
In particular, if multiple switches are pressed, for example, as shown in Figure 3 (
/l) As shown in J, there is a lot of change in conventional J, oh i ~
Can generate rhythm, 7j-1-rhythm 11
C is to alleviate the monotonous curve.

[Brief explanation of drawings]

1 is a block configuration diagram of an autorhythm performance device according to an embodiment of the present invention; FIG. 2 is a diagram of each output waveform of the /1/8/6 bar signal generation circuit of the device of FIG. 1; 4 is a diagram illustrating variations in the device shown in FIG. A block configuration diagram of the electronic musical instrument according to the example, □ Fig. 5 is a layout diagram of the rhythm section on the panel of the musical instrument shown in Fig. 4, and Fig. 6 shows the 11 rhythm patterns that are included in the musical instrument shown in Fig. 4. A schematic diagram showing data stored in memory, FIG.
FIG. 8 is a detailed block diagram of the rhythm internoise circuit of the musical instrument shown in FIG. 4. FIG. 9 is a detailed block diagram of the rhythm internoise circuit of the musical instrument shown in FIG. Flowchart 1 for explaining the operation, FIG. 10 shows flowcharts 17-1 to 17-1 to show the 1-knob routine of rhythm red processing, and FIG. 11 shows interrupt processing. 1st
Figure 2 shows the rhythm joint venture data output horn processing routine.
Figure 14 is a diagram showing the break exchange processing routine.
1-B 17-1. 1: Tenboku! cock oscillator, 2: beat counter, 3: pattern memory, 4: bar counter, 5: rhythm j
6: 4 /'r3, / 16 bar information generation circuit, 7: Bali] - 1 selection switch, 7B, 7G
, 7D: Bali 1-shikon selection switch, 8: Priority circuit,
9: L7 receiver, 10: rhythm R source circuit, 11: round system 711. 25 (25-1, 25-2, 25-3):;4-
I.Balini Sea 12 selection switch, 26 (26-1, 26-2,...): Rhythm selection switch, 31: CPU, 34 Corism pattern memory, 70: Rhythm 8 generation circuit patent applicant Nippon Kanki Manufacturing Co., Ltd. Meeting 1 Agent Patent Attorney 1711 Tatatsu JJF Representative MP Patent Attorney -1 Tetsuya Ito

Claims (1)

[Claims] 1. A pattern memory that stores one normal pattern and a plurality of variation patterns, and a dynamic method that reads out the normal pattern and variation patterns from this pattern memory while automatically progressing in sequence at a predetermined tempo. a reading means; a plurality of variation selection switches for selecting the types of variations provided by the variation pattern; An autorhythm performance characterized by comprising: a pattern selection means that outputs the normal pattern by replacing it with the normal pattern at intervals of a constant n, and a rhythm sound source that generates a rhythm sound according to the pattern output by the pattern selection means. Device. 2. The A-trism playing device according to claim 1, wherein the pattern memory stores the one normal pattern and the plurality of variation patterns for each rhythm type. 3. When a plurality of variation patterns are pressed, the selection means gives priority to the variation pattern with the longest variation pattern in an interval where there are two or more variation patterns to be replaced with the normal pattern. The autorhythm performance device according to claim 1 or 2, wherein the automatic rhythm performance device is selected by: