JPS596201U - controller - Google Patents
controllerInfo
- Publication number
- JPS596201U JPS596201U JP10087282U JP10087282U JPS596201U JP S596201 U JPS596201 U JP S596201U JP 10087282 U JP10087282 U JP 10087282U JP 10087282 U JP10087282 U JP 10087282U JP S596201 U JPS596201 U JP S596201U
- Authority
- JP
- Japan
- Prior art keywords
- signals
- signal processing
- processing system
- controller
- digital signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Feedback Control In General (AREA)
- Control By Computers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の調節計の一例を説明するためのブロック
図、第2図A及びBはこの考案による調節計の各状態を
説明するためのブロック図である。
1・・・上位コンピュータ、2・・・シングルループコ
ントローラ、3・・・検出器、4・・・モード切換スイ
ッチ、5・・・操作弁、6・・・アナンシェータ、10
・・・切換スイッチ、20・・・外部装置。FIG. 1 is a block diagram for explaining an example of a conventional controller, and FIGS. 2A and 2B are block diagrams for explaining each state of the controller according to this invention. DESCRIPTION OF SYMBOLS 1... Host computer, 2... Single loop controller, 3... Detector, 4... Mode changeover switch, 5... Operating valve, 6... Annunciator, 10
... Selector switch, 20... External device.
Claims (1)
ス信号を入力して演算を行ない、操作信号を出力するア
ナログ信号処理系統と、ディジタル入出力信号を処理す
るディジタル信号処理系統とを有するマイクロコンピュ
ータ内蔵の調節計において、前記ディジタル信号処理系
統が前記シングルループコントローラ内で処理を完結す
る第1の状態と、前記伝送機能を介して上位コンピュー
タと信号の受授を行ない信号処理する第2の状態とを任
意に切換えできるようになっていることを特徴とする調
節計。A built-in microcomputer that has a transmission function that transmits signals to a host computer, an analog signal processing system that inputs process signals, performs calculations, and outputs operation signals, and a digital signal processing system that processes digital input and output signals. In the controller, a first state in which the digital signal processing system completes processing within the single loop controller, and a second state in which the digital signal processing system receives and receives signals from a host computer via the transmission function and processes the signals. A controller characterized by being able to be switched at will.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10087282U JPS596201U (en) | 1982-07-02 | 1982-07-02 | controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10087282U JPS596201U (en) | 1982-07-02 | 1982-07-02 | controller |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS596201U true JPS596201U (en) | 1984-01-14 |
Family
ID=30238442
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10087282U Pending JPS596201U (en) | 1982-07-02 | 1982-07-02 | controller |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS596201U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5162279A (en) * | 1974-11-28 | 1976-05-29 | Yokogawa Electric Works Ltd | KEISANKISEIGYOSHISUTEMU |
| JPS57105001A (en) * | 1980-12-22 | 1982-06-30 | Yokogawa Hokushin Electric Corp | Controller |
-
1982
- 1982-07-02 JP JP10087282U patent/JPS596201U/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5162279A (en) * | 1974-11-28 | 1976-05-29 | Yokogawa Electric Works Ltd | KEISANKISEIGYOSHISUTEMU |
| JPS57105001A (en) * | 1980-12-22 | 1982-06-30 | Yokogawa Hokushin Electric Corp | Controller |
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