JPS596252U - Panel operation protection circuit - Google Patents

Panel operation protection circuit

Info

Publication number
JPS596252U
JPS596252U JP1982098884U JP9888482U JPS596252U JP S596252 U JPS596252 U JP S596252U JP 1982098884 U JP1982098884 U JP 1982098884U JP 9888482 U JP9888482 U JP 9888482U JP S596252 U JPS596252 U JP S596252U
Authority
JP
Japan
Prior art keywords
panel
operation protection
panel operation
protection circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1982098884U
Other languages
Japanese (ja)
Inventor
西崎　民雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1982098884U priority Critical patent/JPS596252U/en
Publication of JPS596252U publication Critical patent/JPS596252U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は操作パネルの１例、第２図は実施例のパネル操
作保護回路である。第２図において、Ｓは判定回路、Ｔ
は判定論理保持回路、Ｕはフリップフロップ、Ｘはパネ
ルスイッチからの入力信号、Ｙは登録暗号情報保持回路
、Ｚはプロテクト信号である。FIG. 1 shows an example of an operation panel, and FIG. 2 shows an example of a panel operation protection circuit. In FIG. 2, S is a judgment circuit, T
is a judgment logic holding circuit, U is a flip-flop, X is an input signal from a panel switch, Y is a registered cryptographic information holding circuit, and Z is a protect signal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 操作パネルから入力された暗号情報とあらかじめ設定さ
れている暗号情報とを比較する比較回路と、該比較回路
の比較結果を保持する判定論理保持回路と、操作パネル
上にもうけられたパネル操作保護指示キーが非保護状態
を指示しているとき上記判定論理保持回路の保持論理値
がセットされ当該パネル操作保護指示キーが保護状態を
指示しているときリセットされるフリップフロップをそ
なえ、該フリップフロップよりパネル操作保護信号を出
力することを特徴とするパネル操作保護口　　・路。A comparison circuit that compares cryptographic information input from the operation panel with preset cryptographic information, a judgment logic holding circuit that retains the comparison results of the comparison circuit, and panel operation protection instructions provided on the operation panel. The holding logic value of the judgment logic holding circuit is set when the key indicates the unprotected state, and is reset when the panel operation protection instruction key indicates the protected state. A panel operation protection opening/path characterized by outputting a panel operation protection signal.
JP1982098884U 1982-06-30 1982-06-30 Panel operation protection circuit Pending JPS596252U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982098884U JPS596252U (en) 1982-06-30 1982-06-30 Panel operation protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982098884U JPS596252U (en) 1982-06-30 1982-06-30 Panel operation protection circuit

Publications (1)

Publication Number Publication Date
JPS596252U true JPS596252U (en) 1984-01-14

Family

ID=30234577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982098884U Pending JPS596252U (en) 1982-06-30 1982-06-30 Panel operation protection circuit

Country Status (1)

Country Link
JP (1) JPS596252U (en)

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