JPS5963537U - holding circuit - Google Patents
holding circuitInfo
- Publication number
- JPS5963537U JPS5963537U JP15934282U JP15934282U JPS5963537U JP S5963537 U JPS5963537 U JP S5963537U JP 15934282 U JP15934282 U JP 15934282U JP 15934282 U JP15934282 U JP 15934282U JP S5963537 U JPS5963537 U JP S5963537U
- Authority
- JP
- Japan
- Prior art keywords
- holding circuit
- diode
- input terminals
- circuit
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 6
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の保持回路を示す回路図、第２図は本考案
に係る保持回路を示す回路図、第３図は本考案に係る保
持回路の動作を説明する波形図、第４図は本考案に係る
保持回路の応用例としてのスイッチ機構の回路図、第５
図は前記スイッチ機゛構の動作を説明する波形図である
。Fig. 1 is a circuit diagram showing a conventional holding circuit, Fig. 2 is a circuit diagram showing a holding circuit according to the present invention, Fig. 3 is a waveform diagram explaining the operation of the holding circuit according to the present invention, and Fig. 4 is a circuit diagram showing a holding circuit according to the present invention. Circuit diagram of a switch mechanism as an application example of the holding circuit according to the present invention, No. 5
The figure is a waveform diagram illustrating the operation of the switch mechanism.
Claims (1)
記複数個の入力端子のうちの一個の入力端子へ第１のダ
イオードを順方向に接続する一方、前記第１のダイオー
ドを接続した入力端子に第２のタイオードのカソード及
び一端を接地した抵抗の他端を接続したことを特徴とす
る保持回路。A first diode is connected in a forward direction from an output terminal of an AND circuit having a plurality of input terminals to one input terminal of the plurality of input terminals, and an input terminal to which the first diode is connected; A holding circuit characterized in that the cathode of a second diode and the other end of a resistor whose one end is grounded are connected to the holding circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15934282U JPS5963537U (en) | 1982-10-20 | 1982-10-20 | holding circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15934282U JPS5963537U (en) | 1982-10-20 | 1982-10-20 | holding circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5963537U true JPS5963537U (en) | 1984-04-26 |
Family
ID=30350789
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15934282U Pending JPS5963537U (en) | 1982-10-20 | 1982-10-20 | holding circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5963537U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52133746A (en) * | 1976-05-04 | 1977-11-09 | Ricoh Co Ltd | Rs flip-flop |
-
1982
- 1982-10-20 JP JP15934282U patent/JPS5963537U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52133746A (en) * | 1976-05-04 | 1977-11-09 | Ricoh Co Ltd | Rs flip-flop |
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