JPS5972902A - Speed detector circuit for electric rolling stock - Google Patents

Abstract

PURPOSE:To increase the time capable of contributing to other calculation of a microprocessor by measuring the pulse width of a tachometer generator output once for serveal cycles of an AC power source. CONSTITUTION:An octal counter C1 counts a power source synchronization signal SY. When the output of the couner C1 is 7, the output terminals Q1, Q2 of flip-flops FF1, FF2 becomes ''H'' state. In this case, the output terminal Q1 becomes ''L'' at the initial rise of the output VP of a tachometer generator, the terminal Q1 becomes ''H'' at the rise of the next output VP of the tachometer generator, and the terminal Q2 simultaneously becomes ''L''. A counter C2 counts the output frequency of a pulse generator CKG while the terminal Q1 is ''L''. When the output of the counter C1 becomes 8, an interrupt signal IRQ is outputted, and a microcomputer receives a speed signal from the counter C2 through a data bus DB.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a speed detection circuit for an electric vehicle using digital control means such as a microprocessor, and in particular to a speed detection circuit for an electric vehicle that reduces the operating frequency of the microprocessor. Regarding circuits.

[Prior art]

In an electric vehicle, in order to control its running speed, the output of a speed generator connected to the wheels or drive motor is detected and applied to the control device. It is common to use an alternating current generator that can obtain an output frequency proportional to the rotational speed as this speed generator, and measure the output pulse width.

FIG. 1 shows the configuration of an AC electric vehicle using a speed detection circuit. The voltage of the AC power supply VAC is shown on the overhead wire TW and the vantage graph P.
1 to the main transformer MT, its secondary side to a controlled rectifier circuit RF such as a thyristor or a thyristor/diode mixed bridge, and the output of the controlled rectifier circuit RP to the drive motor DM to connect the electric vehicle to the main transformer MT. accelerate.

Further, a speed generator MIPG is connected to the drive motor DM, and a speed generator output VP is connected to a speed detection circuit VIC, which is connected to the microprocessor MPU via a data bus DB. Further, a gate signal output circuit G8 is connected to the data bus DB.

On the other hand, the primary side voltage of the main transformer MT is stepped down via the auxiliary transformer OT, and then a synchronization signal SY is obtained via the synchronization signal generation circuit SYG and is applied to the speed detection circuit vIC gate signal output circuit G8.

In this configuration, the speed detection circuit VIC is equipped with a counter that counts clocks of a constant frequency,
The above counter is operated for one cycle of the speed generator output ■P, and when one cycle of the speed generator output vP is completed, an interrupt signal IRQ is applied to the microprocessor MPU.As a result, the microprocessor MPU receives the speed input. The control program of circuit VIC is activated, generates chip select signal C8, and speed input circuit VIC outputs the contents of the counter onto data bus DB. In this way, a value corresponding to the output pulse width of the speed generator VP is taken into the microprocessor MPU, and further, the microprocessor MPU performs the necessary calculations necessary to control the electric vehicle based on this value. Then, the phase of the control rectifier circuit RF is controlled via the gate signal output circuit O8.

By the way, since the control program of the speed input circuit VIC is started for each cycle of the speed generator output vP, there is a problem that the higher the speed of the electric vehicle, the higher the frequency of operation of the microprocessor.

As a result, the execution time of other programs necessary for controlling the electric vehicle is restricted, and it may become impossible to control the electric vehicle.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a speed detection circuit for an electric vehicle that reduces the operating frequency of a microprocessor and can obtain a speed signal necessary for controlling the electric vehicle.

[Summary of the invention]

In electric vehicles, the phase control of the control rectifier circuit is used to control the drive motor, so it is sufficient to input the speed signal into the microprocessor once for each half cycle of the AC power supply, and there is no need to increase the frequency more than this. There isn't. Furthermore, since the running speed of an electric vehicle generally changes fairly slowly, there is no practical problem even if the frequency of acquisition is even lower, and the time available for other calculations by the microprocessor increases.

Therefore, in the present invention, the pulse width of the vibration force is measured only once every several cycles of the AC power source.

[Practice of the invention]].

Figure 2 shows the uninvented speed detection circuit VIC in the configuration of the 1-kilometre shown in Figure 1, and Figure 3 is a time chart of the waveforms of each part. SY is the clock input terminal CK of the octal counter C1
3, and its output terminals DO~D1 are decoder DC
Added to I. Therefore, as shown in FIG.
Outputs DCO with output and interrupt signal fB. The interrupt signal IRQ is applied to the microprocessor MPU as described in FIG. 1, and is also applied to the JK flip 70 knob FF1. It is added to the preset terminals PR1, PR, 2 of FF2. As a result, when the output of the counter c1 is 7 (all output terminals DO to D2 are "H"), the JK flip-flop FF'1. Output terminals Ql and Q2 of FF2 are in the "H" state.

Here, as shown in FIG. 3(a), when the speed generator output ■P of a relatively high frequency is applied, the output terminal Q1 becomes "L" at the first rise of the speed generator output vP. The state will be as follows. At the next rise of the speed generator output vP, the output terminal Q1 becomes "H" and at the same time, the output terminal Q2 becomes //L.
// becomes. Since the output terminal Q2 is connected to the terminals Jl and Kl of the JK flip-flop, the output terminal Q1 will not change after this point. teeth"
It is connected to the gate terminal G of the counter C2, and the counter C2 counts the output frequency of the clock pulse generator CKG only during this period.

As a result, the output of the counter C1 is 7 (output terminals DO to D
1 are all "H"), the output terminals D3 to D6 of the counter C2 are set to values corresponding to the output pulse width of the speed generator output vP.

Furthermore, when the output terminal Q1 changes from "L" to H, the output terminal Q2 simultaneously becomes "L".

Since the output terminal Q2 is connected to the data input terminal DX of the D-type flip-flop FF3, the decoder DCI
When the output signal DCO is generated, the state of the output terminal Q2 is latched, and the output terminal QX is "L".

Therefore, as described in FIG. 1, the interrupt signals IR and Q are applied to the microprocessor MPU, and the speed input circuit VI
When the control program C is started and a chip select signal C8 is generated, it is applied to the gate terminals of the line buffers I and B2 via the decoder DC2, and is activated. As a result, the value of counter C2 becomes data bus DB.
On the other hand, when the speed of the electric vehicle is relatively low and the frequency of the speed generator output VP is low, as in the third product υ), the 8 cycles of the synchronization signal SY The period of one cycle of speed - electric machine output VP is longer than the period of , and even if the output of counter C1 is 7, the value of counter C2 is equal to the speed generator output v
It does not match the output pulse width of P. In particular, depending on the phase of the speed generator output vP, the value of the counter C2 is very small, indicating a speed greater than the actual electric vehicle speed.

However, in this case, the output terminal Q2 is in the "H" state when the output signal DCO is generated, and QX is also in the "H" state. Therefore, the microprocessor MPU uses the chip select signal C
8, the line buffer LBI becomes active via the decoder pC2, and a signal is generated on the data bus DB.
//L" is output, and the speed signal taken into the microprocessor becomes zero.

In this way, the AC power supply VAC can be adjusted regardless of the speed of the electric car.
The speed signal is taken into the microprocessor MPU once every 8 cycles h, and the speed input circuit V
The operating frequency of the IC control program is reduced, and there is no fear that the execution time of other programs will be restricted.

In this embodiment, the case is described in which an octal counter is used as the counter C1, that is, a value proportional to the pulse width of the speed generator output vP is taken into the microprocessor once for every 8 cycles of the AC power supply VAC. but,
It is clear that by using a ternary value or higher as the counter C1, it is possible to extract the output pulse width of the speed generator vP at an arbitrary time interval corresponding to the counter C1.

Further, in this embodiment, the case of an AC electric car has been described, but it is clear that similar effects can be obtained when the present invention is used in a DC electric car using a chopper device or the like.

Note that in the figure, LBI is a line buffer, and RF is an AC/DC converter.

〔Effect of the invention〕

According to the present invention, it is possible to obtain a speed detection circuit for an electric vehicle in which the frequency of operation of the microprocessor is reduced.

[Brief explanation of drawings]

Figures 1 and 2 are block diagrams of one embodiment of the present invention, and Figure 3 is a block diagram of one embodiment of the present invention.
The figure is a time chart of each waveform.

Claims (1)

[Claims] 1. A drive motor, an AC speed generator connected to the drive motor, a first counter that measures the output pulse width of the AC speed generator, and a counter necessary for controlling the drive motor. Electrical unit equipped with an external synchronization signal generation circuit. In the speed detection circuit for a steam turbine, a second counter counts the output of the synchronizing signal generating circuit, means for dividing the frequency of the speed generator output, and is controlled by the output of the second counter, and is controlled by the output of the second counter. 1. A speed detection circuit for an electric vehicle, comprising means for storing an output and means for controlling an output signal according to the output of the storage means.