JPS59768B2 - Sotsukou Cairo - Google Patents
Sotsukou CairoInfo
- Publication number
- JPS59768B2 JPS59768B2 JP14804675A JP14804675A JPS59768B2 JP S59768 B2 JPS59768 B2 JP S59768B2 JP 14804675 A JP14804675 A JP 14804675A JP 14804675 A JP14804675 A JP 14804675A JP S59768 B2 JPS59768 B2 JP S59768B2
- Authority
- JP
- Japan
- Prior art keywords
- photodiode
- transistor
- circuit
- time
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000005375 photometry Methods 0.000 claims description 6
- 239000003990 capacitor Substances 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 230000001052 transient effect Effects 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000005622 photoelectricity Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J1/00—Photometry, e.g. photographic exposure meter
- G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
- G01J1/44—Electric circuits
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
- Exposure Control For Cameras (AREA)
Description
【発明の詳細な説明】
本発明はホトダイオードを用いた測光回路に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a photometric circuit using a photodiode.
カメラにおける露出設定のためにホトダイオードを用い
た測光回路が用いられるが、ホトダイオードの用い方と
しては、ホトダイオードの両端子間電圧を略一定に保つ
て電流を流す方式が直線性の点からよく用いられる。A photometric circuit using a photodiode is used to set the exposure in a camera, but from the viewpoint of linearity, the method of using a photodiode is to keep the voltage between both terminals of the photodiode approximately constant and to flow current. .
この場合ホトダイオードの出力は負帰還増幅器によつて
増幅されるが、測光回路の電源スイッチ投入後上記増幅
器が定常状態に達するまでの間、ホトダイオード固有の
静電容量が電源電圧近くまで充電され、以後この充電電
荷がホトダイオードの光電流として放電されてホトダイ
オードの両端子間電圧が所定の一定値になる迄には数秒
以上の時間がかゝりこの間正しい測光ができない。本発
明は、上述したホトダイオードが有する個有の静電容量
に充電される現象によつて起る測光回路の始動時の過渡
時間の延長を解消しようとす10るものである。In this case, the output of the photodiode is amplified by a negative feedback amplifier, but after the power switch of the photometric circuit is turned on until the amplifier reaches a steady state, the capacitance inherent in the photodiode is charged to near the power supply voltage, and from then on It takes several seconds or more for this charged charge to be discharged as a photocurrent of the photodiode and for the voltage between both terminals of the photodiode to reach a predetermined constant value, and correct photometry cannot be performed during this time. The present invention attempts to eliminate the prolongation of the transient time at the time of starting a photometric circuit caused by the above-mentioned phenomenon in which the unique capacitance of the photodiode is charged.
上述した不都合に対しては測光回路の電源投入時に或る
短時間だけホトダイオードを短絡しておいてホトダイオ
ードの充電を防ぐ方法が考えられ、従来第1図のような
回路が提案されている。To solve the above-mentioned problems, a method has been proposed in which the photodiode is short-circuited for a certain short period of time when the power of the photometric circuit is turned on to prevent the photodiode from being charged, and a circuit as shown in FIG. 1 has been proposed.
第115図でPDがホトダイオードでトランジスタT2
が電源投入時短時間だけ上記ホトダイオードを短絡して
石くスイッチの働きをする。即ちホトダイオードPDの
出力はFETよりなる増幅器Alで増幅され、その出力
はトランジスタTiによつてA120の入力側に負帰還
されP1点電位を一定に保つ。今スイッチSを投入した
直後を考えるとPDは自己の個有容量のため両端間電圧
がoであり、Tiが導通してPDの個有容量に光電電流
が流入しようとするが、コンデンサClは未だ充電電荷
がな25いからT2のベースには電源Eの電圧を抵抗R
1、R2で分圧した電圧が作用し、T2は導通しPDの
両端間を短絡してPDの個有容量への充電を阻止する。
その後Clは次第に光電されるから間もなくT2のベー
ス電位はT2を導通状態に保てな<なり、測光回路の正
常な動作が始まる。T2が導通から遮断されるまでの時
間はClと抵抗R1、R2よりなる回路の時定数で定り
、この時定数は増幅器Alが定常状態に達する迄の時間
程度に採る。この構成においては測光回路の定常状態に
お35いてもトランジスタT2のコレクタにはわづかな
がら漏れ電流が流れるため、特に入射光量が少い領域で
はホトダイオードPDを流れる電流に対してこの漏れ電
流が無視できなくなつて誤差が大となり低輝度域に測定
限界ができる。またこの回路には次のような問題がある
。トランジスタT2がない場合ホトダイオードは両端開
放時P1点が負になる方向の光起電力を発生しており、
この光起電力がA1で増幅されてT1のベースに印加さ
れてT1のコレクタ電流を増し、この電流が光電流とし
てPDに流れてP1点電位を略0に保つのであるが、P
Dは当初光起電力によつて自己容量が充電されておりス
イツチSを閉じた直後T1には過大電流が流れ、P1点
はOを起えて電源電圧近くまで上昇する。T1はP1点
が負の領域で導通しており正の領域では遮断になる構成
なので増幅器A1が定常状態に入るとT1は遮断となり
ホトダイオードPDの自己容量に電源電圧近くまで充電
された電荷はPD自身を通して光電流として放電され、
P1点電位がOを起えて負になつた所でT1が導通し正
常な測光動作が始まる。そこでこの充電を明止するため
トランジスタT2でPDを短絡しておくのであるが、P
Dへの入射光が少い場合を考えると、スイツチS投入後
T2の導通期間中はP1点電位は0であり従つてT1は
遮断状態にある。T2が遮断された後もPDは自己容量
が光起電力によつて光電されP1点が或程度負になるま
での間はT1は遮断状態のま\であるから、T2が遮断
後でもなお測光動作が正常に行われるようになるには相
当の時間がか\ることになる。例えば明るさがフイルム
のASAlOOに対しF:1.4露光時間2秒が適正露
光となるような明るさに対してホトダイオードの発生す
る光電流は10PA(ピコアンペア)程度であり、ホト
ダイオードの自己容量は500PF位なので、ホトダイ
オードの両端電圧が0.1ボルトがこの場合の正常動作
状態とすると、Oから0.1ボルトまで10PAの光電
流で充電されるのには約5秒と云う時間がか\り適正露
光の時間よりも長くなつてしまう。このような問題を解
決するには増幅器A1のFETに適当なバイアスを与え
P1点電位がOのときでもトランジスタT1が導通して
おくようにする必要があり、このときのT1のコレクタ
電流はPDの暗電流と等しくなるようしておかねばなら
ぬから回路調整が大へん面倒となるのである。本発明は
上述したような従来提案されている回路の問題点をも解
決するものである。以下実施例によつて本発明を説明す
る。第2図の回路でA2は差動増幅器でホトダイオード
PDの光電出力は反転入力端子に印加され、A2の出力
は対数変換用のダイオードDを介して帰還されている。In Figure 115, PD is a photodiode and transistor T2
When the power is turned on, the photodiode is short-circuited for a short period of time to act as a switch. That is, the output of the photodiode PD is amplified by an amplifier Al made up of an FET, and the output is negatively fed back to the input side of A120 by a transistor Ti to keep the potential at the P1 point constant. If we consider the situation immediately after turning on the switch S, the voltage across the PD is o due to its own individual capacitance, and Ti conducts and a photoelectric current tries to flow into the PD's own capacitance, but the capacitor Cl Since there is no charged charge yet, the voltage of power supply E is connected to the base of T2 by resistor R.
The voltage divided by 1 and R2 acts, and T2 conducts to short-circuit both ends of the PD and prevent charging of the individual capacitance of the PD.
Thereafter, Cl is gradually photoelectrically charged, and soon the base potential of T2 becomes unable to keep T2 in a conductive state, and the normal operation of the photometric circuit begins. The time until T2 is cut off from conduction is determined by the time constant of the circuit consisting of Cl and resistors R1 and R2, and this time constant is approximately the time it takes for the amplifier Al to reach a steady state. In this configuration, even when the photometry circuit is in a steady state, a small amount of leakage current flows through the collector of the transistor T2, so this leakage current is ignored compared to the current flowing through the photodiode PD, especially in areas where the amount of incident light is small. As a result, the error becomes large and a measurement limit occurs in the low-luminance region. Additionally, this circuit has the following problems. If there is no transistor T2, the photodiode generates a photovoltaic force in the direction in which the point P1 becomes negative when both ends are open.
This photovoltaic force is amplified by A1 and applied to the base of T1 to increase the collector current of T1, and this current flows to PD as a photocurrent to keep the potential at point P1 at approximately 0.
Initially, the self-capacitance of D is charged by the photovoltaic force, and immediately after the switch S is closed, an excessive current flows through T1, and point P1 rises to near the power supply voltage. T1 has a configuration in which the P1 point is conductive in the negative region and cut off in the positive region, so when amplifier A1 enters a steady state, T1 is cut off and the charge that has been charged to the self-capacitance of photodiode PD close to the power supply voltage is PD is discharged through itself as a photocurrent,
When the potential at point P1 rises to O and becomes negative, T1 becomes conductive and normal photometry operation begins. Therefore, in order to stop this charging, PD is short-circuited with transistor T2, but P
Considering the case where there is little incident light on D, the potential at point P1 is 0 during the conduction period of T2 after switch S is turned on, and therefore T1 is in a cut-off state. Even after T2 is cut off, T1 remains cut off until the self-capacitance of the PD is photovolted by the photovoltaic force and the P1 point becomes negative to some extent, so even after T2 is cut off, photometry is still possible. It will take a considerable amount of time for the device to function normally. For example, the photocurrent generated by a photodiode is about 10 PA (picoampere) at a brightness where an F:1.4 exposure time of 2 seconds is the appropriate exposure for film ASAlOO, and the self-capacitance of the photodiode is Since it is about 500PF, assuming that the voltage across the photodiode is 0.1 volts in the normal operating state in this case, it will take about 5 seconds to charge from 0 to 0.1 volts with a photocurrent of 10 PA. Therefore, the exposure time becomes longer than the proper exposure time. To solve this problem, it is necessary to apply an appropriate bias to the FET of the amplifier A1 so that the transistor T1 remains conductive even when the potential at the P1 point is O, and the collector current of T1 at this time is equal to PD Since the dark current must be made equal to the dark current of , circuit adjustment becomes extremely troublesome. The present invention also solves the problems of conventionally proposed circuits as described above. The present invention will be explained below with reference to Examples. In the circuit shown in FIG. 2, A2 is a differential amplifier, the photoelectric output of the photodiode PD is applied to the inverting input terminal, and the output of A2 is fed back via the diode D for logarithmic conversion.
PDと直列にトランジスタT3のコレクタエミツタが挿
入してあり、同トランジスタのベースは定常状態では電
源Eの電圧を抵抗R3,R4で分圧したものが印加され
るが、ベースエミッタ間にコンデンサC2が接続してあ
り、R3とC2とで計時手段が構成してあるので、電源
スイツチSを閉じた瞬間にはT3のベース電位はOでT
3のコレクタ電流は流れず、抵抗R3を通してコンデン
サC2が充電される計時動作によつて小許の時間を経て
C2が充電されて以後T3が導通する。即ちホトダイオ
ードの回路はスイツチSを閉じた瞬間から或る時間の間
は開かれた状態にあり、増幅器A2が始動後定常状態に
達した後PDの回路が導通して始動時の異常充電が防止
され、従つて始動時の過渡状態の経過が速くなる。なお
トランジスタのコレクタベース間及びコレクタエミツタ
間の個有静電量はホトダイオードのそれに比し充分小さ
く、トランジスタT3、ホトダイオードPDの個有容量
は直列接続の形で増幅器A2の入力回路に入つているの
で、A2の入力回路の容量成分はホトダイオード単独の
場合に比しきわめて小さくなつており、電源投人時の光
電も殆んど無視できるようになる。また測光回路の定常
状態においてホトダイオードPDを流れる電流が直列の
T3に流れるので、増幅器A2の出力電流であるダイオ
ードDを流れる電流は第1図の例のようにPDとトラン
ジスタとに分流せずPDを流れる光電流そのものである
ため誤差の要因がなくなり、低輝度まで正確に測光でき
ることになる。第3図の実施例も基本的には第2図の例
と同じであり、増幅器の構成が異つていて差動増幅器を
用いないものである。第2図と同等の部分には同じ符号
を付してある。ホトダイオードPDの出力はFETOI
)T4によつて増幅され同時に信号位相が反転される。
増幅器A3は入力と出力とが同相の増幅器でT4の出力
が増幅されて出力となる。この出力は対数変換のためト
ランジスタT5を挿入された帰還路によつてT4の入力
側に負帰還されてPDの出力電圧は略0に保持される。
本発明測光回路は上述したようにホトダイオ一ドと直列
にスイツチング素子を接続し、このスイツチング素子を
電源スイッチ投入と同時に始動する時定数回路で制御し
て電源スイツチ投入後一定時間上記スイツチング素子を
遮断しておき、この間に増幅器が定常状態に入るように
してあるので、ホトダイオードの自己個有の容量への異
常充電が阻止されて始動時の過渡的時間が短縮され、か
つ従来例のように増幅回路の負帰還路を流れる電流がホ
トダイオードと他の回路構成員とに分流すると云うこと
がなく、帰還電流即光電流であるから測光上の誤差原因
を設置すると云つたことにはならないのである。The collector-emitter of a transistor T3 is inserted in series with PD, and the base of the transistor is applied with the voltage of the power supply E divided by resistors R3 and R4 in a steady state, but a capacitor C2 is connected between the base and emitter. is connected, and R3 and C2 constitute a timekeeping means, so the moment the power switch S is closed, the base potential of T3 is O and T.
The collector current of T3 does not flow, and C2 is charged after a short period of time due to the timing operation in which capacitor C2 is charged through resistor R3, after which T3 becomes conductive. That is, the photodiode circuit remains open for a certain period of time from the moment switch S is closed, and after amplifier A2 reaches a steady state after startup, the PD circuit becomes conductive to prevent abnormal charging at startup. This results in a faster start-up transient. Note that the individual capacitances between the collector and base and between the collector and emitter of the transistor are sufficiently smaller than those of the photodiode, and the individual capacitances of the transistor T3 and the photodiode PD are connected in series into the input circuit of the amplifier A2. , A2, the capacitance component of the input circuit is extremely small compared to the case of using only a photodiode, and the photoelectricity generated when the power is turned on can be almost ignored. In addition, in the steady state of the photometric circuit, the current flowing through the photodiode PD flows through the series T3, so the current flowing through the diode D, which is the output current of the amplifier A2, is not shunted between the PD and the transistor as in the example of FIG. Since it is the photocurrent that flows through the sensor, there are no sources of error, and photometry can be performed accurately even at low brightness levels. The embodiment shown in FIG. 3 is basically the same as the example shown in FIG. 2, but has a different amplifier configuration and does not use a differential amplifier. Parts equivalent to those in FIG. 2 are given the same reference numerals. The output of photodiode PD is FETOI
) is amplified by T4 and at the same time the signal phase is inverted.
Amplifier A3 is an amplifier whose input and output are in phase, and the output of T4 is amplified and becomes an output. This output is negatively fed back to the input side of T4 through a feedback path in which a transistor T5 is inserted for logarithmic conversion, and the output voltage of the PD is held at approximately zero.
As described above, the photometric circuit of the present invention connects a switching element in series with a photodiode, controls this switching element with a time constant circuit that starts at the same time as the power switch is turned on, and shuts off the switching element for a certain period of time after the power switch is turned on. During this period, the amplifier enters a steady state, which prevents abnormal charging of the photodiode's own capacitance, shortens the transient time at startup, and allows the amplifier to enter the steady state as in the conventional case. The current flowing through the negative feedback path of the circuit is not shunted to the photodiode and other circuit members, and since the feedback current is an instantaneous photocurrent, it does not create a source of photometric error.
第1図は従来例の回路図、第2、第3図は夫々本発明の
回路図である。
PD・・・・・・ホトダイオード、T3・・・・・・P
Dと直列のスイツチング素子としての.トランジスタ、
C2,R3,R4・・・・・・T3を制御する時定数回
路を構成するコンデンサ及び抵抗、D・・・・・・対数
変換を兼ねた帰還路のダイオード、T5・・・・・・上
記と同じ作用をするトランジスタ。FIG. 1 is a circuit diagram of a conventional example, and FIGS. 2 and 3 are circuit diagrams of the present invention, respectively. PD...Photodiode, T3...P
as a switching element in series with D. transistor,
C2, R3, R4... Capacitors and resistors forming the time constant circuit that controls T3, D... Diode in the feedback path that also serves as logarithmic conversion, T5... Above A transistor that has the same effect as.
Claims (1)
、負帰還作用によりホトダイオードの両端子間電圧を一
定に保つて光電出力を得る測光回路構成において、上記
ホトダイオードと直列に接続されたトランジスタと、上
記測光回路に給電する電源スイッチと、上記トランジス
タの遮断導通を制御するため同トランジスタのベースに
接続され、上記電源スイッチの閉成に応答して計時動作
を開始し、一定時間の間上記トランジスタを遮断し、上
記一定時間経過後同トランジスタを導通させる計時手段
を設けたことを特徴とする測光回路。1. In a photometry circuit configuration that combines a photodiode and a negative feedback amplifier circuit and obtains a photoelectric output by keeping the voltage between both terminals of the photodiode constant through negative feedback action, the transistor connected in series with the photodiode and the It is connected to a power switch that supplies power to the photometric circuit and to the base of the transistor to control the cutoff and conduction of the transistor, and starts a timekeeping operation in response to the closing of the power switch, cutting off the transistor for a certain period of time. A photometric circuit characterized in that the photometric circuit is further provided with a timer for making the transistor conductive after the predetermined period of time has elapsed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14804675A JPS59768B2 (en) | 1975-12-11 | 1975-12-11 | Sotsukou Cairo |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14804675A JPS59768B2 (en) | 1975-12-11 | 1975-12-11 | Sotsukou Cairo |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5271284A JPS5271284A (en) | 1977-06-14 |
| JPS59768B2 true JPS59768B2 (en) | 1984-01-09 |
Family
ID=15443918
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14804675A Expired JPS59768B2 (en) | 1975-12-11 | 1975-12-11 | Sotsukou Cairo |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59768B2 (en) |
-
1975
- 1975-12-11 JP JP14804675A patent/JPS59768B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5271284A (en) | 1977-06-14 |
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