JPS598111B2 - Video signal switching method - Google Patents

Description

[Detailed Description of the Invention] The present invention is applied to the transmission side of an image transmission system, such as the transmission of educational information, in which multiple images captured by multiple cameras are transmitted to a distant place, and the images are displayed on multiple monitors corresponding to the cameras on the receiving side. The present invention relates to a video signal switching system.

Generally, when transmitting information from a plurality of cameras and displaying the information on a plurality of monitors, transmission lines 21 to 2n are required between the cameras 11 to 1n and the monitors 31 to 3n, respectively, as shown in FIG.

However, when the transmitting and receiving points are far apart, it is not economical to provide transmission lines corresponding to the number of cameras due to the cost of the transmission lines. Therefore, as shown in FIG. 2, on the transmitting side, the cameras 11 to 1n are switched to
The signals are transmitted through the transmission path 12 of the channel, switched by the reception switching circuit 13 on the receiving side, and displayed on the monitors 31 to 3n via the memories 141 to 14n corresponding to the cameras 11 to 1n.
In this case, one monitor displays the currently transmitted video (video), and the remaining monitors display the latest previously transmitted video as a still image. In this case, in order to identify the corresponding camera on the receiving side, the video signal that is generally transmitted is
An address signal is added to the vertical blanking period.

FIG. 3 shows an example of the waveform in this case. That is, the horizontal synchronizing signal 21 included in the vertical blanking period,
Address and control signals 23 are added to the vertical sync signal 22 between the appropriate horizontal sync signals. Note that 24 indicates a video signal. Furthermore, FIG. 6 shows an example of the contents of the address and control signal 23 shown in FIG. 3, in the case of a phase modulation signal composed of 7 bits, which will be described later. , a parity check signal of 1 bit. However, with the above method, since the transmitting side does not know when the camera will be switched, the receiving side must always have its memory on standby and store the transmitted video signals.

The present invention eliminates the above-mentioned drawbacks, and its purpose is to provide a video signal switching system with a simple configuration that does not require a memory to be kept on standby at all times on the receiving side.

In order to achieve the above object, the video signal switching method of the present invention adds the address of each camera corresponding to each camera to the video signal of a plurality of cameras, transmits it using a single transmission channel, and identifies the address on the receiving side. In an image transmission system that displays images on a plurality of monitors corresponding to each of the cameras, a memory that instructs to store the address and video signal of the old camera after specifying switching of the camera transmitting the video and the corresponding monitor on the transmitting side. The instruction signal is added to the video signal of the old camera and transmitted, and the video signal of the old camera is stored in the memory of the old monitor for a certain period of time, and then the switch is performed, and the video signal of the new camera that has been switched is sent along with its address. The present invention is characterized in that, at the same time as a moving image is displayed on the new monitor that has been transmitted and switched, the latest image of the corresponding old camera before switching is displayed on the old monitor as a still image.

The present invention will be described in detail below with reference to Examples. FIG. 4 is an explanatory diagram showing the configuration of an embodiment of the present invention.

The figure shows an example of a transmitting side circuit of an image transmission system. That is, the outputs of the cameras 11, 12, and 13 are input to a video switching circuit 31 that switches and outputs image signals from the cameras, and a video signal output is sent out from a synthesis circuit 40 that synthesizes address and control signals. On the other hand, the camera changeover switch V
l, V,, l'3. The switch output is the holding circuit (4) 3
2 and (11) 33, and the output of the holding circuit 1) 33 is branched and inserted into the video switching circuit 31, encoded by the coater circuit 38, and input to the address and control signal circuit 39. On the other hand, the output of the holding circuit (1) 32 is branched and sent via the 0R circuit 34 to a counter 35 that counts a predetermined number of clocks. The counter 35 is driven by a clock generation circuit 36 synchronized with a synchronization signal 30. The counter output is input to the address and control signal circuit 39 and also controls the holding circuits (1) 32 and (2) 33 via the control circuit 37. In the above configuration, when you press the changeover switch V1 to V3 of the camera you want to specify to display a video on the corresponding monitor among the cameras 11 to 13, the holding circuit (4)
32 is a changeover switch Vl, V in synchronization with a vertical synchronization signal.
2, read the state of l'3.

A state change detection circuit 46 is provided at the output stage of the holding circuit (1) 32, which detects a change in the contents of the holding circuit (1) 32 and outputs the counter 35 via the 0R circuit 34. trigger. A counter 35 counts clocks from a clock generation circuit 36 which generates a clock synchronized with the synchronization signal. Counting in the counter 35 is carried out for a fixed period of time sufficient to store the image signal in the memory of the receiver. This counter 35 is driven by a clock synchronized with the synchronization signal 30, but if the camera is externally synchronized, a synchronization pulse for driving the camera may be used, or a clock extracted from the video signal by a synchronization separation circuit may be used. . Address and control signal circuit 39 is triggered as soon as counter 35 starts counting, and outputs a memory instruction signal as shown in FIG.

This memory signal indicates that the counter 35 is set to, for example, "6" for a certain period of time.
It is output during counting, that is, from time P to Q in FIG. During this period, the contents of the address do not change. When the counter 35 counts "6", the control circuit 37 detects this and transfers the contents of the holding circuit (1) 32 to the holding circuit [33] according to a command from the control circuit 37. The output of the holding circuit (to) 33 is encoded by coater 38 and input to address and control signal circuit 39.

At this point (time Q in FIG. 7), the memory instruction signal is turned off, and the signal from coater 38 is output as a new address signal to the synthesis circuit. Further, from the output of the holding circuit (l) 33, the video switching circuit 31 selects the video signal from the camera designated by the changeover switch from among the video signals from the cameras 11 to 1, and inputs it to the synthesis circuit 40. Through the above operations, the memory instruction signal is output from the point when a new camera is instructed by the changeover switch (Fig. 7 P) until the time point Q, and at time Q, the memory instruction signal is set to "O" and a new address signal is output. do.

This address signal does not change until the changeover switch is operated next time. FIG. 5 shows an example of a receiving side circuit corresponding to the transmitting side circuit of the embodiment of the present invention shown in FIG.

In the figure, the video signal input is branched from the transmission line 12 to memories 441 to 443 and video switches 451 to 453.
The video signal is inputted in parallel to the monitors 31 to 33 via the monitors 31 to 33, and the video signal input is input to an address and control signal detection circuit 41 that detects the address and control signals included in the video signal, and these signal outputs are sent to a decoding circuit. 42 and a switching control circuit 43 in addition to controlling each of the memories 441-443 and video switches 451-453. In such a configuration, when a video signal is input, the detection circuit 4 detects an address and a control signal from among the video signals.
1 and decoded by the decoder 42.

The output of the decoder 42 is input to the switching control circuit 43, and based on the memory instruction signal, a specific memory is selected by the sent address signal (the address of the monitor that was displaying the video), and the video signal is Write to memory for a certain amount of time. When the memory instruction signal disappears, writing to the memory is prohibited, and the video switch selects memory output and outputs it to the monitor.

Then, the video switch designated by the address signal sent next is controlled so that the received video signal is directly input to the monitor. When the camera is switched on the transmitting side, the memory instruction signal and address of the additional address signal shown in FIG. 6 added to the video signal are detected and the video is stored in the designated memory.

After a certain period of time, the video becomes the video from the new camera, and the memory specification by the memory instruction signal in the control signal is canceled, so the video from the new camera will be displayed on the monitor that is compatible with the new camera, and the video will be displayed on the monitor that is compatible with the old camera. The video stored in memory is displayed on the monitor as a still image. FIG. 7 illustrates this operation.

That is, this figure shows a case where the camera 11 is switched to 12 and the moving image is switched to the corresponding monitor 31 to 32.
Now, the video signals of cameras 11 and 12 are represented by A and B, respectively, and first the camera 11 displays a moving image on the monitor 31, and the video signal on the monitor 32.
Assuming that a still image is being displayed, when the video switch is operated at point P, the memory instruction signal instructs the memory from the next field period and stores the video signal of the camera 11 for a certain period of time, for example, 6 fields. . At point Q at the end of this period, the memory instruction signal releases the memory instruction, and at the same time, the moving image on the monitor 31 changes to a still image.
The still image in step 2 is switched to a moving image. As explained above, when switching between an operating camera and its corresponding monitor, the present invention obtains still images of the old camera for a certain period of time from the video switch operation to the time of switching from the operating old camera to the new camera. be able to. Therefore, it is no longer necessary to keep a memory on standby at all times on the receiving side to store the video signal of the camera as in the prior art, and the configuration of the image transmission system can be simplified. Another advantage is that the memory write circuit can be configured with one circuit regardless of the number of channels. It is also possible to detect a memory instruction signal on the receiving side and manually store it in memory.

[Brief explanation of drawings]

1 to 3 are explanatory diagrams of a conventional image transmission system and its method of adding addresses and control signals. 6 is an example of the address and control signals used in the present invention, and FIG. 7 is an explanatory diagram of the operation of the embodiment of the present invention, in which 11 to 13 are cameras, V1 to 1'3 are camera changeover switches, and 31 to 33 are Monitor, 12 is a transmission path, 31 is a video switching circuit, 32, 33 are holding circuits, 34 is an 0R circuit, 35 is a counter, 36 is a clock generation circuit, 37 is a control circuit, 38 is a coater circuit, 39 is an address and control circuit. A signal circuit, 40 is a synthesis circuit, 41 is an address and control signal detection circuit, 42 is a decoder, 43 is a switching control circuit, 441 to 443 are memories, 451 to 453 are video switches, and 46 is a state change detection circuit.

Claims (1)

[Claims] 1 An image in which the address of each camera corresponding to each camera is added to the video signal of multiple cameras, transmitted using a single transmission channel, the address is identified on the receiving side, and the video is displayed on multiple monitors corresponding to each of the cameras. In a transmission system, after specifying switching of the camera transmitting video and the corresponding monitor on the transmitting side, the address of the old camera and a memory instruction signal instructing to store the video signal are added to the video signal of the old camera and transmitted. and store the video signal of the old camera in the memory of the old monitor for a certain period of time, and then switch over.
The video signal of the switched new camera is transmitted along with its address to display a video on the switched new monitor, and at the same time, the latest video of the corresponding old camera before switching is displayed on the old monitor as a still image. Video signal switching method.