JPS59855Y2 - Seishigazojiyushinsouchi - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device that receives a still image signal sent using the vertical blanking period of a television signal and reproduces a still image.

Recently, by using the vertical blanking period of a television signal, a still image signal for still images such as characters, which is separate from normal television broadcast video, is transmitted one horizontal scanning line at a time, and the receiving side A system has been devised that receives an image signal, stores it in a memory circuit, reads out a still image signal from the memory circuit in synchronization with scanning of a cathode ray tube, and reproduces the still image on the cathode ray tube.

In such a system, a reference phase signal is added to the still image signal and transmitted in order to correctly store and read out the transmitted still image signal, and the receiving side uses this reference phase signal as a reference to perform processing in the storage circuit. It controls gates and clock signal generation circuits to ensure accurate still image reproduction.

For this reason, when this reference phase signal is not being sent, the memory circuit and other operations on the receiving device side become inaccurate, resulting in a noisy image or a disordered image being projected on the cathode ray tube, causing the user to may cause discomfort.

Therefore, the object of the present invention is to provide a device that can notify the user when there is a possibility of an inconvenient reception condition as described above. The object of the present invention is to provide an apparatus that detects whether or not a reference phase signal is present, and controls a display circuit such as a pilot lamp based on the detection output to display whether or not a still image is being received.

An embodiment of the present invention will be described below with reference to the accompanying drawings.

FIG. 2A is a waveform diagram showing the main part of the transmitted television signal. Still image signal showing a still image such as
, a program code signal PC indicating the program content of this still image signal (■), and a start signal S indicating the beginning of the still image signal V and program code signal PC and indicating their reference phase.
TX is sent in a superimposed manner.

In the device described below, this start signal STX
is used as the reference phase signal.

Note that H8 is a horizontal synchronization signal, and SC is a reference subcarrier signal.

FIG. 1 is a block diagram of a device that receives such a signal and reproduces a still image, where 1 is a tuner, V
The television signal receiving circuit includes an IF circuit, a video detection circuit, etc., and 2 is a synchronization separation circuit, and these circuits are similar to those of a normal television receiver.

3 is an AD variable circuit, which converts the superimposed signals STX, PC, and to remove distortion during signal transmission.

In other words, the signals STX, PC, and ■ are originally transmitted as binary signals, but they inevitably suffer from various waveform distortions and noise at broadcast relay stations in the transmission path and during radio wave propagation. Since the receiving circuit 1 also has a limited passband width, waveform distortion occurs, and the waveform of the original binary signal becomes similar to a sine waveform with blunted rising and falling edges. By slicing this at an appropriate level in the conversion circuit 3, it is converted into a predetermined binary signal pulse waveform.

On the other hand, the gate pulse generation circuit 4 uses the vertical and horizontal synchronization signals output from the synchronization separation circuit 2 to count the horizontal synchronization signals with the start of the vertical synchronization signal as a reference. A gate pulse is generated to extract each signal STX, PC, and (2) by counting the number of eyes, and the gate pulse output is shown in FIG. 2B.

If the conversion level of the AD conversion circuit 3 is selected appropriately, only the start signal STX, program code signal PC, and still image signal ■ can be extracted as outputs, and these are sent to the gate circuit 5 by the output of the gate pulse generation circuit 4.゛When gated, the output of gate 1/circuit 5 exists only during the 20th H, and other noises can be removed.
Furthermore, in order to extract only the start signal STX, a gate pulse generation circuit 6 consisting of two monostable multivibrators is provided, and at time t1 in FIG. If a monostable multivibrator is triggered and its output pulse width is from time t1 to t2, and a second monostable multivibrator is triggered at its trailing edge and its output pulse width is from time t2 to t4,
Gate pulses from time t2 to time t4 are obtained as shown in FIG. 2C.

Using this, the output of the gate circuit 5 is transferred to the STX detection circuit 7.
If we date, only the start signal STX and its vicinity can be taken out as output, and since there is no signal before time t3, the output of the STX detection circuit 7 is always the first signal before time t3.
As shown, the start signal STX is at a high level at time t3.
The pulse falls only during the pulse width period of .

Note that here, it is assumed that a certain no-signal period is provided between the start signal STX and the first bit of the program code signal PC, and that the program code signal PC is not detected within the period of the gate pulse C. There is.

The falling pulse of the output of this STX detection circuit 7 is shown in FIG.
As shown in FIG. 2, the signal appears in every field during the period when the still image signal V is being transmitted.

At this time t3. t13. Trigger the retriggerable monostable multivibrator 8 using the pulses that follow t23..., and select the output pulse width to be longer than one field period (for example, in Fig. 3B). The pulse width is from time t3 to tlX indicated by the broken line) and S
The next output from the TX detection circuit 7 appears at time t13 before time tlX, and the output pulse B of the monostable multivibrator 8 is triggered again until the end, at time j(n++)
At time t(.) after the start signal STX disappears at point a.

The output of the monostable multi-bi break 8 (FIG. 3B) is applied to the input gate 12 of the memory circuit 13 as a memory control signal.

On the other hand, the still image signal ■ to be stored is also transmitted from the gate circuit 5 to the input gate 12, and on the other hand, the program code detection circuit 9 detects the program code PC to determine which program the received IH still image signal V belongs to. is detected and compared with the program code specified in advance by the program designation circuit 11 in the comparison circuit 10,
Only when the two match, the input gate 12 is made conductive and the still image signal (2) is supplied to the storage circuit 13 and stored.

This storage circuit 13 is a dynamic shift register which has a storage capacity for 261H of still images, and by reclocking every film 261H, the still image signal (2) passes through the storage circuit 13 for 261H.

The still image signal thus stored in the storage circuit 13 is then read out from the storage circuit 13, level-converted by the buffer amplifier circuit 14, and added to the cathode ray tube 15 to reproduce a still image.

At this time, if the programs match in the 20th H, I
If there is an extra clock of H minutes, the storage position of the still image signal (■) in the memory circuit 13 will shift by lH minutes, and instead of the initial IH portion disappearing, a new IH portion of the still image signal V will be added to the last portion.
By entering this, the still image displayed on the cathode ray tube 15, which repeats this process, is updated by shifting upward by lH.

What appears on the cathode ray tube 15 is from about the 23rd to 25th H to about the 250th to 255th H.
The still image signal inputted at 0H is carried forward by IH into one field, and appears at the bottom of the cathode ray tube 15 after approximately 40 fields.

If the same program is being received continuously, there is no problem even if there is a delay of this extent.

Next, the input/output portion of the memory circuit 13, which is a feature of the present invention, will be further explained with reference to FIG.

The still image signal output of the gate circuit 5 is supplied to an AND gate 16, and the output of the gate pulse generation circuit 4 (FIG. 2B) and the output of the comparison circuit 10 are supplied to a NAND gate 21.

Therefore, the output of this NAND gate 21 matches the program,
Also, it becomes a low level only during the 20th H period, and the output is inverted by the inverter 20, so the output is at the second level.
It becomes high level only when the programs match in the 0H period, and at this time, the AND gate 16 is made conductive and the AND gate 17 is cut off.

Therefore, the still image signal V read out from the memory circuit 13 that is being clocked during this period disappears.

Instead, the output of a new still image signal V from the gate circuit 5 is input to the storage circuit 13.

From the 20th H until the next 20th H (that is, the 283rd H), the output of the inverter 20 is at the A level, NAN
Since the output of the D gate 21 is at a high level, the still image signal ■ read out from the memory circuit 13 is output to the AND gate 17.
and circulates through the storage circuit 13.

18 is a NOR gate.

On the other hand, 19 is a NAND gate day for clearing, and when the program is switched in the program designation circuit 1, the output of the program switching detection circuit 15 becomes low level for more than one field period, and the OR gate 22
The signal is transmitted to the NAND gate 19 via the NAND gate 19, which is shut off for one field period or more, thereby clearing and erasing the contents of the memory circuit 13.

Furthermore, when the start signal STX no longer comes in, the output of the monostable multivibrator 8 becomes low level, and at this time as well, it is passed through the OR gate 22 to the NAND gate 19.
The contents of the memory circuit 13 are cleared.

As a result, only when the regular still image signal V accompanied by the start signal STX is being received, the still image signal ■
By storing, reading and reproducing in the memory circuit 13, only accurate still images can be reproduced.

Next, as a feature of the present invention, it is detected whether or not the start signal STX as a reference phase signal is received, and it is displayed whether or not the normal still image signal (■) can be received. A circuit is installed.

In the figure, 24 is a detection circuit that detects the presence or absence of this start signal STX. Here, the above-mentioned monostable multivibrator 8 is also used for detection, and its detection output is amplified by a buffer amplifier circuit 25.

Further, 26 is a display circuit thereof, and a light emitting diode 27 is provided as a display element, and the light emitting diode 27 is lit by the output of the buffer amplifier circuit 25.

With this configuration, when the start signal STX is received and present, the monostable multivibrator 8 generates a detection output as shown in FIG. The light emitting diode 27 is added to the light emitting diode 27, and the light emitting diode 27 lights up to indicate that accurate reception is possible.

On the other hand, when the start signal STX is not received, the light emitting diode 27 does not light up, indicating that the still image signal V is not being received, or even if it is received, accurate reception is not possible.

In this way, the user can know whether or not reception is being performed in an accurate reception state by observing the display by the light emitting diode 27, and only when accurate reception is possible, storage is performed in the storage circuit 13. It is possible to perform operations such as

In addition, in the above explanation, we have explained the case where the monostable multivibrator 8 is used as a detection circuit for a start signal and its output lights up a light emitting diode for display. However, in addition to such a start signal, a program code signal It is also possible to use another signal such as a PC as the reference phase signal, or to transmit a special reference phase signal and detect it.
Furthermore, as a detection circuit, a circuit that converts the reference phase signal into DC by peak detection or integration, and determines the presence or absence of the reference phase signal based on the DC level, or any other detection circuit may be used. Furthermore, a pilot lamp, a cathode ray tube, or the like other than a light emitting diode may be used as the display circuit.

As described above, according to the present invention, it is possible to display whether or not a regular still image signal in which a reference phase signal exists is being received, and the user can memorize the reception only when the reception state is accurate. - It is possible to improve operability by providing notification to control the playback operation, and to perform accurate playback of still images.

Furthermore, as mentioned above, the detection output of the reference phase signal triggers a monostable multivibrator with one field period or more that can be retriggered, and its output is used for display control and storage control. Even if this reference phase signal and still image signal are sent only during the television vertical blanking period, the control signal can be obtained as a continuous signal, and the display by pilot lamps etc. can be displayed continuously and easily. It is also useful because it can be controlled to automatically clear or hold the memory circuit when it is not in a normal reception state.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a still image receiving device according to an embodiment of the present invention, FIGS. 2A, B, C, D, and 3A,
B is a waveform diagram for explaining the operation of the device, and FIG. 4 is a detailed circuit diagram of the main parts of the device. 1... Receiving circuit, 6... Monostable multi-by-break for start signal detection gate signal generation, 7
......Start signal detection circuit, 8...Monostable multivibrator for start signal detection, 13.
...Memory circuit, 24...Detection circuit, 25
. . . Buffer amplifier circuit, 26 . . . Display circuit, 27 . . . Light emitting diode.

Claims (1)

[Scope of utility model registration request] a receiving circuit that receives a still image signal sent during a predetermined horizontal scanning period during a vertical blanking period of a television signal; and a receiving circuit that receives the still image signal based on a reference phase signal added to the still image signal. A storage circuit for storing the still image signal, and a reproduction circuit for reading and reproducing the still image signal from the storage circuit. A detection circuit that extracts only the portion to which the reference phase signal is sent by a gate pulse formed to be positioned after a certain period of time, and a detection circuit that is triggered by the detection output of the reference phase signal by this detection circuit for one field period or more. a retriggerable monostable multivibrator with an output pulse width of A still image receiving device comprising: a display circuit that outputs the still image signal; and a control circuit that allows the still image signal to be stored in the storage circuit when there is an output from the display circuit.