JPS60109059U - waveform recording device - Google Patents
waveform recording deviceInfo
- Publication number
- JPS60109059U JPS60109059U JP20211383U JP20211383U JPS60109059U JP S60109059 U JPS60109059 U JP S60109059U JP 20211383 U JP20211383 U JP 20211383U JP 20211383 U JP20211383 U JP 20211383U JP S60109059 U JPS60109059 U JP S60109059U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- recording device
- waveform
- analog
- waveform recording
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の診断用波形記録装置のブ遁ツク図、第2
図は本考案の実施例を示すブロック図、第3図a及びb
はそれぞれアナログ入力波形及び遅延波形を示す波形図
である。
図において、1・・・サンプルホールド回路、2・・・
A/D変換回路、3・・・制御用コンピュータ、5・・
・波形メモリ、7・・・アナログ遅延素子回路、8・・
・駆動クロック回路、なお、図中、同一符号は同一また
は相当部分を示す。Figure 1 is a block diagram of a conventional diagnostic waveform recorder;
The figure is a block diagram showing an embodiment of the present invention, Figures 3a and b
are waveform diagrams showing an analog input waveform and a delayed waveform, respectively. In the figure, 1...sample hold circuit, 2...
A/D conversion circuit, 3...control computer, 5...
・Waveform memory, 7... Analog delay element circuit, 8...
- Drive clock circuit. In the figures, the same reference numerals indicate the same or equivalent parts.
Claims (2)
てサンプリングし、デジタル変換したのち波形メモリに
記録させる診断用の波形記録装置において、上記サンプ
ルホールド回路の前段にアナログ遅延回路が設けられ、
診断用タイミングが発生した後に上記アナログ遅延回路
後段の回路が駆動され始めることを特徴とする波形記録
装置。(1) In a diagnostic waveform recording device that samples an analog input waveform through a sample-hold circuit, converts it into a digital signal, and then records it in a waveform memory, an analog delay circuit is provided before the sample-hold circuit,
A waveform recording device characterized in that a circuit downstream of the analog delay circuit starts to be driven after a diagnostic timing occurs.
のサンプリング出力が波形メモリに読み込まれる場合に
、上記アナログ多段遅延素子回路の駆動クロック周波数
が切り下げられることを特徴とする実用新案登録請求の
範囲域の第1項記載の波形記録装置。(2) The scope of the utility model registration claim, characterized in that when the analog delay circuit is a multi-stage delay element circuit and the sampling output thereof is read into a waveform memory, the drive clock frequency of the analog multi-stage delay element circuit is cut down. The waveform recording device according to item 1 of the above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20211383U JPS60109059U (en) | 1983-12-27 | 1983-12-27 | waveform recording device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20211383U JPS60109059U (en) | 1983-12-27 | 1983-12-27 | waveform recording device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60109059U true JPS60109059U (en) | 1985-07-24 |
Family
ID=30764530
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20211383U Pending JPS60109059U (en) | 1983-12-27 | 1983-12-27 | waveform recording device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60109059U (en) |
-
1983
- 1983-12-27 JP JP20211383U patent/JPS60109059U/en active Pending
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