JPS60146351U - 混成集積回路装置 - Google Patents

混成集積回路装置

Info

Publication number
JPS60146351U
JPS60146351U JP1984035016U JP3501684U JPS60146351U JP S60146351 U JPS60146351 U JP S60146351U JP 1984035016 U JP1984035016 U JP 1984035016U JP 3501684 U JP3501684 U JP 3501684U JP S60146351 U JPS60146351 U JP S60146351U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
circuit device
package
bonding surfaces
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984035016U
Other languages
English (en)
Inventor
清三 土井
安藤 純朗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1984035016U priority Critical patent/JPS60146351U/ja
Publication of JPS60146351U publication Critical patent/JPS60146351U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Casings For Electric Apparatus (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第1図は、従来の混成集積回路装置の概略断面図を示す
ものであり、第2図はこの考案の一実施例を示すもので
、aは混成集積回路装置の概略断面図、bはその概略斜
視図である。図中、1および1′は混成集積回路基板、
2および2′は外部接続用り一下、3および3′は混成
集積回路用パッケージである。

Claims (1)

    【実用新案登録請求の範囲】
  1. パッケージ封止型の混成集積回路装置において、それぞ
    れのパッケージ内に混成集積回路基板を収納し、−側に
    開口接合面を有する同一寸法形状の2個の混成集積回路
    用パッケージの開口接合面を向い合せに合致させ、前記
    接合面相互間を封止して構成したことを特徴とする混成
    集積回路装置。
JP1984035016U 1984-03-12 1984-03-12 混成集積回路装置 Pending JPS60146351U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984035016U JPS60146351U (ja) 1984-03-12 1984-03-12 混成集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984035016U JPS60146351U (ja) 1984-03-12 1984-03-12 混成集積回路装置

Publications (1)

Publication Number Publication Date
JPS60146351U true JPS60146351U (ja) 1985-09-28

Family

ID=30538921

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984035016U Pending JPS60146351U (ja) 1984-03-12 1984-03-12 混成集積回路装置

Country Status (1)

Country Link
JP (1) JPS60146351U (ja)

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