JPS6014687U - power circuit - Google Patents

power circuit

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Publication number
JPS6014687U
JPS6014687U JP10549583U JP10549583U JPS6014687U JP S6014687 U JPS6014687 U JP S6014687U JP 10549583 U JP10549583 U JP 10549583U JP 10549583 U JP10549583 U JP 10549583U JP S6014687 U JPS6014687 U JP S6014687U
Authority
JP
Japan
Prior art keywords
fet
power circuit
power supply
supply circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10549583U
Other languages
Japanese (ja)
Inventor
伸治 工藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP10549583U priority Critical patent/JPS6014687U/en
Publication of JPS6014687U publication Critical patent/JPS6014687U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電源回路を示す回路図、第2図及び第3
図は本考案に係る電源回路の実施例を示し、第2図は全
体の回路図、第3図は部分的回路図である。 1:FET、 2:)リガ回路、3:定電圧化回路、4
:スレッショルド調整回路、Tニドランス、E:電源。
Figure 1 is a circuit diagram showing a conventional power supply circuit, Figures 2 and 3 are
The figures show an embodiment of the power supply circuit according to the present invention, with FIG. 2 being an overall circuit diagram and FIG. 3 being a partial circuit diagram. 1: FET, 2:) Riga circuit, 3: Constant voltage circuit, 4
: Threshold adjustment circuit, T Nid Lance, E: Power supply.

Claims (1)

【実用新案登録請求の範囲】 スイッチング型の電源回路において、 トラン不の一次側の電流を断続すべきFETのソース側
電圧の上昇の際に上記FETのゲート電圧を逆バイアス
に強制的に設定するようになっているトリガ回路を備え
ており、上記FETのオン・オフ反復が高速度で行なわ
れるように構成されていることを特徴とする電源回路。
[Claim for Utility Model Registration] In a switching power supply circuit, when the voltage on the source side of the FET, which is to cut off the current on the primary side of a transformer, increases, the gate voltage of the FET is forcibly set to reverse bias. What is claimed is: 1. A power supply circuit comprising a trigger circuit configured as follows, and configured so that the FET is repeatedly turned on and off at high speed.
JP10549583U 1983-07-08 1983-07-08 power circuit Pending JPS6014687U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10549583U JPS6014687U (en) 1983-07-08 1983-07-08 power circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10549583U JPS6014687U (en) 1983-07-08 1983-07-08 power circuit

Publications (1)

Publication Number Publication Date
JPS6014687U true JPS6014687U (en) 1985-01-31

Family

ID=30247252

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10549583U Pending JPS6014687U (en) 1983-07-08 1983-07-08 power circuit

Country Status (1)

Country Link
JP (1) JPS6014687U (en)

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