JPS6019202A - Interface for robot - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] The present invention relates to a robot interface.

FIG. 1 is a circuit diagram of a conventional interface for outputting signals from a robot to other equipment.

In the figure, CT is a counter, and when a clock is input to the clock saw terminal c■, a count signal is output, and when the count reaches the set value, an output signal is output from the output terminal CI), and a reset signal is sent to the reset input terminal OR. When you input 0, it becomes riren [-ruru. DFF is l) flip 70
When a set signal is input to the set input terminal S with the knob, it is reversed and a hit output is output from the set output terminal Q, and when a reset signal is input to the input terminal R of the relay 1, it is reversed and the output is output from the set output terminal Q. Cut off the output from horn terminal Q to Gila 1, and also a hit signal.

When a reset signal is not input, when a clock is input to the clock input terminal T, the flip-flop inverts to 1- or 1- for each clock. S is a switch, A is a door closing command signal from a centrally controlled tall CPU of a computer, C is a clock signal from the CPU, B is the same < The door close command signal from the CPU, Q, is a signal during output to the door or a close signal. With the circuit configuration shown in Figure 1, if the door open signal is a pulse, the switch S is closed, and if a voltage level other than a pulse is required, the switch S is opened. In other words, since there are controlled devices that operate on pulses and others that operate on voltage levels, it is necessary to use a switch S to switch depending on the OP R device to be measured. First, let us explain the case where the switch S is opened and closed. In this case, no clock is input to the clock input terminal C1 of the counter C1, so there is no output from the output terminal Co. Now, on the △ terminal c))
When tJ is input to the door command signal, this signal is input to the set input terminal S of the D flip-flop DFF, so DFF is set and output Q is output from the output terminal Q to the output terminal Q of the D flip-flop DFF.ノJ I do. At the same time, the door close command signal Δ is also input to the reset input terminal CR of the counter C', and the counter C1- is reset. However,
Since the switch S is open for the non-counter C, the clock C
Since no input is made, no output is output from the output terminal Co of the counter CT. Therefore, as shown in Fig. 2 (a), the output Q of the DFF is maintained as it was when the door open command Δ signal was inputted, and the door close command signal f3B from the CPU is maintained at the time when the door close command Δ signal is input. It will be cut off for the first time when the reset input terminal [( is applied. Therefore, the output Q will be output in the state of a voltage level signal.

Next, the case where the switch S is closed will be explained.

First, when the door close command signal A is input from the CPU to the A terminal, this signal is sent to the cell 1 of the D flip-flop OF1:
~ Since it is input to the input terminal S, the [ ) FF is turned on, and a hit output Q is output from the set input terminal Q≧. At the same time, the inter-door command signal is also input to the reset input terminal OR of the counter CT, and the counter CT is reset. Therefore, the counter CT starts counting the clocks input to the input terminal CI. Then, the predetermined (Karan 1 to output terminal 01 at the time of counting)
Output Go from. This output Co is inverted and input to the clock input terminal of the flip flip LJ block D1:, and the output Q from Q is cut off. , output Q is counter C
A pulse output of 11'' is output between -r'' setting 11.1. FIG. 2 (portion) is an operation waveform diagram in this case.

In this case, in the past, the user side had to check whether the device under test operates on pulses or voltage levels, and then set the switch S in advance to The drawback is that you have to set it to closed and then go to work.

The present invention aims to eliminate this defect. FIG. 3 is a circuit diagram of a robot interface according to the present invention. In the figure, C-'I- is the same counter as in Figure 1, D1 to D2 are the same D flip-flops as in Figure 1, OR is an OR circuit, and Ao is a pulse output Q to the door. CP when outputting as output
Door closing command signal from U, C is a clock signal from the CPU, Δ1 is a door closing command signal from the CPU when outputting Q to D) as a voltage level output, B is the voltage level of Q as well △2 is the door close command signal from the CPU when the output Q to the door is output as a signal such as A when the door interval is completed. signal, K is the detection signal of the sensor at the time when the door Gtl is completed, Qo is the pulse output signal as shown in Fig. 4, and Ql is the 1-level output (iW).
+02 is the output signal that is output from the door gap command to the door gap completion, and Q is the final output signal that is sent to the door.

In the above circuit configuration C, when the door, which is a controlled device on the user's side, operates with the pulse signal 'C'', a door opening command signal Ao is input from the CPU of the convenience store to the △0 person's horn pant. As a result, this signal Δ0 is input to the input terminal S from the reflex 1 of the D flip-flop D1, so Dl becomes the reflex 1-, and output Qo is output from the output terminal Q to the serial 1, and the A horn circuit OR @ and then given to the door. This is the same 11. Input to the fang (g Q△0 starts the counter CT from 1 to 1 ζ, and the counter C starts to run from 1 to the set value. 1, a count signal is output from the output terminal Co.

Therefore, this count signal is
Since the input signal is input to the clock input terminal of the knob D1, the flip-flop 7D+ is inverted and set to -(reset 1).As a result, the final output signal Q has a pulse waveform as shown in the top row of FIG. In addition, if the controlled device on the Yuri's side (the door) operates with a continuous voltage level signal, the A
Input the door open command signal A1 to the 1 input terminal. Then,
This signal A1 is the D flip flip [l knob D2's cell 1~
Since it is input to the input terminal S, D2 is connected to Sera 1.
Output set output Q1 from output terminal Q, and OR circuit O
It is given to the door via R. In this case, until the door close command signal B is given to the input terminal,
is output and spelled. When the door closing command signal B is input from C'PU to the input terminal B, the flip-flops D2, L-L, L-11, and Q1 are turned off.

As a result, the final output horn signal Q is output as an output of a continuous voltage level waveform as shown in the middle part of FIG. In addition, if the door, which is the controlled device on the user side, is generated using a signal with a continuous voltage level waveform until the opening operation is completed,
A door opening command signal Δ2 is manually sent from the CPU of the computer to the A2 input terminal.

Since this (i'i A 2 is input to the set input terminal S of the D flip 70 tube D3, D3 is input to the cell 1, the set output Q2 is output from the output terminal Q, and the A It is applied to the door via the circuit OR.

This output continues until the door opening operation is completed. When the opening operation of the door is completed, the detection signal K of the sensor is input to the reset 1~j terminal of the flip/70 lug D3, and D3 is turned on. Therefore, set output Q2 is turned off. As a result, the final output Q is outputted as No. 18 of the continuous voltage level waveform from the door gap command to the door gap completion as shown in the lower part of FIG.

This has the effect that it is no longer necessary to make adjustments to the operating waveforms of the controlled equipment on the user side, unlike in the conventional case.

In the above, the operation of the controlled equipment was explained using the door opening/closing operation as an example, but the present invention is not limited to the opening/closing operation of the door, and the present invention is not limited to the opening/closing operation of the door. It can be applied to equipment under test when necessary.

[Brief explanation of drawings]

Figure 1 is an example of the circuit configuration of a conventional interface for a robot, and Figure 2 is an operating waveform diagram of Figure 1. is the case when outputting a pulse waveform. 13 is a circuit configuration diagram of the interface according to the present invention, and FIG. 4 is an output waveform diagram in the case of FIG. 3. Applicant Shinko Electric Co., Ltd. Agent Patent Attorney Haruya Saito

Claims (1)

[Claims] 1. The clock signal (C') is connected to the clock input terminal (C1)
, input the normal operation command No. 43 (A'o) for pulse output to the reset input terminal (CR), and input the output terminal (
Co) to the first D flip 70 tube (Dl
> A counter (CT) that outputs a power run 1-signal to the clock input terminal (T); Direct operation command 1g for pulse output
@(Ao> to the set input terminal (S), and the count signal from the counter (CT) to the clock input terminal (T)
A first D flip-flop (Dl) that outputs a ket signal (Qo) from the output terminal (Q) to the OR circuit (OR) described later; a direct operation command signal for continuous output. (A1) is input to the let input terminal (S), and the set signal (Ql) is output from the set output terminal (Q).
) and the output (Q) from the set output terminal (Q).
l) Reset second D flip, p flop <0
2); Normal operation command signal for output until completion of normal operation (A
2) is input to the set input terminal (S), and the set signal @(Q2 > is output from the set output terminal (Q), and normal operation is completed. 4u 8 (K) is input manually to the reset input terminal (1 ()). Sera 1 - Reset the output (Q2) from the output terminal (Q) 1
-J- third D flip-flop (C3); the first. Second. and a third D flip-flop ('D1
．． The interface for 1-1-1 is constructed with an OR circuit (OR)' which inputs the set outputs (Qo, Ql. Q2) of D2, C3) and outputs their Aa signals (Q).