JPS60211561A - Microcomputer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to microcomputers, such as RAM (random access memory IJ), R
The present invention relates to a technique effective for testing a one-chip microcomputer with a built-in OM (read-only memory).

[Background technology]

Conventionally, 1 has built-in storage circuits such as RAM and ROM.
Chip microcomputers are known (e.g.
(See "HD6301XJ, etc." sold by Hitachi, Ltd.).In microcomputers with such a built-in memory circuit, there is a problem in that it takes a long time to test the memory circuit.In other words,
The microprocessor (
This is because access to the RAM, etc. is performed indirectly via the central processing unit (central processing unit), and one test step requires, for example, four cycles.

Additionally, a specific program is required for such tasting.

[Purpose of the invention]

An object of the present invention is to provide a microcomputer with new functions convenient for tasting and the like.

The above and other objects and novel features of this invention include:
It will become clear from the description of this specification and the accompanying drawings.

[Invention! II required]

A brief overview of typical inventions disclosed in this application is as follows.

That is, by providing a function to disconnect the microprocessor from the internal bus based on a signal from the external terminal, it is possible to directly access the built-in memory circuit using the external terminal and the data terminal.

〔Example〕

The drawing shows a block diagram of an embodiment of a one-chip microcomputer to which the present invention is applied.

In the figure, each circuit block surrounded by a broken line constitutes an l-chip microcomputer μCOM as a whole, although it is not particularly limited. It is formed on one semiconductor substrate.

The symbol CPU is a microprocessor, and its main constituent blocks are exemplarily shown as a representative. That is, A is an accumulator, X is an index register, cc is a condition code register, SP is a stack pointer, PCL, PCH are program counters, CPU-C0NT is a CPU controller,
ALU is an arithmetic logic unit. Since the configurations of these microprocessors CPU are well known, detailed explanation thereof will be omitted.

Denoted by symbol I10 is an input/output boat,
It is used as a data output circuit or a data input circuit according to the internal data direction register.

Also, the symbol ■ indicates an input-only port.

What is indicated by the symbol O3C is an oscillation circuit, which includes, but is not limited to, a crystal resonator X-tal
to form a highly accurate reference frequency signal. This reference frequency signal forms the clock pulses required in the microprocessor CPU. Further, the reference frequency signal is also used as a reference time pulse of a timer.

This timer consists of counter C0UNT, prescaler P
It is composed of a controller CONT and a controller CONT.

The symbol RAM is a random access
It is a memory and is mainly used as a temporary data storage circuit.

The symbol ROM is a ROM in which a program for information processing is written.

The above circuit blocks are connected to each other by an internal bus BUS centered around the microprocessor CPU. The internal bus BUS shown in the figure includes an address bar signal line, a data signal line, and a control signal line.

In this embodiment, in order to enable direct access to the RAM and ROM from external terminals, the microprocessor CPU receives a newly provided bus control signal BC and is disconnected from the internal bus BtJS. .

That is, the output circuit that sends signals to the internal bus of the microprocessor CPU is a tri-state output circuit, and when the control signal BC is set to a high level, it becomes a high impedance state. , which are separated from the bus BUS.

Thus, for example, when testing the RAM or ROM, the control signal BC is set to a high level prior to the test operation, and the microprocessor CPU is disconnected from the internal bus BUS.

Then, by supplying an address signal from an external terminal, the R
AM or ROM is directly selected. Similarly, by reading out the contents of the ROM according to the supplied memory control signal, the input/output circuit I
10 to the outside. The data read out in this way is compared with a predetermined expected value to determine its quality.

On the other hand, in RAM, writing a certain pattern,
The data is read and compared with the written data to determine whether the data is good or bad.

In this way, the above-mentioned ROM and RAM tasting can be performed directly from the external terminal. Such test operation is not particularly limited, but a normal memory tester or logic tester can be used.

Note that the above built-in RAM direct access function can be used in the following ways. That is, in a multi-microcomputer or the like, by providing the microcomputer on the slave side with the above-mentioned RAM direct access function, the control signal BC is set to a high level from the master computer side, and the data to be processed is transferred to the RAM or the slave side This is useful for transferring processed data to the master side. An example of where such a function can be effectively used is to have the slave-side microcomputer perform floating-point arithmetic.

〔effect〕

(1) By providing a function to separate the microprocessor and internal bus, internal RAM and/or
Alternatively, the ROM can be accessed directly. As a result, arbitrary storage information can be written or read in one cycle, resulting in an effect that the tasting time can be shortened.

(2) According to the above (1), since the ROM and RAM can be directly accessed from the outside, it is possible to use an existing memory tester or logic tester.

(3) By utilizing the above-mentioned separation function between the microprocessor and the internal bus, it is possible to obtain the effect that data can be exchanged between the built-in RAM and an external device at high speed.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that this invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor. For example, to disconnect the microprocessor from the internal bus, interrupt signal I
This may be done by executing a specific program using NT. Alternatively, the separation operation may be performed by setting a specific register. In this way, the operation of disconnecting the microprocessor from the internal bus can take various embodiments.

[Application field]

The present invention can be widely used in one-chip microcomputers having built-in storage circuits such as RAM and/or ROM.

[Brief explanation of the drawing]

The drawing is a block diagram showing an embodiment of a one-chip microcomputer to which the present invention is applied. μCOM: Microcomputer, CPU: Microprocessor, CPU-C0NT: CPU controller, ALU: Arithmetic logic unit, A: Accumulator, X: Index register, CC: Condition code register, SP: Stack pointer , PC
L, PCH...Program counter, PPC...Auxiliary program counter, RAM...Rung access memory, ROM...Read only memory, Ilo...
Input/output port, ■...Input-only boat, O20...Oscillation circuit, C0UNT...Counter, C0NT...Controller, PR...Prescaler, BUS...Internal bus

Claims (1)

[Claims] 1. A microprocessor comprising a one-chip semiconductor integrated circuit device, including a microprocessor and a memory circuit, and having a function of separating an internal bus from the microprocessor by a signal from a specific external terminal. Computer. 2. The microcomputer according to claim 1, wherein the storage circuit includes a RAM.