JPS60223473A - Dc/dc inverter - Google Patents

Abstract

PURPOSE:To obtain a DC/DC inverter which is not polarized even at a fast responding speed by driving main switching transistors by a flip-flop set by a special pulse. CONSTITUTION:A comparator 2 compares a deviation 1 of a load voltage with a sawtooth wave voltage 3 to drives Tr3, Tr4 through AND circuits 5, 6. Thus, main switching Tr1, Tr2 are controlled ON and OFF, and a desired DC voltage obtained through a transformer T2 and diodes D1, D2 is supplied to a load 7. In this case, flip-flops (FF)8, 12, differentiators 9, 10, a comparator 11, and an up- down counter 13 are used, the pulse of a comparator 11 is differentiated by a differentiator 10, applied to the FF8 to stop the output of the AND circuit 6 at 0 level time and to set the FF12 through the differentiator 9. When the main Tr2 of not the start side is switched, it is operated with the same pulse width as the main Tr1 of the start side, thereby preventing the transformer T2 from irregularly magnetizing.

Description

[Detailed Description of the Invention] (&) Technical Field of the Invention The invention is directed to the use of D as a power source for various communications equipment.
This invention relates to improvements in C-DC inverters.

(b) Background of the technology A DC-DC is used to generate a DC voltage different from the DC power source of a certain voltage, and to control the operating pulse width of the main switching transistor as a power source to stabilize the generated DC fJftwL pressure. Inverters are often used.

(c) Prior Art and Problems The impark and problems of a conventional DC-DC, which is a stabilized power supply that controls the operating pulse width of the main switching transistor, will be explained.

Figure 1 is a circuit diagram of a conventional DC-DC inverter, Figure 2 is a circuit diagram of a conventional DC-DC inverter.
The figure shows a time chart of the waveforms of each part in Figure 1 (uniform ~ side μ
Corresponds to points 5 to 4 in Figure 1. In Figure 1, 1 is an operational amplifier, 2 is a comparator, 3 is a sawtooth wave generator, 4 is a 7 lip-flop (hereinafter referred to as FF), 5, 6 is and[i
l! Circuit, load on 7, Trl+TrttX main switching transistor% TrB yTr4 transistor,
EU DC input power supply, c1~Cs, Cf are capacitors,
R,, R,, Rf are resistors, Dl, T)2 are diodes,
L is a choke, Tt, Tt is a transformer, Vref [reference voltage, Vcc tD, ) transistor Trs r T
It shows the power supply voltage of chopper power supply etc. at t4.

First, there is no capacitor Cf or resistor Rf shown by the dotted line, and the response speed is fast with respect to the load KwJ.
A case in which cyclic load fluctuation occurs at a frequency close to the switching frequency will be explained.

When cyclic load fluctuation occurs, the reference voltage Vre
The output voltage of the operational amplifier 10, which calculates the difference with f, changes cyclically as shown in FIG. 2 (■ in A).

When this fluctuating voltage is applied to the comparator 2, it is compared with the sawtooth wave voltage shown in (1) of FIG. 2 (8) of the sawtooth wave generator 3, and the sawtooth wave voltage is larger. A pulse with a pulse width of k is output. This pulse is FF4, AND circuit 5.6 transistor Try.

Tt4 Through the transformer T1t-, the pulse voltage shown in )c) in Fig. 2 is generated, and the main switching transistor Tr
l.

Tt2, and the transistor TrleTrl is connected to the starting side transistor Trl and the non-starting side transistor T.
r! The voltages shown in Figure 2 (D) are applied to the transformer T, and currents with different positive and negative magnitudes as shown in Figure 2 (G) flow, and the transformers T, U is biased.

This biased magnetism is applied to the transistor Trl in Figure 2 (
The pulse voltage width shown in 5) is the pulse voltage width of the transistor Tr.

2 (wider than the pulse voltage width shown in Q,
This occurs because the current-time product on the iro side shown in Figure 2 (g) flowing through the transformer T is larger than the current-time product on the fly side, and this biased magnetization is accumulated on the mouth side, causing a large current to flow through the transistor Trl. may flow, and this may damage it.

In order to prevent this biased magnetization, there is a method in which the operational amplifier 1 is provided with a feedback circuit including a capacitor Cf and a resistor Rf as shown by the dotted line.

In this way, the response speed of the operational amplifier 1 becomes slow, so that the output voltage of the operational amplifier 1 becomes almost a straight line as shown in (3) of FIG.
It becomes approximately equal to the pulse voltage width applied to @rTry, and no deviation gi occurs.

However, for example, when used as a power source for a high-speed printer, the printer hammer operates periodically, and when it operates, a rapid current flows, but the response speed is slow and the voltage drops. The printer may not operate satisfactorily.

As described above, in the conventional DC-DC inverter, if the response speed is increased, there is a problem of biased magnetization, and even if the response speed is decreased, the above-mentioned problem occurs.

(ψ Purpose of the Invention The purpose of the invention is, in view of the above-mentioned problems, to provide a DC-DC converter that has a fast response speed to load fluctuations and does not cause biased magnetism. - in a DC inverter, a first comparator that compares the output with a sawtooth wave;

A rising edge detection circuit detecting the rising edge V of the sawtooth wave.

4- 17th lip 70 set by the rising edge detection circuit output. A first pulse generation circuit that generates a pulse for fully driving one of the main switching transistors based on the first output of the main switching transistor and the output of the first comparator.

The second flip-flop output is set by a second output whose phase is inverted from the first output of the 17th flip-flop, and is reset after a predetermined time; and the second output generates a pulse that fully drives the other main switching transistor. This is achieved by an inventive structure comprising a second pulse generating circuit and a metal.

In other words, in this way, both main switching transistors can be controlled with pulses of the same width, so even if the response speed is fast, the DC voltage will not cause biased magnetization. - A DC inverter is obtained.

(Embodiment of the Invention Below, an embodiment of the present invention will be explained according to the drawings.) Fig. 3 is a circuit diagram of a DC-DC inverter according to an embodiment of the invention, and Fig. 4 shows the timing of the waveforms of each part of Fig. 3. C on the chart
B) to ■ correspond to point b- in FIG.

Components with the same functions in FIG. 3 are indicated by the same symbols, and 8°12 is an FF, and a 9.10μ differentiator circuit outputs a pulse at the rising edge of the pulse. 11μ comparator, 13 is up/down counter,
VrFx As shown in (4) of FIG. 4 (a), the #tooth wave of the sawtooth wave generator 3 The clock is counted up while a level is being applied to the up terminal U, which is sufficiently higher than the frequency of It emits more pulses.

If a cyclic load change similar to that shown in Figure 2 (4) occurs, this is the case.

When a cyclic load fluctuation occurs, since the operational amplifier 1 has a fast response speed, the output voltage of the operational amplifier 1 fluctuates cyclically as shown in (2) of FIG. Similarly to the conventional case, as shown in FIG. 4(B), a pulse 7 which is wide on the starting side and narrow on the non-starting side is outputted to the AND circuit 5 and the up/down counter 13. applied to terminal U.

The comparator 11 is supplied with a sawtooth wave as shown in (1) of FIG. 4(4) of the sawtooth wave generator 3 and V of FIG.
4] and outputs a pulse. This pulse is differentiated by a differentiating circuit 10 to generate a pulse as shown in FIG.
The output Q of F8 generates a pulse as shown in FIG. A pulse as shown in FIG. In addition to the down terminal of
- is applied so as to prevent the output of Trl, and the AND circuit 5 outputs a pulse on the starting side as shown in FIG. 4(I), and this pulse is applied to the main switching transistor Trl.

4 of the up/down counter 13 and the comparator 2 (B
) starts counting up while the pulse on the starting side of the output shown in N11 level, starts counting down with the pulse shown in FIG. is OK, so the pulse shown in Figure 4 ■ is emitted from output 0, and FF1
Reset to 2'. Therefore, the pulse from the output Q of the FF 12 becomes a pulse with the same width as the pulse on the starting side of FIG. A pulse as shown in the fourth cause is generated and applied to the main switching transistor Try.Therefore, as shown in FIG. Causes magnetism 0: No.

As described above, in the circuit of FIG. 3, when the main switching transistor Try, which is not on the starting side, is switched, the main switching transistor h on the starting side is switched.

It operates with a pulse of the same width as the pulse that operates it, so
Even if the response speed is fast, it does not cause biased magnetism. Effects of the Invention As explained in detail above, according to the invention, the DC-DC has a fast response speed to load fluctuations and does not cause biased magnetism.
This has the effect of an inverter.

[Brief explanation of drawings]

Figure 1 is a circuit diagram of a conventional DC-DC inverter, and Figure 2 is a circuit diagram of a conventional DC-DC inverter.
Figure 3 is a circuit diagram of the DC-DC inverter according to the embodiment of the present invention, and Figure 4 is a time chart of the waveforms of each part of Figure 3 and 3. In the figure, 1 is an operational amplifier, 2.11μ comparator, 3 is a sawtooth wave generator, 4 is an 8.12U flip-flop, 5.6 is an AND circuit, 7 is a load, 9tlO is a differential circuit, TrleT
rx is the main switching transistor, Trs e Tr
4 tri) Transistor, Tt-TtU) Lance, C
1~C,, Cf are capacitors, 'fLt, Rt, nt are resistors, E is DC power supply, V, VrefU# illumination voltage, D1+
D21j diode, LH choke shown. 11- to 6 to father (to Imao 1)

Claims (1)

[Claims] A DC-DC converter that alternately drives the two main switching transistors using pulses with a width that corresponds to the output and fully stabilizes the output.
In the DC inverter, a first comparator that compares the output with a sawtooth wave, a rise detection circuit that detects the rise v' of the sawtooth wave, and a first of the 17th lip-flop that is set by the output of the core rise detection circuit. A first pulse generation circuit that generates a pulse for fully driving the nuclear main switching transistor according to the output of the first comparator and the 70-tube 17th lip! A second pulse that generates a pulse that drives the other main switching transistor by a 27th rip output and a 27th rip output that are set by the l 2nd output whose phase is inverted and reset after a predetermined time. A DC-DC inverter comprising a generation circuit.