JPS6025280A - Avalanche photo diode type light-receiving element - Google Patents

Avalanche photo diode type light-receiving element

Info

Publication number
JPS6025280A
JPS6025280A JP58133749A JP13374983A JPS6025280A JP S6025280 A JPS6025280 A JP S6025280A JP 58133749 A JP58133749 A JP 58133749A JP 13374983 A JP13374983 A JP 13374983A JP S6025280 A JPS6025280 A JP S6025280A
Authority
JP
Japan
Prior art keywords
layer
receiving element
light
type light
ingaas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58133749A
Other languages
Japanese (ja)
Inventor
Takao Kaneda
隆夫 金田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58133749A priority Critical patent/JPS6025280A/en
Publication of JPS6025280A publication Critical patent/JPS6025280A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F30/00Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
    • H10F30/20Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
    • H10F30/21Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
    • H10F30/22Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
    • H10F30/225Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier working in avalanche mode, e.g. avalanche photodiodes
    • H10F30/2255Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier working in avalanche mode, e.g. avalanche photodiodes in which the active layers form heterostructures, e.g. SAM structures

Landscapes

  • Light Receiving Elements (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 +a+発明の技術分野 本発明は光通信用受光素子に係り、とくにへ叶型受光素
子におけるガードリング効果の増強に関する。
DETAILED DESCRIPTION OF THE INVENTION +a+ Technical Field of the Invention The present invention relates to a light receiving element for optical communication, and particularly to enhancement of the guard ring effect in a leaf-shaped light receiving element.

(bl技術の背景 光ファイバを用いる光通信において、とくに長距離通信
用の高感度受光素子としてアバランシェフナ1−ダイオ
ード(ADP )型の受光素子が用いられている。該へ
叶においては、一般に受光面の高濃度不純物拡散領域の
周囲にこれと同導電型の低濃度不純物の拡散領域、すな
わちガードリングが設けられる。これによって該受光面
の下の半導体層に一様ななだれ増倍が発生し、量子効率
を高(することができる。
(Background of BL technology In optical communications using optical fibers, avalanche filter diode (ADP) type photodetectors are used as high-sensitivity photodetectors, especially for long-distance communications. A low concentration impurity diffusion region of the same conductivity type as the high concentration impurity diffusion region, that is, a guard ring is provided around the high concentration impurity diffusion region on the surface.This causes uniform avalanche multiplication to occur in the semiconductor layer below the light receiving surface. , the quantum efficiency can be high.

(C1従来技術と問題点 しかしながら、従来のADPにおいては、印加する逆方
向電圧を上げると、該ガードリングの周囲の角でブレー
クダウンが生じやすくなる。このブレークダウンは極め
て不規則的に発生し、ノイズの原因となる。すなわち、
ガードリングは、上記受光面の高濃度拡散領域の角にお
けるブレークダウンの発生をなくし、一様ななだれ増倍
を発生させるのに効果があるが、それ自身のブレークダ
ウン電圧(Vg)は、受光面の下の半導体層に充分大き
ななだれ増倍率が得られるようなブレークダウン電圧(
νa)と比べて大きな差がなく、その結果、ADPにデ
ータVaを印加すると、ガードリング部でもブレークダ
ウンが一部で始まり、雑音が発生する。このために、A
DPに特有の高感度特性を充分に利用できない欠点があ
った。
(C1 Prior art and problems) However, in conventional ADPs, when the applied reverse voltage is increased, breakdown tends to occur at the corners around the guard ring. This breakdown occurs extremely irregularly. , which causes noise, i.e.
The guard ring is effective in eliminating the occurrence of breakdown at the corners of the high concentration diffusion region on the light receiving surface and generating uniform avalanche multiplication, but its own breakdown voltage (Vg) is The breakdown voltage (
There is no large difference compared to νa), and as a result, when data Va is applied to ADP, breakdown begins in a part of the guard ring section, causing noise. For this purpose, A
There was a drawback that the high sensitivity characteristic peculiar to DP could not be fully utilized.

(d1発明の目的 本発明は、へ〇P型受光素子において、受光面の下の半
導体層におけるブレークダウン電圧Vaをガードリング
部におけるブレークダウン電圧Vgより小さくすること
によって、充分な増倍率を得ることを可能とし、長距離
光4信に適した高感度受光素子を提供することを目的と
する。
(d1 Purpose of the Invention The present invention provides a P-type light-receiving element with a sufficient multiplication factor by making the breakdown voltage Va in the semiconductor layer below the light-receiving surface smaller than the breakdown voltage Vg in the guard ring part. The present invention aims to provide a high-sensitivity light-receiving element suitable for long-distance optical four-wave transmission.

te1発明の構成 本発明は、4叶型の受光素子において、光吸収層の層厚
方向における不純物濃度を2段階に変化させたことを特
徴とし、具体的には、受光面に近い部分を高濃度に、受
光面から遠い部分を低濃度にしたことを特徴とする。
te1 Structure of the Invention The present invention is characterized in that the impurity concentration in the layer thickness direction of the light absorption layer is changed in two stages in a four-leaf type light receiving element. It is characterized by having a low density in the part far from the light-receiving surface.

(「)発明の実施例 以下に本発明の実施例を図面を参照して説明する。以下
においては、1μm帯の光通信用を対象とするIn P
 / InGaAs1 InGaAs P系のへテロ接
合型受光素子を例に採り上げたが、5iADP等におい
ても同様である。
(') Embodiments of the Invention Below, embodiments of the present invention will be explained with reference to the drawings.
/ InGaAs1 InGaAs P-based heterojunction light receiving element was taken as an example, but the same applies to 5iADP and the like.

第1図は本発明の一実施例であるIn P / InG
aAs/1nGaAsP系受光素子の断面の模式図であ
って、例えばr+’−In P基板1 (lEg # 
1.35eV)の上には、InGaAs層2 (Eg 
’ 0.75eV、厚さ1.5〜3μm)、InGaA
s P層3 (Eg=0.90eV、厚さ0.5〜0.
8 μm) 、n−InP層4 (Eg″j1.35e
V)が順次積層されており、さらにn−1nP層4の上
表面層には、Zn等を拡散してy−1nP層5とガード
リング6+(p型)が形成されている。
FIG. 1 shows an example of the present invention, InP/InG.
FIG. 2 is a schematic diagram of a cross section of an aAs/1nGaAsP-based light receiving element, for example, an r+'-In P substrate 1 (lEg #
1.35 eV), an InGaAs layer 2 (Eg
'0.75 eV, thickness 1.5-3 μm), InGaA
s P layer 3 (Eg=0.90eV, thickness 0.5-0.
8 μm), n-InP layer 4 (Eg″j1.35e
y-1nP layer 5 and guard ring 6+ (p type) are formed on the upper surface layer of n-1nP layer 4 by diffusing Zn or the like.

ここで、InGaAs層2が1μm帯の光吸収層として
、また、p□−1nP層5が光入射窓として作用する。
Here, the InGaAs layer 2 acts as a 1 μm band light absorption layer, and the p□-1nP layer 5 acts as a light entrance window.

したがって、InGaAs P Pi 3とn−InP
I’ti4およびp”−InP層5はいずれもInGa
As層2よりエネルギーギャップの小さい材料が用いら
れている。InGaAs P層3はInGaAs層2と
n−InP層4と間の障壁を段階的にして正孔の移動を
容易にし、素子の応答速度を高くする目的で設けられて
いる。
Therefore, InGaAs P Pi 3 and n-InP
I'ti4 and p''-InP layer 5 are both InGa
A material with a smaller energy gap than the As layer 2 is used. The InGaAs P layer 3 is provided for the purpose of creating a stepwise barrier between the InGaAs layer 2 and the n-InP layer 4 to facilitate the movement of holes and to increase the response speed of the device.

ところで、本発明の素子においては、InGaAsFm
2の厚さ方向における不純物濃度が第2図のように2段
階に変化させられている。第2図は縦軸にInGaAs
層2−1nGaAs P層3界面から計った深さくx)
、横軸に不純物濃度をとっである。すなわち、InGa
As層2の前記界面からXlまでの深さでは、不純物濃
度は約5×1016cm−3と高濃度とし、×1から全
深さx2までは、通常のADPにおけると同様にIX 
IQ” cm’程度の低濃度とする。このような濃度分
布を付与することは、InGaAs1M 2のエピタキ
シアル成長時に容易に可能である。
By the way, in the device of the present invention, InGaAsFm
The impurity concentration in the thickness direction of 2 is changed in two steps as shown in FIG. In Figure 2, the vertical axis shows InGaAs.
Layer 2 - Depth measured from the 1nGaAs P layer 3 interface x)
, the impurity concentration is plotted on the horizontal axis. That is, InGa
At the depth from the interface of the As layer 2 to Xl, the impurity concentration is as high as about 5 x 1016 cm-3, and from x1 to the total depth x2, IX as in normal ADP.
The concentration is set to be as low as IQ''cm'. It is easily possible to provide such a concentration distribution during epitaxial growth of InGaAs1M2.

第1図において、InG、aAs層2が上記のような不
純物濃度分布をしている場合、r−1nPFtS側を負
極としてr+’−InP基板1との間に逆方向電圧を印
加すると、V−1nP層5から伸びる空乏層は、InG
aAs P IN 3とInGaAs層2の界面までで
阻止される。、これは、InGaAs層2の前記XがO
からxlまでの領域を高不純物濃度にしたためである。
In FIG. 1, when the InG, aAs layer 2 has the impurity concentration distribution as described above, when a reverse voltage is applied between the r+'-InP substrate 1 and the r-1nPFtS side as the negative electrode, V- The depletion layer extending from the 1nP layer 5 is InG
It is blocked up to the interface between the aAs PIN 3 and the InGaAs layer 2. , which means that the X of the InGaAs layer 2 is O
This is because the region from xl to xl has a high impurity concentration.

一般に、空乏層の厚さく1)と電界強度(F)とは第3
図に示すようなほぼ関係となり、前記ブレークダウン電
圧(Va)はF軸とt軸と曲線Cとで囲まれる面積に比
例する。従来の^口PにおいてはInGaAs層2の全
体にわたって一様にI Xl016cm−3であり、空
乏層はInGaAsfii 2の厚さ方向の全領域に広
がっている。この場合の空乏層の電界強度分布が曲線C
であるとすると、本発明の素子については曲線C1のよ
うになり、前記ブレークダウン電圧(Va)は斜線部分
の面積に相当するΔνaだけ低減されることになる。
Generally, the thickness of the depletion layer 1) and the electric field strength (F) are
The relationship is approximately as shown in the figure, and the breakdown voltage (Va) is proportional to the area surrounded by the F axis, the t axis, and the curve C. In the conventional P, IXl016cm-3 is uniformly distributed over the entire InGaAs layer 2, and the depletion layer spreads over the entire region of the InGaAsfii 2 in the thickness direction. In this case, the electric field strength distribution of the depletion layer is curve C
If so, the element of the present invention will have a curve C1, and the breakdown voltage (Va) will be reduced by Δνa corresponding to the area of the shaded area.

なお、InGaAs1i 2において、前記x1からx
2までの領域はなだれ増倍には直接寄与しないが、光吸
収層として作用するので素子の量子効率は変わらない。
Note that in InGaAs1i 2, from x1 to x
Although the region up to 2 does not directly contribute to avalanche multiplication, it acts as a light absorption layer, so the quantum efficiency of the device does not change.

また、一般に不純物濃度が高くなるとキャリアの拡散速
度が低下するが、この領域は低不純物濃度に保たれてい
るので、素子の周波数特性を損なうこともない。
Furthermore, although generally the diffusion rate of carriers decreases as the impurity concentration increases, since this region is maintained at a low impurity concentration, the frequency characteristics of the element will not be impaired.

以上のように、本発明に係る受光素子においては受光面
のブレークダウン電圧が低減され、その結果、ガードリ
ング効果が正常に発揮される。すなわち、該受光面の下
の半導体層において安定かつ大きな増倍率のなだれ増倍
が行われ、該受光素子を高感度、低ノイズとする゛こと
が可能となるのである。
As described above, in the light receiving element according to the present invention, the breakdown voltage of the light receiving surface is reduced, and as a result, the guard ring effect is normally exhibited. That is, stable avalanche multiplication with a large multiplication factor is performed in the semiconductor layer below the light-receiving surface, making it possible to provide the light-receiving element with high sensitivity and low noise.

なお、前述のように、本発明は上記実施例に示したIn
 P / InGaAs1 InGaAs P系の受光
素子に留まらず、他の単一組成の半導体を用いたへDP
型素子、あるいはその他の半導体の組合せから成るAD
P型素子に対しても適用可能であることは明らかである
Note that, as described above, the present invention is applicable to In
P/InGaAs1 InGaAs P-based photodetector, but also DP using other single composition semiconductors.
AD consisting of type elements or other combinations of semiconductors
It is clear that the invention is also applicable to P-type elements.

(g+発明の効果 本発明によれば、へ〇P型の受光素子における受光面の
ブレークダウン電圧を低減することによってガードリン
グ効果が増強され、高感度、低ノイズの受光素子を提供
可能とする効果がある。
(g+Effect of the Invention According to the present invention, the guard ring effect is enhanced by reducing the breakdown voltage of the light-receiving surface of a P-type light-receiving element, making it possible to provide a high-sensitivity, low-noise light-receiving element. effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の詳細な説明した受光素子の断面構造を
示す模式図、第1図は該受光素子の光吸収層における不
純物濃度分布を示す図、第3図は本発明の受光素子にお
いて受光面のブレークダウン電圧の低減を説明するため
の図である。 図において、1は0”−InP基板、2はInGaAs
層、3はInGaAs P N、4はn−InPJi、
5はps−1nPJ”#、6はガードリングである。
FIG. 1 is a schematic diagram showing a cross-sectional structure of a light-receiving element according to the present invention, which is explained in detail, FIG. 1 is a diagram showing an impurity concentration distribution in a light absorption layer of the light-receiving element, and FIG. FIG. 3 is a diagram for explaining reduction in breakdown voltage of a light receiving surface. In the figure, 1 is a 0''-InP substrate, 2 is InGaAs
layers, 3 is InGaAs PN, 4 is n-InPJi,
5 is ps-1nPJ"#, and 6 is a guard ring.

Claims (1)

【特許請求の範囲】[Claims] 光吸収層の層厚方向における不純物濃度を、受光面に近
い部分を高濃度に、受光面から遠い部分を低濃度にした
ことを特徴とするADP型受光素子。
An ADP type light-receiving element characterized in that the impurity concentration in the layer thickness direction of the light-absorbing layer is high in a portion close to a light-receiving surface and low in a portion far from the light-receiving surface.
JP58133749A 1983-07-22 1983-07-22 Avalanche photo diode type light-receiving element Pending JPS6025280A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58133749A JPS6025280A (en) 1983-07-22 1983-07-22 Avalanche photo diode type light-receiving element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58133749A JPS6025280A (en) 1983-07-22 1983-07-22 Avalanche photo diode type light-receiving element

Publications (1)

Publication Number Publication Date
JPS6025280A true JPS6025280A (en) 1985-02-08

Family

ID=15112031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58133749A Pending JPS6025280A (en) 1983-07-22 1983-07-22 Avalanche photo diode type light-receiving element

Country Status (1)

Country Link
JP (1) JPS6025280A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62282997A (en) * 1986-06-02 1987-12-08 カルプ工業株式会社 Method of forming pattern
JPH04352371A (en) * 1991-05-29 1992-12-07 Mitsubishi Electric Corp Avalanche photodiode

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62282997A (en) * 1986-06-02 1987-12-08 カルプ工業株式会社 Method of forming pattern
JPH04352371A (en) * 1991-05-29 1992-12-07 Mitsubishi Electric Corp Avalanche photodiode

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