JPS60263191A - Video signal processing circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention (a) Industrial Application Field The present invention relates to a monochrome CRT display device,
The present invention relates to a video signal processing circuit that inputs multiple bits of video data and outputs a video signal having gradations.

(b) Prior art Japanese Patent Publication No. 1786/1986 discloses that when a color image is displayed on a monochrome display monitor, the brightness of a portion corresponding to a predetermined color is changed, and the change in color is displayed as a change in brightness. A method is disclosed. However, in this conventional example, the configuration is simply to detect a predetermined color signal and apply brightness modulation, and there are only three brightness levels: white, black, and an intermediate level. I can't express it.

When displaying a monochrome image, generally only ] bits of video data are allocated to one pixel on the display screen, but when displaying a color image, usually R,
It is equipped with a graph ink video RAM that stores dot patterns for each of the primary colors G and B, or has an attribute memory that stores color control codes. Multiple bits of video data are assigned to pixels.

Therefore, as shown in Fig. 1, these multi-bit parallel video data output from the information processing equipment (1) of the PC Sasa are input to the video signal processing circuit (2), and then processed by the DA converter (Dan). If the video data is A-converted, it is possible to obtain a video signal S having a gradation according to the video data as shown in FIG. By inputting the video to the video output circuit (61) of the monochrome display monitor (q), it is possible to faithfully display changes in color as changes in brightness using a cathode ray tube.

However, in this type of configuration, as is clear from FIG. 2(a), the level BL of the video signal S during the blanking period B (hereinafter referred to as the blanking level) is determined, the lowest level M in the black direction of the gradation
Matches L and 7, and furthermore, normal mono J
In the evening, adder 3 key 7 was performed, so there was a problem that noise and retrace lines were displayed during the blanking period.Conventional CRT whose video data is I bit
In display devices, the video signal has only two levels, white and black, so if you adjust the blind volume (8) and raise the black level K toward white, noise and blanking lines will become less noticeable, but if the video signal is If the black level K is increased toward white as shown by K in FIG. 1, the low-level video signal SK in the black direction will fall below the black level. The image is displayed uniformly black and the gradation cannot be displayed. Also, a certain level! !
Even if the blanking level is set to a level that is just below the level shown in Figure 1, for example, the black level shown in Figure 1, if the blanking level fluctuates due to changes in temperature, etc. There was still a drawback that noise was displayed.

(C) Purpose of the Invention The present invention aims to make it possible to display gradations on a monochrome display monitor, and to prevent noise and R# from being displayed during the blanking period.
The purpose is to suppress noise display caused by level fluctuations due to temperature changes, etc.

B) Structure of the Invention The present invention provides a plurality of input terminals for inputting video data of a plurality of bits allocated to one pixel of a display screen;
In a video signal processing circuit comprising a DA converter connected to the plurality of input terminals and DA converting the video data to output a video signal having gradation, the lowest level of the gradation of the video signal in the black direction; a detection circuit that detects that video data corresponding to the input signal has been input; and a detection circuit that detects input of video data corresponding to This configuration includes a level setting circuit for setting the level.

(E) Embodiment FIG. 3 is a circuit diagram showing an embodiment of the present invention.
υ~ is an input terminal for inputting 4-bit parallel video data consisting of intensity -■ and data R, G, and B corresponding to the three primary colors of red, green, and blue, and is connected to a DA converter ■.
is an R-2R ladder-resistance network with electronic switches (1o1) to (104) connected to each input terminal (9I) to (104) and the output terminal of each electronic switch connected to each input terminal. Each input terminal of the resistor network aυ is connected to a resistor (Ill) to (114) whose one end is connected to the power supply potential B in order to supply a reference voltage. The output terminal of the resistor network (11) is connected to the bias resistor 02.

The buffer (4) consists of an emitter-follower transistor 0 whose collector is connected to the power supply potential B and an emitter resistor (I4), and the output of the DA converter (2) is connected to the base of the transistor 0, and the buffer circuit The output terminal α9 of (4) is connected to a video output circuit (6) of a monochrome display monitor (similar to the conventional example shown in FIG. 1).

161 is input video data I.

This is a detection circuit that detects that R, G, and B are all "0", and is a diode as a switching element connected in the forward direction from the output side of the DA converter (diameter) to the output NK of the OR gate ae. This is a level setting circuit consisting of a8 and four level setting resistors connected in series to this diode. And electronic switches (101) to (104)
For example, it consists of a PNP transistor (A) whose collector is grounded as shown in Figure 4, and by using the base as the input terminal and the emitter as the output terminal, the video data can be changed to "0". A switching operation is performed so that the ground potential is inputted when the value is "1", and the reference potential is inputted when the value is "1" to the input terminal of the resistor network aυ.

Next, the operation of this embodiment will be explained.

First, when 4-pit video data I, R, G, B is input to the input terminals t91) to (94+), each of the electronic switches (101) to (104) is turned on according to the input video data. Alternatively, it is turned off and the ground potential or reference potential is input to each input terminal of the resistance network aυ.

Therefore, the resistor network I is connected to the manually operated video data J-
An analog video signal S with a gradation level corresponding to the evening is output, and the impedance is converted by the buffer circuit.
, G, B) is (0, 0, 0, 1) → (0, Oyl+O)
→(0,0,1,1)→・・・・・・→(1yl+1y
1), a step wave-like video signal in which the gradation level increases from black to white at equal intervals is output. In this case, the output of OR gate 4 is
It is always "I" and the diode scream is in the cutoff state,
The level setting circuit aη does not work.

However, in blanking period B, the video data is all "0", so in this case, the output of OR gate 0 (9 is "0", diode 08 is conductive, and level setting resistor (9 is resistor It will be inserted between the output terminal of the circuit network αB and the ground.For this reason, a level setting resistor Ql is connected in parallel to the combined resistance of the resistor network 0υ.
As shown in FIG. 2(b), the blanking level BL is set to a level lower than the lowest level ML in the black direction of the gradation determined by the combined resistance of the resistance network aυ and the bias resistance u.

Therefore, if you adjust the light volume (8) and set the black level to the lowest level ML determined by the DA converter ■,
The gradation can be displayed reliably, and since the blanking level BL is lower than the black level, noise and retrace lines that occur during the blanking period will not appear on the display.Furthermore, the level setting resistor ( If the resistance value of 11 is selected appropriately and the difference between the blanking level BL and the lowest level ML is set to a certain degree large, the noise will be displayed below the black level even if the level changes due to temperature changes etc. There isn't.

FIG. 5 is a circuit diagram showing another embodiment of the present invention;
The input of R gate ae is connected to electronic switches (101) to (10
The only difference from the embodiment shown in FIG. 3 is that 4) is taken from the input side and that an electronic switch c21) is used instead of the diode switch, and the operation is the same.

Further, in the embodiments shown in FIGS. 3 and 5, a voltage addition type DA converter was used as the side, but a current addition type may be used as shown in FIG. 6.

That is, in the embodiment of FIG. 6, the electronic switches (101) to
Resistors (111) to (114) for supplying the reference voltage are not connected to the output side of (104), so when the video data is "0", the resistor circuit The input terminal of the network I is connected to the ground potential, but when the video data is "1", the input terminal of the resistor network aυ is in an open state. Therefore, in this case, the current value changes and DA conversion is performed depending on whether the electronic switches (101) to (104) are turned on or off, and the operations are the same.

Incidentally, if noise is generated when the level setting circuit 0 changes the braking level, it is effective to insert a capacitor 4 as shown by the broken line in FIG.

By the way, in the above embodiment, the input terminal I! llυ〜(
Since the video data applied to the computer is used as video data for color images, monochrome display monitors can faithfully display color changes as changes in brightness. It is not necessary to do this, and any video data indicating a luminance gradation level in which multiple bits are assigned to one pixel on the display screen may be used.

(F) Effects of the Invention The video signal processing circuit of the present invention detects that video data is input when the video signal corresponds to the lowest level in the black direction of the gradation of the video signal, and converts the level of the video signal at that time into the DA.
Since the level is set lower than the lowest black level determined by the converter, it is possible to ensure that all gradations are displayed on a monochrome display monitor, and to prevent the display of noise and retrace lines during the blanking period. . Furthermore, even if level fluctuations occur due to temperature changes, it is possible to prevent noise display.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the overall configuration of a conventional CRT display device, FIGS. 2(A) and 2(B) are video signal waveform diagrams, FIG. 3 is a circuit diagram showing an embodiment of the present invention, and FIG. The figure is a schematic diagram showing a specific configuration of an electronic switch, and FIGS. 5 and 6 are circuit diagrams showing other embodiments of the present invention. Explanation of main drawing numbers (2)...Video signal processing circuit, (dan)...DA
Converter, monitor, (6)...video output circuit, (
81...Bright volume, θD...R-2R
Ladder-resistance network, (1G+...OR gate, Re-
...Level setting circuit, 0 cap...diode, (1!
J...Level setting resistor, (101) to (104)
, 2+1...electronic switch. Applicant: Sanyo Electric Co., Ltd., and 1 other representative: Shizuo Sano, patent attorney Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] (1) A plurality of input terminals for inputting multi-bit video data assigned to one pixel of a display screen, and a video signal connected to the plurality of input terminals and having a gradation obtained by converting the video data from analog to analog. a detection circuit for detecting input of video data corresponding to the lowest level in the black direction of the gradation of the video signal; A video signal processing circuit comprising: a level setting circuit that sets the level of the video signal to a level lower than the lowest level in the black direction determined by the DA converter according to the signal.