JPS6032492A - Field discriminating device of vtr - Google Patents

Abstract

PURPOSE:To eliminate malfunction due to disturbance of a servo system and prevent disorder of picture at the time of reproduction by inverting surely field discriminating output at the time of consecutive recording for every field. CONSTITUTION:Logical units 6, 5 are connected to output side of a vertical synchronizing separator circuit 2 and a horizontal synchronizing signal generating circuit 4, and output side of the unit 6 is connected to set side of an input terminal of S-RFF7, and output side of the unit 5 is connected to reset side through a delay circuit 9. Further, output terminal of FF7 and output side of the unit 5 are connected to a logical unit 10, and output side of the circuit 2 and unit 10 are connected to T-FF11. As field discriminating pulse is led out from the output terminal of FF11, stable recording and reproduction can be made even if abnormality occurs at the time of field discrimination.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to a field discrimination device for preventing malfunctions in the control of a servo circuit in a VTR.

(b) Conventional example Generally, in a VTR that magnetically records and reproduces video information,
During recording, when the magnetic tape (1) is running to the left, the video head records video signals diagonally to the upper left on each video track A, A, B, Ll, etc. y) As shown in FIG. 2, the control signal is recorded on the rack at a pitch corresponding to the video track width using a signal obtained by vertically synchronously separating the control signal for each field.

Here, when attempting to record the information B and B from the information A and A, the control signal is generated at a period of 1/2 of the vertical synchronization signal. , and if the field relationship between A and B is continuous like the first and second fields or the second and first fields, any disturbance in image quality on the playback screen can be completely removed. .

However, if the field relationship between X and B continues in the same field, the continuity of [I horizontal periodic signal 1] will be shifted from ΣH between A and B, resulting in skew distortion that causes curvature at the top of the TV screen. “4-ru.

Conventionally, as shown in FIG. 3, it is required to perform field alignment during splice recording, so a composite sync signal ( For the 1st field, Figure 4 (a), 2nd field
In the case of a field, if the horizontal periodic continuous signal (Fig. 4 (b)) is added, the horizontal periodic continuous signal (for 141 fields, the horizontal periodic continuous signal (Fig.
(b)), Figure 4 (e)) appears for the second field.

Therefore, the voltage shown in FIG. 4 (b) and (c) above is
On the other hand, the voltages shown in FIG. The output from terminal (8) shown in FIG. 4 (G), that is, the period corresponding to the first field shown in FIG. 1 is at a high level.
During the period corresponding to the second field, a low (high) level discrimination output appears. By using this signal to control the servo system and recording the control signal, it is possible to eliminate skew distortion that occurs during continuous shooting.

However, as shown by the broken line in FIG. 6) does not appear, and as a result, even in the second field period, the S-R flip-flop (the force is not reversed, so the second field Even during this period, a high σ level output appears from the terminal (8), and therefore the vertical synchronizing signal cannot be divided into 1.

If such a signal is led to a servo circuit (not shown), the carburetor tongue and cylinder servo system will be greatly disturbed and malfunction, causing screen disturbances during playback.

(C) Purpose of the Invention The present invention reliably inverts the field discrimination output for each field during conventional continuous recording, eliminates malfunctions caused by disturbances in the servo system, and prevents screen disturbances during playback. Purpose Z).

B) Structure of the Invention The present invention comprises a composite synchronization signal supply means, a vertical synchronization separation circuit, and -! -H blocking circuit, a horizontal periodic signal generation circuit, first and second AND means connected to each output side of the vertical synchronization signal separation circuit and the horizontal periodic signal generation circuit;
and the output side of the second AND gate is connected to the input terminal of the S-R flip-flop, one directly and the other via a delay circuit, so that the output terminal of the S-R flip-flop and the output of the AND gate are connected to each other. The terminal is connected to the input of the third AND gate, the output thereof is connected to the input terminal of the T-norm flip-flop, and the field discrimination pulse is derived from the output terminal of the 1'-7 flip-flop.

(E) When the present invention is explained according to the drawings of the embodiment, FIG.
FIG. 6 is a block diagram showing a TR field discrimination device, and FIG. 6 shows a timing chart of the same device. In FIG.
Elements that are the same as those in FIG. 3 are given the same figure numbers.

In FIG. 5, (9) is a delay circuit, αO) is an AND gate, the input side of which is connected to the output side of the AND gate 5) and composite gate (6), and ■ is an l-flip-flop. The output side of the vertical synchronization separation circuit (2) is connected to the T terminal, the output side of the A, N I) gate 001 is connected to the R terminal, and the output terminal 07:I is connected to the Q terminal of the T-7 lip-flop (111). It is being

Next, the operation of the present invention will be explained using the timing chart of FIG. In Figure 6, (a) is the second
Field pulse corresponding to the field, (b) is the first
Field pulse corresponding to the field, (c) is R-
S flip-flop (Q output of power, ni) is the 'r terminal input of T-7 lip 70 tube (11), (e) is the output of AND game) (10), (g) is the 'r-flip flop's input. (
If) shows the output.

In the above timing chart, the first three vertical periods show normal input, and if the first field pulse is detected at timing a but the second field pulse is detected, the second field pulse is detected at timing b. This shows a case where the first field pulse is detected when it should be detected [2].

Now, in FIG. 5, a composite video signal is applied to the input terminal (13), a vertical synchronization signal is derived from the composite synchronization signal obtained from the composite synchronization signal supply means (1) in the vertical synchronization separation circuit, and the composite gate (6 ) Apply pressure. On the other hand, one in the multiple equalization pulse period! -1] remove the signal, derive a horizontal period continuous signal from the water half period signal generation circuit (4), and
In addition to the gate (5), a vertical synchronization signal is also derived from the vertical synchronization separation circuit (2) and applied to the composite gate (6).

Here, the output of the AND gate (5) is that both the horizontal periodic continuous signal and the vertical synchronizing signal are challenged only during the level period, while the output of the composite gate (6) is the inverted signal of the horizontal periodic continuous signal. Appears only when the vertical synchronization signal is at the No.I level. The output of the AND gate (5) is delayed by a delay circuit (9) by a time Td, and the former is generated as a pulse for the second field and the latter as a pulse for the first field. is set or reset.

As a result, the above-mentioned R-S flip-flop (force is shown in Fig. 6←→
As shown in Fig. 6, the second field pulse (Fig. 6 (a)) rises (set) at bl, and then the first field pulse (Fig. 6 (b)) starts from a to the delay circuit (9) K. After the delay time (Td), it falls (reset) and rises (set) again as the second field pulse b, K, even if the pulse a2 of the first field pulse is missing due to the influence of a weak electric field, etc.・Maintain the ση level and
It falls at a timing delayed by Td of field pulse a3 (is reset).

At this time, a vertical synchronizing signal is applied to the T terminal of the T-flip-flop 01) as shown in FIG.
The output of the ND game (10) has the waveform shown in FIG.
- The flip-flop (11) repeats inversion every time the vertical synchronizing pulse (Fig. 6 (E)) is input to the T terminal without applying any sector, and the output terminal (17J) outputs the discrimination output (Fig. 6 (E)). ) appears.

In the above-mentioned FIG. 6 (b), in the first field pulse, a,
explained the lack of b in the second field Kurusu.
3, b4 next 11. Even if 1.7 is missing, R-S
The flip-flop (7) maintains the L level and does not invert, and in addition to the above, some abnormality occurs during field discrimination, and the first and second flip-flops
Even if the field pulses are not selected sequentially, an output similar to the discrimination pulse appears.

Therefore, by applying such an output to the servo system circuit, stable recording and reproduction can be performed. .

(f) Effects of the Invention According to the present invention, even if a part of the field pulse is missing due to the influence of a weak electric field or the like and the first field pulse and the second field pulse are not selected sequentially, the field discrimination pulse has a predetermined polarity. Therefore, disturbances in the servo system can be prevented from occurring, unlike in the conventional case, and there is no disturbance in the screen.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram for explaining a VTR field discrimination device, Fig. 2 is a control pulse waveform, Fig. 3 is a block diagram showing a conventional VTR field discrimination device, and Fig. 4 is a diagram illustrating a conventional VTR field discrimination device. FIG. 5 is a block diagram of the same device of the present invention, and FIG. 6 is a timing chart of the same device in FIG. 5. Explanation of main figure numbers (1)...Composite synchronization signal supply means, (2)...Vertical synchronization separation circuit, (3)...-! -n blocking circuit;
(4)...Horizontal periodic signal generation circuit, t5)QO)・
...AND gate, (6)...Composite gate, (Power...S-R flip-flop, (9)...Delay circuit, θD...T-flip-flop, 0z...
Output terminal. Figure 3 Figure 4 Figure 1 Figure 5 Figure 3

Claims (1)

[Claims] (1) Composite synchronization signal supply means, vertical synchronization separation circuit,
+H blocking circuit, a horizontal periodic signal generation circuit, first and second AND means connected to each output side of the vertical synchronization separation circuit and the horizontal periodic signal generation circuit, and the first and second AND. An S-R flip-flop whose one output side is connected to the set side of the input terminal and whose other output side is connected to the reset side via a delay circuit, the output terminal of the 5-It Norinob flop, and the AND a third logical product means to which the other output side of each child is connected to its input side; and a T to which the output side of the vertical synchronization separation circuit and the output side of the third logical product means are connected. - A field discriminating device for a VTR, comprising a Noritub flop and deriving a field discriminating pulse from the output terminal of the T-7 linop. (2. Claim 1 provides that the output terminal of the vertical synchronization separation circuit is connected to the T terminal of the 1'-norm flip-flop, and the output terminal of the third logical product is connected to the T-flip-flop. A field discriminating device for V T It, characterized in that it is connected to the R terminal of the T-flip-flop and derives a field discriminating pulse from the output terminal of the T-flip-flop.