JPS6033781A - Picture signal correcting device - Google Patents

Abstract

PURPOSE:To prevent deterioration of picture due to flaw on an original picture by selecting a prescribed number of white data and black data from plural designated picture elements and using each average value of the white data and black data as an upper limit and a low limit reference voltage so as to attain A/D conversion. CONSTITUTION:A white density region desired to be white and a black density region on the original picture are designated ahead the scanning of the original picture and respective white and black density regions, e.g., regions surrounded by (n)-(n+5) and (m)-(m+5) are scanned in advance. A signal of a high voltage to the white and of a low voltage to the black at each picture element in the regions scanned in advance is given respectively to a white extraction circuit 1 and a black extraction circuit 2 via an A/D converting circuit 6 and a bus changeover gate 7. A comparison selection circuit 3 selects plural white data among plural white data in the order of higher voltage constituting a white extraction data E and outputs the result as a selected white data LW. Similarly, a selected black data LB is outputted from signals having lower voltages. An average circuit 4 obtains an average value from the selected white and black data respectively and outputs them as a white correction data H and a black correction data B so as to vary a reference voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to an image signal correction device, and more particularly to an image signal correction device for white density and black density regions in an optical reading device for recorded information having halftones.

[Prior art]

An optical reading device for recorded information that has halftones uses a laser beam to scan an original photographic image (hereinafter referred to as an original image) that has continuous gradations, and photoelectrically converts the light reflected from the original image to produce the white image of the original image. For black, a high voltage image signal is obtained, and for black, a low voltage image signal is obtained.

The original images used, especially those for Nice, often cannot be photographed under the best exposure conditions because the shooting conditions such as weather, location, and time vary.

Therefore, many original news images do not have desirable density values in their white density and black density areas.

Generally, an original image printed on photographic paper and having a good density range has a white density of about 0.1 and a black density of about 2.0. However, for the above-mentioned reasons, the above-mentioned white and black density values are usually not obtained in original news images.

In the process of photoelectric conversion, everything is converted into an image signal with an output voltage that is inversely proportional to the density. The image signal is digitally converted to facilitate signal processing, but in this conversion process, it is extremely important to correct the black and white density range of the original image to the above-mentioned density value range for high-quality image reproduction.

In a conventional image signal correction device, in an analog-to-digital conversion circuit that converts an analog image signal read by scanning into a digital image signal, an upper limit reference voltage and a lower limit reference voltage are fixed to set values, and the upper limit reference voltage is and the lower limit reference voltage, for example, are divided into 256 levels (8 bits) of judgment levels, and the supplied analog image signal is converted into a digital code according to the judgment level.

Therefore, if the highest voltage for white of the analog image signal is lower than the upper limit reference voltage, or if the lowest voltage for black is higher than the lower limit reference voltage, the 256-step resolution of the analog-to-digital conversion circuit cannot be obtained. .

Next, the digitally encoded image signal is corrected using corrected data for white and black density values. However, when the signal is not decomposed into 256 steps in analog-to-digital conversion, the -C level resolution cannot be improved by correction.

That is, although the conventional image signal modifying device has a button with a built-in analog-to-digital conversion circuit, it has the disadvantage that it can only output image data whose level is lower than the resolution it has.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide an image signal correction device that can obtain a level degree equivalent to the resolution of an analog-to-digital conversion circuit without being bothered by minute scratches and dust on an original image.

[Structure of the invention]

The image signal correction device of the present invention includes a white oil output circuit that extracts white data from each of a plurality of pixels obtained by scanning a specified white density area of an original image, and a white oil output circuit that extracts white data from each of a plurality of pixels obtained by scanning a specified white density area of the original image. A heat extraction circuit extracts black data from each of a plurality of pixels obtained by scanning, and a plurality of white data are compared with each other, and a predetermined number of white data are selected from those having a high voltage value as white data. and a comparison and selection circuit that compares a plurality of the black data with each other and selects a predetermined number of the black data from those having a low voltage value as selected black data, and calculates the respective averages from the selected white data and the selected black data. An average value circuit that calculates the value and outputs it as white correction data and black correction data, and an image signal obtained by photoelectrically converting the grayscale information obtained by the upper and lower limit voltages of the dynamic range using the white correction data and the black correction data, and converting the image signal to the judgment level. and an analog-to-digital conversion circuit that performs multi-value decomposition according to the following.

[Explanation of Examples]

In the present invention, prior to scanning an original image, a white density area to be made white and a black density area to be made black are specified on the original image, and each white and black density area is pre-scanned. A predetermined number of white data obtained in the pre-scanning is selected from the ones with the highest voltage value, and a predetermined number of the plurality of black data are selected from the ones with the lowest voltage value, and the selected predetermined number of data are By calculating the average values of white data and a predetermined number of black data, and converting these average values into analog-digital data using upper and lower limit reference voltages, the voltage values for white and black of the image signal can be set to predetermined white and black limits, respectively. This is to correct the black voltage value.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

This is a block diagram showing an example of IAi by Kazutomi IAi of Mine 1Md Noboaki Ki, and the image signal correction device includes a white oil output circuit 1, a black extraction circuit 2, a comparison selection circuit 3, an average value circuit 4, a scanning circuit 5, and an analog-to-digital conversion circuit. Contains 6.

Below, the operation of the image signal correction device shown in FIG. 1 will be explained in detail with reference to FIGS. 2 to 9.

FIG. 2 is a detailed block diagram of the white oil outlet circuit l in the embodiment shown in FIG. 1, FIG. 3 is a time chart for explaining the operation of the white oil outlet circuit shown in FIG. 2, and FIG. FIG. 2 is an explanatory diagram of the image signal extraction operation of the white oil output circuit, and FIGS. 5 and 6 illustrate the operation of white data selection and black data selection, respectively, of the comparison and selection circuit 3 in the embodiment shown in FIG. 1. 7 is a detailed block diagram of the average value circuit 4 in the embodiment shown in FIG. 1, FIG. 8 is a waveform diagram for explaining the operation of the embodiment shown in FIG.
This figure is an apparent waveform diagram for explaining the operation of the embodiment shown in FIG. 1.

In FIG. 1, during a pre-scanning period prior to scanning the original image, the read preparation signal P is set to "high" and is supplied to the average value circuit 4.

The storage circuit 404 of the average value circuit 4 shown in FIG. 7 contains reference white data H1° in the white correction data H of 8 bits and 8 bits, all of which represent the reflectance loom. is stored, and is read out during the period when the read preparation signal P is 1.

In FIG. 1, reference white data H10° is supplied to a digital-to-analog conversion circuit Rr11, and after being converted into an analog voltage value, unnecessary frequency components are removed by a low-pass filter 12 and output as an upper limit reference voltage Vlf.

The voltage value of the upper limit reference voltage VH at this time is V+'' volts, where all 8-bit digital codes shown in FIG. .

The memory circuit 405 shown in FIG. 7 represents four reflectances.
The reference black correction data Y0 in the 8-bit thermal correction data Y of low-1 is stored, and is read out during the period when the read preparation signal P is "/.".

In FIG. 1, reference black correction data Y. is supplied to the digital-to-analog conversion circuit 21, converted into an analog voltage value, unnecessary frequency components are removed by the low-pass filter 22, and outputted as the lower limit reference voltage 'XTL. At this time, the voltage value of the lower limit reference voltage vL is such that all 8-bit digital codes shown in FIG. 8 correspond to "low" (+v-I+
In volts, this value becomes the lower limit voltage of the analog-to-digital conversion circuit 6.

In FIG. 1, the scanning circuit 5 uses a leveling signal P
During the period "]・i", pre-scanning is performed prior to the scanning of the original picture, and the artist gA is outputted and supplied to the analog-to-digital conversion circuit 6. The picture number A is a signal that has a high voltage for white in the original picture and a low voltage for black for each pixel.

The analog-to-digital conversion circuit 6 performs 8-bit multi-value conversion according to the voltage value of the image (R) with an upper limit voltage of V + volts and a lower limit voltage of N- volts, and converts the digital image signal B.
The digital image signal Bb at is output. Here, the digital image signal B is composed of a corrected image signal B and a digital image signal Bb, and the corrected image signal B8 is an image signal subjected to signal correction, which will be described later.

During the period when the read preparation signal P is [).iJ, the NOx switching gate 7 supplies the digital image signal Bb to the white oil extraction circuit 1 and the black extraction circuit 2.

The white oil output circuit 1 has a counter 101 as shown in FIG.
, 104, 106 and 110, inverters 102 and 1
03, OR circuit 105, AND circuit lO9, flip-flops 107, 108 and 111, NAND circuit 11
2 and a storage circuit 113, and extracts density data corresponding to a plurality of pixels from a designated white density area of the original image and outputs white oil appearance data E.

Prior to scanning the original image, a density area to be made white is specified in advance on the original image. That is, in this embodiment, as an example, the fourth
As shown in the figure, it is composed of 25 pixel groups consisting of 5 pixels starting at the m-th position from the main scanning start point of each of the 5 scanning lines starting from the 1st scanning line to the nth grain scanning line. The case where the area to be displayed is specified will be explained.

In the following description, the operation of the white oil output circuit 1 shown in FIG. 2 will be described with reference to FIGS. 3 and 4.

The counter 101 is set to (n-1), counts the phase pulses PH from when the read preparation signal P becomes "high", and outputs the output signal a at the trailing edge of the (n-1)th phase pulse. "
Low J state continues until the trailing edge of the next phase pulse.

The counter 104 is set to 5'', which corresponds to the number of scanning lines including the pixels to be extracted, and is calculated from the inverted phase pulse PH whose phase has been inverted by the inverter 102 and the counter 101 whose phase has been inverted by the inverter 103. An inverted output signal of .

The counter 104 is activated when the inverted output signal i is "high" and counts five inverted phase pulses PH. Therefore, the output signal from counter 104 goes "low" at the leading edge of the nth phase pulse, as shown in FIG.
) at the leading edge of the phase pulse, the output signal becomes high J, but during the period Ur: 1-J, the 5
A respective phase pulse PH for a scan line of the book is included.

The OR circuit 105 performs the OR operation between the output signal from the counter 104 and the inverted phase pulse PH.
Five extracted phase pulses d starting from 5th to nth are output.

Next, Cm-1) corresponding to the number of pixels in the main scanning direction from the main scanning start point is set in the counter 106, and is activated every time the extraction phase pulse d is supplied to count the pixel clock S. A "low" extraction start position designation signal e is generated which occurs at the trailing edge of the extraction phase pulse d and disappears after m-1) counts.

The D input of the flip-flop 107 has II 10V II
is supplied with the voltage, is set when the extraction start position designation signal e disappears, makes the output signal from the Q output "high", and is reset by the reset signal R.

However, in the period T of one scanning line, the reset signal R is
This signal remains "low" during a period when the image signal A is not generated.

At the leading edge of the next pixel clock S, when a "high" output signal from the Q output of flip-flop 107 is applied to the D input of flip-flop 108, the 7-lip-flop 108 is set and a "high" output signal from the Q output is applied to the D input of flip-flop 108. pixel position signal f
is output and reset by the reset signal R.

Next, the logical product of the extracted pixel position signal f and the pixel clock S is taken by the logical product circuit 109, and the extracted pixel clock h from the m-th pixel clock from the main scanning start point until the reset signal R is generated is The extracted pixel position signal f is output every r high J period.

The counter 110 indicates the number of extracted pixels in the main scanning direction.
#l is set and starts when the extraction pixel position signal f becomes "high", and when the extraction pixel clock h is counted and 5 clocks are counted, it becomes "high" and the next phase pulse PH becomes "low". The output signal k converted to j is outputted and supplied to the CK input of the flip-flop 111.

The flip 70 knob 111 is supplied with a voltage of II 10V $1 to the D input, is set when the output signal k becomes "high", is reset by the reset signal R, and outputs "low J" from the Q output. An extraction end position signal r is output.

Next, the negative product of the extracted pixel clock h and the extraction end position signal r is taken by the negative product circuit 112, and a convolution signal W having 5 pixel clocks is output, which is stored in the storage circuit 113 and included in the digital image signal Bb. , each corresponding to the write signal W instructs to omit 8-bit pixel data.

The storage circuit 113 is composed of 8 bits and 25 words, and when it has finished storing white data from 25 pixels with 8 bits per pixel and the read request signal G from the comparison and selection circuit 3 is "...I". , the white data sending signal Wl is supplied to the comparison and selection circuit 3, and the white data request signal RD from the comparison and selection circuit 3,
In response to this, the stored white data is read out and supplied as white extraction data E to the comparison and selection circuit 3. The white data selection signal W1 continues until the transmission of the white extraction data E is completed, and when the data processing in the comparison and selection circuit 3 is completed after the transmission is completed, the read request signal G is changed from "low" to "high J". .

Next, the oil-free output N2 is a circuit that specifies a density area that is desired to be black on the Jjc image, extracts density data corresponding to each of a plurality of pixels from the area, and outputs oil-free data F. The circuit configuration and operation are the same as the white oil extraction circuit described above, except that the set values of counters 101 and 106 change depending on the position of the black density specified area (. The data E is replaced with the oil-free data F1 and the white data sending signal W, and the data E is read as the n,4 data sending signal W2.

As shown in FIG. 1, the comparison and selection circuit 3 includes a CPU 31,
几AM 32 and 33 are provided, and among a plurality of white data constituting the white oil output data EQ, constant white data is selected at r9 from the highest voltage data and outputted as selected white data Lw in the selected data L. Also, among the plurality of black data constituting the oil-free data F, a predetermined number of black data are selected from those with low pressure, and the selected black data L in the selected data L is selected.
Output as B.

The operation of the comparison and selection circuit 3 shown in FIG. 1 will be explained below.
This will be explained using the flowcharts of FIGS. 5 and 6. In the following explanation J, a case will be shown in which the sorting port data lLw is composed of five pieces of white data.

As shown in FIG. 5, the comparison and selection circuit 3
After receiving the white data sending signal W1 from (201), tlN# indicating the number of white data received is set to zero, and the RAM
32 is cleared (202).

Next, the white data support code RD1 is supplied to the white oil extraction circuit IK, and the white data is requested for each pixel of the 25 drawings that make up the white extraction data E. The first data of I (referred to as white data) is stored in No. 1 of AM32 (203).

The next white data is requested, and the received white data for the second inspection is received (204), and the white data is read from the 5th flea of f4AM32 and compared with the received white data (205).

As a result of the comparison, the white data with the highest voltage is stored in numbers 1 and 2 of the RAM 32 (206).

Next, compare the third receiving/anti-white data with the white data read from LLAM No. 3202, and if the received white data is low, store the received white data in all No. 3, and the white data from No. 2 is stored in No. 2. Return to When the received white data is high, the white data from No. 2 is stored in No. 3, and the white data read from No. 1 is compared with the received white data. As a result, when the received white data is low, the received white data is stored in number 2, and the white data from number 1 is returned to number 1. When the received white data is high, the white data from No. 1 is stored in No. 2, and the received white data is stored in No. 1.

Repeat in the same way and when (N=5) becomes (207) 6
The second white data is requested and received (209).

If it is not (N=5), add 1 (208), (2
Return to 04). As a result, white data of 5 (i, M) is stored in the RAM 32 from No. 1 to No. 5 in descending order of voltage.

Read white data from 5 lightnings of B, A, and MB2 210
It is compared with the received white data of the sixth person (211). Reception 1
When the white data is high (212), the white data from No. 5 is discarded, and the white data from No. 4 is read out and compared with the received white data (214). When the received white data is low, the received white data is discarded and the white data read from No. 5 is returned to No. 5 (213), and the processing of the 6th received candy white data is completed.

If the comparison result of the 6th received white data and the white data from 4@ is that the received white data is high (215, store the white data from No. 4 in No. 5, read the white data from No. 3, and receive Compare with white data (217).

When the received white data is low, the white data read from No. 4 is returned to No. 4, and the received white data is stored in No. 5 (216
), the processing of the sixth received white data is completed.

The result of comparing the 6th received white data with the white data from 3N is that if the received white data is the same (218 people, store the white data from No. 3 in 4if, read the white data from No. 2, and compare the received white data with the white data from No. 3N). Compare with (220).

When the received white data is low, the white data read from the 3rd incense is returned to number 3, and the received white data is stored in the 4th part (219
), the processing of the 6th received white data is completed.

If the comparison result of the 6th received white data and the white data from 2nd is that the received white data is high (221), the white data from 2nd is stored in 3rd, and the white data is read from 1st. It is compared with the received white data (223).

When the received white data is low, the white data read from the 2nd incense is returned to the 2nd ink, and the received white data is stored in the 3rd position (222
), the processing of the sixth received white data is completed.

If the comparison result of the 6th received white data and the white data from No. 1 is that the received white data is high (224), the white data from the 1st check is stored in the 2nd place, and the received white data is stored in the 1st place. (2
26), the processing of the 6-it received white data is finished. When the received white data is low, the white data read from the 1st part is returned to number 1, and the received white data is stored in the 2nd part (22).
Processing of the sixth received white data is completed.

In the same way, the received white data from the 7th month onwards are processed, and (N
= 25), complete the white data sorting process (227), and if it does not become (N = 25)K, add 1 to (227).
zs), return to (209).

When the white data sorting process is completed, the read l\multiplication signal becomes "high" and the black data sending signal W is output from the heat extraction circuit 2.
2 is supplied to the comparison and selection circuit 3.

The comparison and selection circuit 3 is connected to the heat extraction circuit 2 as shown in FIG.
After receiving the black data sending signal W2 from (301), black!
- Receive data a'fj: Set t"N" to zero and store it in RAM.
33 is cleared (302).

Next, a black data request signal RD is supplied to the heat extraction circuit 2 to request black data for each pixel of the 25 pixels constituting the black extraction data F, and the received black data (hereinafter referred to as received black data) The first data (referred to as ) is stored in RAM number 3301 (303).

The following black data selection operation is shown in FIG. 6 and is the same as the white data selection operation described above when the voltage relationship is completely reversed, and the explanation will be omitted. As a result of the sorting process,
Among the 25 pieces of black data, 5 pieces with the lowest voltage are selected. However, white data is black data, received white data is received black data, RAM32 is 几AM33, reference symbol (2).
Replace the 00) number with the (300) number. The comparison and selection circuit 3 receives the readout instruction signal U from the average value port @4 as “no-i”.
At this time, the stored selected white data Lw and selected black data LB are sequentially read out and supplied to the average value circuit 4.

The average value circuit 4 includes an addition circuit 401 as shown in FIG.
, a register 402, a division circuit 403, and storage circuits 404 and 405, calculates the average value of each of the selected white data LW and the selected black data LB, and outputs 8-bit white correction data H and black correction data Y.

When the average value circuit 4 has no input data to be calculated, it supplies a "high" read instruction signal U from the division circuit 403 to the comparison and selection circuit 3 to request data.

First, a case will be described in which the selection white data Lw is read out in this state. The adder circuit 401 and the register 40 cumulatively add the supplied selected white data LW for each white data of each pixel. When the addition is completed, the addition result is supplied to the division circuit 403.

The division circuit 403 has previously set the number of data to be added as 5'', and divides the addition result by 5'', truncating the remainder and outputs only the quotient as 8-bit white correction data H.

During this time, the storage circuit 404 receives the selection white data sending signal M1.
is supplied and instructs data writing, so the white correction data H from the division circuit 403 is stored in the storage circuit 404.

After the calculation of the selected white data LW is completed and the read instruction signal U becomes "high" again, the selected black data LB is read out.
The same calculation as above is performed in the average value circuit 4, and the black correction data Y is stored in the storage circuit 405 according to the instruction of the selected black data sending signal M2.

The white correction data H and black correction data Y obtained in this way include minute scratches and dust on the original image, etc. If there is an abnormal output voltage value in , this is the average value of 5 pixel data each having density values close to the pre-specified white density and black density from which those abnormal data have been removed. Density data for white and black density is obtained.

In FIG. 1, when the pre-scanning of the original image is completed, the reading preparation signal P
is "low", white correction data H and black correction data Y are read out from storage circuits 404 and 405 of average value circuit 4, respectively.

The white correction data H is converted into an analog voltage value by the digital-to-analog conversion circuit 11, passes through the low-pass filter 12, and is outputted as the upper limit reference voltage VH of .degree.I.wl' volts shown in FIG.

The point correction data Y is converted into an analog voltage value by a digital-to-analog conversion circuit 21, passes through a low-pass filter 22, and is output as a lower limit reference voltage L of II V, 11 volts as shown in FIG.

The upper limit reference voltage VH and the lower limit reference voltage vL can be fully supplied to the analog-to-digital conversion circuit 6.

Next, the scanning circuit 5 scans the original image, outputs an image signal A corresponding to the quality information recorded on the original image, and supplies it to the analog-to-digital conversion circuit 6.

The analog-to-digital conversion circuit 6 converts the upper limit reference voltage H and 'VW' of 'VW' volts in response to the voltage value of the image signal A.
(2) lower limit reference voltage of B'' volts (2) upper and lower limit voltages regulated by L] is converted into 8-bit digitally encoded data, and the corrected image signal B is passed through the bus switching gate 7.

Bind and output.

FIGS. 8 and 9 show waveform diagrams of the above operation. In FIG. 8, the vertical axis shows the input voltage of the analog-to-digital conversion circuit 6, and the horizontal axis shows the period T of one scan.

Now, the image signal A shown in FIG.
When analog-digital conversion is performed using volts as the upper limit reference voltage 'Jil and @ v ll volts as the lower limit reference voltage ■L, the analog-to-digital conversion circuit 6 has 256
It is clear that stepwise resolution cannot be obtained, and when the digital image signal obtained in this way is recorded and reproduced, the density difference between white and black cannot be obtained, and an image with good contrast cannot be obtained.

When tyW#' volts shown by the dashed line in FIG. The parts are white, ``mouth'' and -・
'' portion is black, but the other portions have the full resolution of the analog-to-digital conversion circuit 6.

In addition, when specifying a specific density area in the white and black density areas on the original image,
This is the concentration range where it is determined that regeneration is not necessary.

Therefore, when the corrected image signal B is recorded and reproduced, an image with good contrast can be obtained.

FIG. 9 shows the apparent image signal A corresponding to the judgment classification of the analog-to-digital conversion circuit 60 when the upper limit reference voltage vH'1ctt Vw#l volts and the lower limit reference voltage VL are set to (IyBII volts). It is.

〔Effect of the invention〕

As described above, the image signal correction system of the present invention adds a white oil output circuit, a no oil output circuit, a comparison selection circuit, and an average value circuit15, fixes the upper limit reference voltage and the lower limit reference voltage, and performs analog-to-digital conversion. A predetermined number of white data with a high voltage value and a predetermined number of black data with a low voltage value are extracted from white data and black data from multiple pixels corresponding to specified white and black density areas on the original image, respectively. The data is sorted, and the average value of a predetermined number of selected white data and black data is set as the upper and lower reference voltages. Since it is possible to obtain a level degree equal to , there is an effect that the image quality can be improved.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing one embodiment of the present invention, Fig. 2 is a detailed block diagram of the white oil output circuit in the embodiment shown in Fig. 1, and Fig. 3 is a detailed block diagram of the white oil output circuit shown in Fig. 2. A time chart for explaining the operation, FIG. 4 is an explanatory diagram of the operation of image signal extraction of the white oil output circuit shown in FIG. 2, and FIGS. 5 and 6 are comparison and selection circuits in the embodiment shown in FIG. 1. FIG. 7 is a detailed block diagram of the average value circuit in the embodiment shown in FIG. 1, and FIG. 8 is a detailed block diagram of the average value circuit in the embodiment shown in FIG. 1. FIG. 9 is an apparent waveform diagram for explaining the operation of the embodiment shown in FIG. 1. Circuit, 3... Comparison and selection circuit, 4... Average value circuit, 5... Scanning circuit, 6... Analog-to-digital conversion circuit, A... ...Picture signal, B
...Digital image signal, B...Both corrected signals, E...White oil output data, F...
No oil release data, L...Selection data, H...
...White correction data, Y...Heat correction data, ■H
......Upper limit reference voltage, ■L...Lower limit reference voltage. ,t I F;'I Data 7 Eyes & Hoof 1---------ytrmfRft-
------yx-ts-----Arashi 71-
Sonodai q mouth

Claims (1)

[Claims] a white oil extraction circuit that extracts white data from each of a plurality of pixels obtained by scanning a designated white density area of the original image;
A black extraction circuit extracts black data from each of a plurality of pixels obtained by scanning a specified black density area of the original image, and a black extraction circuit extracts black data from each of a plurality of pixels obtained by scanning a specified black density region of the original image, and a black extraction circuit extracts black data from each of a plurality of pixels obtained by scanning a specified black density region of the original image, and a black extraction circuit extracts black data from each of a plurality of pixels obtained by scanning a specified black density region of the original image, and a black extraction circuit extracts black data from each of a plurality of pixels obtained by scanning a specified black density region of the original image, and a black extraction circuit extracts black data from each of a plurality of pixels obtained by scanning a specified black density region of the original image. a comparison and selection circuit that selects a predetermined number of the white data as selected white data, compares a plurality of the black data with each other, and selects a predetermined number of the black data as selected black data from those having a lower voltage value; An average value circuit that calculates respective average values from the white data and the selected black data and outputs them as white correction data and black correction data, and a determination between the upper and lower limit voltages of the dynamic range using the white correction data and the black correction data. An image signal correction device comprising: an analog-to-digital conversion circuit that performs multi-value decomposition of an image signal whose level is controlled and which is obtained by photoelectrically converting gradation information recorded on the original image according to the determination level.