JPS6037132A - Fluidizing method of phosphorus silica glass or phosphorus boron silica glass - Google Patents

Fluidizing method of phosphorus silica glass or phosphorus boron silica glass

Info

Publication number
JPS6037132A
JPS6037132A JP58144417A JP14441783A JPS6037132A JP S6037132 A JPS6037132 A JP S6037132A JP 58144417 A JP58144417 A JP 58144417A JP 14441783 A JP14441783 A JP 14441783A JP S6037132 A JPS6037132 A JP S6037132A
Authority
JP
Japan
Prior art keywords
temperature
phosphorus
silica glass
semiconductor substrate
glass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58144417A
Other languages
Japanese (ja)
Inventor
Tatsumi Hiramoto
立躬 平本
Tetsuharu Arai
荒井 徹治
Yoshiki Mimura
芳樹 三村
Hiroshi Shimizu
洋 清水
Satoru Fukuda
悟 福田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ushio Denki KK
Ushio Inc
Original Assignee
Ushio Denki KK
Ushio Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ushio Denki KK, Ushio Inc filed Critical Ushio Denki KK
Priority to JP58144417A priority Critical patent/JPS6037132A/en
Publication of JPS6037132A publication Critical patent/JPS6037132A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials

Landscapes

  • Re-Forming, After-Treatment, Cutting And Transporting Of Glass Products (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は半導体に被着した燐硅酸ガラス(以下P8Gμ
言1”+ )t L(げ播硼去硅酔ガラス(DI下PB
SGと言う)の流動化法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to phosphorus silicate glass (hereinafter referred to as P8Gμ) adhered to a semiconductor.
1"+)t L
This is related to the fluidization method of SG.

半導体素子の表面には、主に絶縁層を形成するためにP
SG−?PBSGの薄膜が被着され、この薄膜には例え
ばアルミニウム配線の取出口として直径6μm程度の孔
が設けられる。この状況を第1図によって説明すると、
シリコン基板1には表面から深さdの硼素打込み層1a
が形成され、更に表面にはPSGまたはPBSGの薄膜
2が被着され、この薄膜2に孔2aが形成されて図示路
の配線がシリコン基板1に接続され、(t2aを通って
取出される。このと!、JL2aの角部AやBが鋭い場
合は配線がその部分で切断する不良が発生する危険性が
おるため、PSGやPBSGを加熱して流動化し、角部
AやBに多少丸味を与えている。この工程はりフロ一工
程と呼ばれているが、蒸着されたPSGやPBSGの薄
膜2にエツチングで孔2a′ft6けると角部AやBは
鋭くなるので、はとんどの場合にリフロ一工程が必要と
なる。そこで従来は、リフロ一工程として電気炉で10
00℃の温度で60分間程度加熱することによりPSG
やPBSGを流動化していた。しかしながら、このよう
に長時間加熱すると、シリコン基板中の不純物、前記の
例では硼素が大きく熱拡散してしまうので、シリコン基
板の平面方向と深さ方向の微細化が達成されず、最近の
半導体素子の微細化の要語に適さない不具合があった。
P is mainly used to form an insulating layer on the surface of a semiconductor element.
SG-? A thin film of PBSG is deposited, and a hole of about 6 μm in diameter is provided in this thin film as an outlet for, for example, aluminum wiring. To explain this situation using Figure 1,
A boron implanted layer 1a is formed on the silicon substrate 1 to a depth d from the surface.
Further, a thin film 2 of PSG or PBSG is deposited on the surface, and a hole 2a is formed in this thin film 2, and the wiring shown in the diagram is connected to the silicon substrate 1 and taken out (through t2a). In this case, if the corners A and B of JL2a are sharp, there is a risk that the wiring will be cut at those parts. This process is called the beam flow process, but when the holes 2a'ft6 are etched into the deposited PSG or PBSG thin film 2, the corners A and B become sharp. In some cases, a reflow process is required.Therefore, in the past, one reflow process was performed using an electric furnace for 10 minutes.
By heating at a temperature of 00℃ for about 60 minutes, PSG
and PBSG were liquidated. However, when heated for a long time in this way, the impurities in the silicon substrate, boron in the above example, undergo significant thermal diffusion, making it impossible to achieve finer silicon substrates in both the planar and depth directions. There were some problems that made it unsuitable for the miniaturization of elements.

そこで本発明は上記の事情に鑑みてなされたものであっ
て、その目的は、半導体基板中の不純物の拡散が大きく
ならないようなりフロ一工程に適したPSGやPBSG
の流動化法を提供することにあり、その特徴は、石英ガ
ラスを透過する波長を主成分とする光を半導体基板に照
射して昇温せしめ、その熱で該半導体基板に被着したP
SGもしくはPBSGを加熱流動せしめるにあたって、
半導体基板が1000℃以上の温度に保持される時間t
(秒)とその温度T (℃)との関係を 120≦fc
T−1000) dt≦1600に規定するところにあ
る。ここにおいて、tについての積分はT≧1000℃
に保持されている時間t(秒)について(T−1000
)(℃)を積分した値を意味する。
Therefore, the present invention has been made in view of the above-mentioned circumstances, and its purpose is to produce a PSG or PBSG suitable for a one-flow process so as to prevent the diffusion of impurities in a semiconductor substrate from becoming large.
The main purpose of this method is to irradiate a semiconductor substrate with light whose main component is a wavelength that can be transmitted through quartz glass, raise the temperature, and use the heat to fluidize the P adhered to the semiconductor substrate.
When heating and fluidizing SG or PBSG,
Time t during which the semiconductor substrate is held at a temperature of 1000°C or higher
(seconds) and its temperature T (℃) is 120≦fc
T-1000) dt≦1600. Here, the integral with respect to t is T≧1000℃
Regarding the time t (seconds) held in (T-1000
)(℃) means the integrated value.

以下に図面を参照しながら本発明の実施例について説明
する。
Embodiments of the present invention will be described below with reference to the drawings.

第2図は、本発明を実施するための光照射炉の概略の説
明図であって、6は棒状に長いノ・ロゲン白熱電球、4
はミラーであり、電球3及びミラー4はいづれも、水冷
や空冷等の冷却機構によって十分に冷却される。1はシ
リコン基板であり、窒素などの保睦ガスが充たされた石
英容器もしくは通路部材6内において、五徳状の石英支
持台(図示せず)で支持されている。シリコン基板1は
主に、ハロゲン白熱電球3によって加熱昇温せしめられ
る。
FIG. 2 is a schematic explanatory diagram of a light irradiation furnace for carrying out the present invention, in which numeral 6 indicates a long rod-shaped non-rogen incandescent lamp;
is a mirror, and both the light bulb 3 and the mirror 4 are sufficiently cooled by a cooling mechanism such as water cooling or air cooling. Reference numeral 1 denotes a silicon substrate, which is supported by a trivet-shaped quartz support (not shown) in a quartz container or passage member 6 filled with a preservation gas such as nitrogen. The silicon substrate 1 is heated mainly by a halogen incandescent light bulb 3 to raise its temperature.

第5図は基板の加熱昇温曲線の一例であって、直径4イ
ンチ、厚さ約0.5屋の< 100 > n型シリコン
基板に、注入エネルギー40 KeVで4X1015個
/−の硼素イオンを打込んだものを、1,5秒かけて1
000℃まで昇温させ、更に、1160℃で約4秒保持
し、以後加熱を止めた時の時間一温度の経過を示し、そ
の場合のPSGの流動化状態を第4図に示す。
Figure 5 shows an example of a heating temperature rise curve for a substrate, in which 4 x 1015/- boron ions were implanted at an implantation energy of 40 KeV into a <100> n-type silicon substrate with a diameter of 4 inches and a thickness of about 0.5 mm. What you typed, it takes 1.5 seconds to
Figure 4 shows the time-temperature progression when the temperature was raised to 1,160°C, held at 1,160°C for about 4 seconds, and then heating was stopped, and the fluidized state of PSG in that case.

この第4図は基板1の断面のSEM写真をスケッチした
ものであって、薄膜2は7重量%の燐を含有したPSG
を蒸着し、孔2aはエツチング法によりあけたものであ
る。そして(イ)は前記のりフロ一工程前の状態ゲ、(
ロ)はりフロ一工程後の状態を示すが、(イ)の状態で
は角部AやBが鋭く、前述の通り配線が断線する危険性
が非常に大きい。
This Figure 4 is a sketch of an SEM photograph of the cross section of the substrate 1, in which the thin film 2 is made of PSG containing 7% by weight of phosphorus.
was vapor-deposited, and the holes 2a were made by etching. And (a) is the state before the glue flow step, (
B) The state after the first beam flow process is shown. In the state of (A), the corners A and B are sharp, and as mentioned above, there is a very high risk that the wiring will break.

これに対して(ロ)の状態では角部AやBは流動化され
て丸味を帯びており、断線不良はほとんど発生しない。
On the other hand, in the state (b), the corners A and B are fluidized and rounded, and almost no disconnection occurs.

この(ロ)の状態は、従来の電気炉法によるリフロ一工
程で実施すると温度1000℃に約20分間保持した場
合に対応し、そしてこの場合、pn接合深さは加熱前が
α66μmであったものが、0.85μmとなって大き
く拡散するが、前記の実施例では加熱後でα45μmで
あり、結局硼素の拡散については、従来の電気炉法の場
合の約半分程度に抑制しながら、PSGの流動化に関し
ては同程度のものを得ることが可能であることが分る。
This state (b) corresponds to the case where the temperature is maintained at 1000°C for about 20 minutes when carried out in one reflow process using the conventional electric furnace method, and in this case, the pn junction depth was α66 μm before heating. However, in the above example, the diameter was 45 μm after heating, and in the end, boron diffusion was suppressed to about half that of the conventional electric furnace method, while PSG It turns out that it is possible to obtain the same level of fluidization.

ところで、本発明では、上記実施例からも理解されるよ
うに、石英容器を透過してくる光で半導体基板を、殆ん
ど瞬間的と言って良い程度の短時間で昇温し、そして、
短時間高温保持するものであるが、従来の電気炉法に比
べて、十分に拡散を抑制した状態でPSGt−流動化し
ようとする場合、高温保持温度が尚ければ保持時間は短
かくした方が艮いこと、高温保持温度が低ければ、ある
程度、その保持時間は延ばせるし、また延ばした方が良
いことなどが分り、本発明では、鋭意研究した結果、半
導体基板が1000℃以上の温度に露呈されている時間
内の、1000℃から計った温度の積分値(第6図で斜
線で示す面積)つまり、fCT−1000)dt =$
C’C・秒)に\において、Tは基板の温度℃、tは1
000℃以上に露呈されている時間秒)でとらえると良
いことが分った。尚、この時の温度は、直径0.5fi
のクロメル/アルメル熱電対を酸化し黒化したものを基
板に接触させて測定して得られた温度とする。そして上
記のfの値を変化させて流動化の程度と不純物の拡散の
度合を示すとpn接合の深さを調べたところ、pn接合
の深さは加熱前の深さを基準にして、従来の電気炉法で
は200チ以上増加するが、本発明ではfの値が160
0以下であれば約60チ増加するのみであり、結晶の微
細化の要請に十分応じられることが確認された。なお、
第6図に示す加熱例ではfの値は約760であり、pn
接合の深さ増加率は約25チである。一方、このfの値
が低すぎると流動化が不十分であるが、下限値として1
20以上必要であり、これより小さいと配線が断線する
危険性が大きく、結局、120≦f≦1600であれば
配線が断線する危険性が殆んどなく、かつ結晶の微細化
の要請に応じられることが確1αできた。
By the way, in the present invention, as can be understood from the above embodiments, the temperature of the semiconductor substrate is raised almost instantaneously in a short time using light transmitted through the quartz container, and
Although the high temperature is held for a short period of time, compared to the conventional electric furnace method, when attempting to fluidize PSGt with sufficient diffusion suppression, it is better to shorten the holding time if the high temperature holding temperature is not sufficient. It was found that if the high temperature holding temperature is low, the holding time can be extended to some extent, and it is better to extend the holding time.As a result of intensive research, in the present invention, as a result of intensive research, we have found that it is possible to extend the holding time to a certain extent if the high temperature holding temperature is low. The integral value of the temperature measured from 1000°C during the exposure time (area shown with diagonal lines in Figure 6), that is, fCT-1000) dt = $
C'C・sec), T is the temperature of the substrate in °C, and t is 1
It has been found that it is best to measure the temperature in terms of the time (in seconds) during which it is exposed to temperatures of 000°C or higher. In addition, the temperature at this time is 0.5fi in diameter.
The temperature is measured by contacting a chromel/alumel thermocouple that has been oxidized and blackened to the substrate. The depth of the pn junction was investigated by changing the value of f above to show the degree of fluidization and the degree of diffusion of impurities. In the electric furnace method, f increases by more than 200 inches, but in the present invention, the value of f increases by 160
It was confirmed that if it is less than 0, the increase will be only about 60 inches, which can fully meet the demands for finer crystals. In addition,
In the heating example shown in FIG. 6, the value of f is approximately 760, and pn
The depth increase rate of the bond is about 25 inches. On the other hand, if the value of f is too low, fluidization will be insufficient, but the lower limit is 1
20 or more is required; if it is smaller than this, there is a great risk that the wiring will break. In the end, if 120≦f≦1600, there is almost no risk of the wiring breaking, and it can meet the demands for finer crystals. I was pretty sure that it would happen.

更に、硼素をドーグしたP S G、つまりPBSGに
ついても同じ試験を行ったところ、同じく120≦f≦
1600の範囲で好結果が得られた。
Furthermore, when we performed the same test on PSG (PBSG) containing boron, we found that 120≦f≦
Good results were obtained in the range of 1600.

本発明は、以上記述した実施例からも理解されるように
、半導体基板に被着した、王に絶縁層を形成させるため
のPSGもしくはPBSGの流動化法において、従来電
気炉法で実施していた流動化法が、最近の半導体素子の
微細化傾向に対応しきれないことに鑑み、新しい流動化
法を鋭意研究したところ得られたものであって、石英ガ
ラスを透過する波長を主成分とする光を半導体基板に照
射し、その基板を殆んど瞬間的に昇温せしめ、その熱で
PSGもしくはPBSGを流動化するもので、基板が1
000℃以上に保持される時間(秒)とその温度(u)
との関係を120≦f(T−1000)dt≦1600
に規定して、電気炉法に比べて、不純物の拡散を抑制し
ながら実施するところに特徴がある。
As can be understood from the embodiments described above, the present invention is a method for fluidizing PSG or PBSG for forming an insulating layer on a semiconductor substrate, which has conventionally been carried out using an electric furnace method. In view of the fact that the conventional fluidization method cannot keep up with the recent trend toward miniaturization of semiconductor devices, this new fluidization method was developed through intensive research. This method irradiates a semiconductor substrate with light that raises the temperature of the semiconductor substrate almost instantaneously, and the heat fluidizes PSG or PBSG.
Time (seconds) maintained at 000℃ or higher and its temperature (u)
The relationship is 120≦f(T-1000)dt≦1600
Compared to the electric furnace method, this method is characterized in that it is carried out while suppressing the diffusion of impurities.

また、イオン打込みの際に発生した結晶損傷の回復およ
びイオン不純物の電気的活性化を図る目的で行う高温ア
ニールと兼用することが可能であり、本発明で規定した
温度一時間条件で半導体基板を加熱すれば、−回の処理
で比較的浅いpn接合を満たしたうえで、十分な活性化
とりフローとを実現できる利点を有する。
In addition, it can also be used as high-temperature annealing to recover crystal damage caused during ion implantation and to electrically activate ionic impurities. Heating has the advantage that a relatively shallow p-n junction can be filled in one cycle of processing and a sufficient activation flow can be achieved.

更に他の実施例について触れるならば、光源としては閃
光放電灯のような放電灯類も利用でき、基板の周囲雰囲
気は、アルゴンのような不活気体でもよい。
In yet another embodiment, a discharge lamp such as a flash discharge lamp may be used as the light source, and the atmosphere surrounding the substrate may be an inert material such as argon.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図と第4図は要部の断面図、第2図は光照射針の概
略図、第6図は半導体基板の加熱昇温曲線の一例をそれ
ぞれ示す。 1・・・半導体基板 1a・・・イオン打込み層2・・
・ガラス薄膜 2a・・・孔 6・・・ランプ4・・・
ミラー A、B・・・角部 出願人 ウシオ電機株式会社 代理人 弁理士 田原寅之助 第を図 第3図 時間(ψ 第4図
FIGS. 1 and 4 are cross-sectional views of essential parts, FIG. 2 is a schematic diagram of a light irradiation needle, and FIG. 6 is an example of a heating temperature rise curve of a semiconductor substrate. 1... Semiconductor substrate 1a... Ion implantation layer 2...
・Glass thin film 2a...hole 6...lamp 4...
Mirror A, B...Kakube Applicant Ushio Inc. Agent Patent Attorney Toranosuke Tahara Figure 3 Time (ψ Figure 4

Claims (1)

【特許請求の範囲】[Claims] 石英ガラスを透過する波長を主成分とする光を半導体基
板に照射して昇温せしめ、その熱で該半導体基板に被着
した燐硅酸ガラスもしくは燐硼素硅酸ガラスを加熱流動
化せしめるにあたって、半導体基板が1000℃以上の
温度に保持される時間t(秒)とその温度T (℃)と
の関係を120≦fcT−1000) dt≦1600
に規定してなることを特徴とする燐硅酸ガラスもしくは
燐硼素硅酸ガラスの流動化法。
In irradiating a semiconductor substrate with light whose main component is a wavelength that can be transmitted through quartz glass to raise the temperature, and using the heat to heat and fluidize the phosphorus silicate glass or phosphorus borosilicate glass adhered to the semiconductor substrate, The relationship between the time t (seconds) during which the semiconductor substrate is held at a temperature of 1000°C or higher and the temperature T (°C) is 120≦fcT-1000) dt≦1600
A method for fluidizing phosphosilicate glass or phosphoborosilicate glass, characterized in that the method is characterized in that it is made as specified in
JP58144417A 1983-08-09 1983-08-09 Fluidizing method of phosphorus silica glass or phosphorus boron silica glass Pending JPS6037132A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58144417A JPS6037132A (en) 1983-08-09 1983-08-09 Fluidizing method of phosphorus silica glass or phosphorus boron silica glass

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58144417A JPS6037132A (en) 1983-08-09 1983-08-09 Fluidizing method of phosphorus silica glass or phosphorus boron silica glass

Publications (1)

Publication Number Publication Date
JPS6037132A true JPS6037132A (en) 1985-02-26

Family

ID=15361686

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58144417A Pending JPS6037132A (en) 1983-08-09 1983-08-09 Fluidizing method of phosphorus silica glass or phosphorus boron silica glass

Country Status (1)

Country Link
JP (1) JPS6037132A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916346A (en) * 1982-07-19 1984-01-27 Matsushita Electronics Corp Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916346A (en) * 1982-07-19 1984-01-27 Matsushita Electronics Corp Manufacture of semiconductor device

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