JPS603907U - VTR audio signal recording circuit - Google Patents

VTR audio signal recording circuit

Info

Publication number
JPS603907U
JPS603907U JP9714483U JP9714483U JPS603907U JP S603907 U JPS603907 U JP S603907U JP 9714483 U JP9714483 U JP 9714483U JP 9714483 U JP9714483 U JP 9714483U JP S603907 U JPS603907 U JP S603907U
Authority
JP
Japan
Prior art keywords
mode
output
signal
channel
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9714483U
Other languages
Japanese (ja)
Other versions
JPH0320936Y2 (en
Inventor
小森 嘉則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP9714483U priority Critical patent/JPS603907U/en
Publication of JPS603907U publication Critical patent/JPS603907U/en
Application granted granted Critical
Publication of JPH0320936Y2 publication Critical patent/JPH0320936Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Television Receiver Circuits (AREA)
  • Television Signal Processing For Recording (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図面は本考案回路の1実施例の構成図である。 主な図番の説明、2・・・信号処理回路、3・・・エン
コーダ、4・・・付与手段、5・・・モード指令手段、
6・・・スイッチ回路、7・・・音声記録回路、8・・
・制御回路。
The drawing is a block diagram of one embodiment of the circuit of the present invention. Explanation of main figure numbers, 2...Signal processing circuit, 3...Encoder, 4...Giving means, 5...Mode command means,
6...Switch circuit, 7...Audio recording circuit, 8...
・Control circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] テレビジョン音声多重信号を入力して該テレビジョン音
声多重信号を処理し該テレビジョン音声多重信号がステ
レオン番組であるときその指示信号を出力する第1出力
端子、及び左(又は主)チー9ネル、右(又は副)チャ
ネル各信号をそれぞれ出力する第2、第3出力端子を有
する信号処理回路と、前記第2、第3出力端子からの信
号を入力して磁気テープのビデオトラック上に格納する
ための音声信号を構成するエンコーダと、該エンコーダ
出力を前記ビデオトラックを走査する第1磁気ヘツドに
付与する手段と、合成モード、左チヤネルモード、右チ
ヤネルモードを択一的に選択するモード指令手段と、前
記第2、第3各出力端子からの各信号を入力して、スイ
ッチング動作が前記モード指令手段出力に基づき制御さ
れるスイッチ回路と、該スイッチ回路出力を前記磁気テ
ープの長手方向に開設されたトラックに対峙する第2磁
気ヘツドに付与する音声記録回路と、前記第1出力端子
からの上記指示信号に基づき前記モード指令手段の設定
モードの如何に拘らず前記スイッチ回路を所定モードに
自動的に設定する制御回路とを備えてなるVTRの音声
信号記録回路。
a first output terminal for inputting a television audio multiplex signal, processing the television audio multiplex signal, and outputting an instruction signal when the television audio multiplex signal is a stereo program; and a left (or main) channel 9; a signal processing circuit having second and third output terminals for outputting channel, right (or sub) channel signals, respectively, and inputting signals from the second and third output terminals to output signals on a video track of a magnetic tape. an encoder for configuring an audio signal for storage; means for applying the encoder output to a first magnetic head for scanning the video track; and a mode for selectively selecting a synthesis mode, a left channel mode, and a right channel mode. a command means; a switch circuit which receives signals from the second and third output terminals and whose switching operation is controlled based on the output of the mode command means; and a switch circuit which controls the output of the switch circuit in the longitudinal direction of the magnetic tape and an audio recording circuit applied to a second magnetic head facing a track opened in the first output terminal, and the switch circuit is set to a predetermined mode regardless of the setting mode of the mode command means based on the instruction signal from the first output terminal. An audio signal recording circuit for a VTR, comprising a control circuit for automatically setting.
JP9714483U 1983-06-22 1983-06-22 VTR audio signal recording circuit Granted JPS603907U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9714483U JPS603907U (en) 1983-06-22 1983-06-22 VTR audio signal recording circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9714483U JPS603907U (en) 1983-06-22 1983-06-22 VTR audio signal recording circuit

Publications (2)

Publication Number Publication Date
JPS603907U true JPS603907U (en) 1985-01-12
JPH0320936Y2 JPH0320936Y2 (en) 1991-05-07

Family

ID=30231201

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9714483U Granted JPS603907U (en) 1983-06-22 1983-06-22 VTR audio signal recording circuit

Country Status (1)

Country Link
JP (1) JPS603907U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58166512A (en) * 1982-03-26 1983-10-01 Hitachi Ltd magnetic recording and reproducing device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58166512A (en) * 1982-03-26 1983-10-01 Hitachi Ltd magnetic recording and reproducing device

Also Published As

Publication number Publication date
JPH0320936Y2 (en) 1991-05-07

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