JPS604031U - Auto scan stop level setting circuit - Google Patents

Auto scan stop level setting circuit

Info

Publication number
JPS604031U
JPS604031U JP9550883U JP9550883U JPS604031U JP S604031 U JPS604031 U JP S604031U JP 9550883 U JP9550883 U JP 9550883U JP 9550883 U JP9550883 U JP 9550883U JP S604031 U JPS604031 U JP S604031U
Authority
JP
Japan
Prior art keywords
auto scan
level setting
stop level
setting circuit
scan stop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9550883U
Other languages
Japanese (ja)
Inventor
雅弘 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP9550883U priority Critical patent/JPS604031U/en
Publication of JPS604031U publication Critical patent/JPS604031U/en
Pending legal-status Critical Current

Links

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Noise Elimination (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のオートスキャンストップレベル設定回路
の構成図、第2図は本考案の一実施例におけるオートス
キャンストップレベル設定回路の構成図である。 1・・・・・・FM用IFアンプIC12・・・・・・
入力信号に比例した直流電圧を出力する端子、3・・・
・・・スイッチング用トランジスタ、4〜6・・・・・
・トランジスタ3のバイアス設定用抵抗。
FIG. 1 is a block diagram of a conventional auto scan stop level setting circuit, and FIG. 2 is a block diagram of an auto scan stop level setting circuit according to an embodiment of the present invention. 1...FM IF amplifier IC12...
A terminal that outputs a DC voltage proportional to the input signal, 3...
...Switching transistors, 4 to 6...
・Resistance for bias setting of transistor 3.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号に比例した直流電圧を出力する端子を備えたF
M中間周波増幅器と、前記端子から出力される直流電圧
で制御されるトランジスタスイッチング回路とを備え、
オートスキャン時にシンセサイザ用回路から出力される
ミューティング信号を上記スイッチングトランジスタの
エミッタに接続し、オートスキャン時の上記スイッチン
グトランジスタの動作電圧を変化させるように構成した
ことを特徴とするオートスキャンストップレベル設定回
路。
F equipped with a terminal that outputs a DC voltage proportional to the input signal
M intermediate frequency amplifier, and a transistor switching circuit controlled by the DC voltage output from the terminal,
An auto scan stop level setting characterized in that a muting signal output from a synthesizer circuit during auto scan is connected to the emitter of the switching transistor to change the operating voltage of the switching transistor during auto scan. circuit.
JP9550883U 1983-06-20 1983-06-20 Auto scan stop level setting circuit Pending JPS604031U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9550883U JPS604031U (en) 1983-06-20 1983-06-20 Auto scan stop level setting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9550883U JPS604031U (en) 1983-06-20 1983-06-20 Auto scan stop level setting circuit

Publications (1)

Publication Number Publication Date
JPS604031U true JPS604031U (en) 1985-01-12

Family

ID=30228050

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9550883U Pending JPS604031U (en) 1983-06-20 1983-06-20 Auto scan stop level setting circuit

Country Status (1)

Country Link
JP (1) JPS604031U (en)

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