JPS6046631A - Circuit for preventing malfunction - Google Patents

Circuit for preventing malfunction

Info

Publication number
JPS6046631A
JPS6046631A JP15541783A JP15541783A JPS6046631A JP S6046631 A JPS6046631 A JP S6046631A JP 15541783 A JP15541783 A JP 15541783A JP 15541783 A JP15541783 A JP 15541783A JP S6046631 A JPS6046631 A JP S6046631A
Authority
JP
Japan
Prior art keywords
circuit
unit
signal
changeover switch
drive circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15541783A
Other languages
Japanese (ja)
Other versions
JPS6336175B2 (en
Inventor
Yasuhiro Fujikura
藤倉　康裕
Takashi Wakabayashi
隆 若林
Hisanobu Fujimoto
藤本　尚延
Masahiro Shinbashi
新橋　雅宏
Masashi Nakazumi
中住　誠志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15541783A priority Critical patent/JPS6046631A/en
Publication of JPS6046631A publication Critical patent/JPS6046631A/en
Publication of JPS6336175B2 publication Critical patent/JPS6336175B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/22—Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To charge/discharge a driving unit without stopping the whole system by providing the driving unit and a switch unit with sheet connectors and latch circuits. CONSTITUTION:A relay RL to be actuated after a fixed period at the insertion of the driving unit, a timer circuit TIMER, a flip flop group (FF group) latching a switching signal from a control circuit CONT are arranged on the driving unit side. A bistable FF is formed in each alteration switch. An INH signal is normally earthed, and when the driving unit is discharged, the INH signal is formed so as to be discharged more quickly than a SW signal. Therefore, a SW unit circuit F continues to keep an SW signal obtained before the INH signal is opened. When the driving unit is to be inserted, the timer circuit is actuated after turning on a power supply, the SW signal is updated during said period, the relay RL is actuated, a contact rl is closed and then the INH signal line is earthed, so that the circuit F makes the SW signal pass as it is.

Description

【発明の詳細な説明】 （ａ）０発明の技術分野 本発明は誤動作防止回路に係り、特に通信装置等に於い
て、回路ユニットの抜き差しに伴う誤動作防止回路に関
するものである。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a malfunction prevention circuit, and particularly to a malfunction prevention circuit that occurs when a circuit unit is inserted or removed in a communication device or the like.

（ｂ）、従来技術と問題点 ＰＣＭ通信装置に於いて、多重・分離回路ＭＵＬＤＥＭ
ユニットは其のユニットｎ個毎に一個の多重・分離回路
ユニットを用意し、更に切り替えスイッチ、切り替えス
イッチの切り替え信号を保持、駆動する駆動回路及び制
御回路を保有している。(b), Prior art and problems In the PCM communication device, the multiplexing/demultiplexing circuit MULDEM
The unit has one multiplexing/separating circuit unit for every n units, and further includes a changeover switch, a drive circuit for holding and driving a changeover signal of the changeover switch, and a control circuit.

′此の様な機器を用意することにより多重・分離回路Ｍ
ＵＬＤＥＭユニットに故障が発生しても回線を當に動作
し続けられる様に配慮している。'By preparing equipment like this, multiplexing/separating circuit M
Care has been taken to ensure that the line can continue to operate even if a failure occurs in the ULDEM unit.

第１図は従来の切り替えスイッチの一実施例を示す図で
ある。FIG. 1 is a diagram showing an example of a conventional changeover switch.

図中、Ｍ　Ｕ　Ｌ　Ｄ　Ｅ　Ｍ　１〜Ｍ　Ｕ　Ｌ　Ｄ　
Ｅ　Ｍ　ｎは夫々ＰＣＭ装置の多重・分離回路、Ｍ　’
Ｕ　Ｌ　Ｄ　ＥＭ　ｓはＰＣＭ装置の多重・分離回路の
予備、ＤＳＬ−３Ｗ及びＤＳ２−３Ｗは夫々切り替えス
イッチで夫々ｎ個あり、Ｃ０ＮＴは制御回路、ＤＲＩ　
ＶＥは駆動回路である。In the figure, MULDEM 1 to MULD
E M n is the multiplexing/demultiplexing circuit of the PCM device, M'
ULDEMs is a backup multiplexing/demultiplexing circuit of the PCM device, DSL-3W and DS2-3W are each changeover switches, each of which has n pieces, C0NT is a control circuit, and DRI
VE is a drive circuit.

以下第１図に従って従来の切り替えスイッチの詳細を説
明する。The details of the conventional changeover switch will be explained below with reference to FIG.

第１図は２４ＣＨのＰＣＭ信号（ＤＳＬ型）４回線を多
重・分離回路ＭＵＬＤＥＭにより９６ＣＨのＰＣＭ信号
（ＤＳＺ型）に変換する回路ｎ組を示す。此の様な場合
多重・分離回路ＭＵＬＤＥＭｎ組に対し１個の多重・分
離回路ＭＵＬＤＥＭを用意している。FIG. 1 shows n sets of circuits that convert four lines of 24CH PCM signals (DSL type) into 96CH PCM signals (DSZ type) by a multiplexing/separation circuit MULDEM. In such a case, one multiplexing/separating circuit MULDEM is prepared for n sets of multiplexing/separating circuits MULDEM.

制御回路Ｃ０ＮＴは常時現用の多重・分離回路ＭＵＬＤ
ＢＭＩ　〜ＭＵＬＤＥＭｎの状態を監視し、障害を検出
した時は切り替え情報を駆動回路ＤＲＩＶＥに送り、駆
動回路ＤＲ１，ＶＥでは其の切り替え情報をランチし、
切り替えスイッチＤＳＩ−８Ｗ及びＤＳ２−３Ｗを駆動
する。此の時保守員が駆動回路ＤＲＩ　ＶＥユニットを
引き抜くと、切り替え情報が切断されるので、此の様な
システムに於いては駆動回路ＤＲＩ　ＶＥユニットを引
き抜くことは出来ない。The control circuit C0NT is a multiplexing/separating circuit MULD that is always in use.
The status of BMI to MULDEMn is monitored, and when a failure is detected, switching information is sent to the drive circuit DRIVE, and the switching information is launched in the drive circuits DR1 and VE.
Drives changeover switches DSI-8W and DS2-3W. If the maintenance person pulls out the drive circuit DRI VE unit at this time, the switching information will be cut off, so the drive circuit DRI VE unit cannot be pulled out in such a system.

駆動回路ＤＲＩ　ＶＥユニットは総ての切り替え信号を
保持駆動させるので、若し此の駆動回路ＤＲＩＶＥユニ
・ノド内に障害が発生した為此の駆動回路ＤＲＩ　ＶＥ
ユニットを引き抜いて修理しようとしてもシステム全体
を停止させることになるので引き抜けない。The drive circuit DRI VE unit holds and drives all switching signals, so if a failure occurs in this drive circuit DRIVE unit, this drive circuit DRI VE
Even if you try to pull out the unit to repair it, you cannot pull it out because it will stop the entire system.

此の様に動作中のシステム中に引き抜くことが出来ない
ユニットが在ることは保守上大変不利であり、システム
としては大きな欠点である。Having a unit that cannot be removed in an operating system like this is very disadvantageous in terms of maintenance, and is a major drawback for the system.

（Ｃ）１発明の目的 本発明の目的は従来技術の有する上記の欠点を除去し、
システム全体を停止させることなくユニットの抜き差し
が出来るユニットの抜き差しに伴う誤動作防止回路を提
供することである。(C)1 Purpose of the Invention The purpose of the present invention is to eliminate the above-mentioned drawbacks of the prior art;
To provide a circuit for preventing malfunctions associated with insertion and removal of a unit, which allows the unit to be inserted and removed without stopping the entire system.

（ｄ）９発明の構成 上記の目的は本発明によれば、制御回路、駆動回路ユニ
ット及び複数個の切り替えスイ・ソチ・ユニットを有す
るＰＣＭ多重通信装置の多重・分離回路の切り替え回路
に於いて、電源徘入時に必ず規定された状態に安定する
双安定ラッチ回路を前記切り替えスイッチ・ユニットに
具備し、前記駆動回路ユニットに電源投入と同時に動作
を開始するタイマ、前記タイマにより動作するリレー及
び前記各項り替えスイッチ・ユニットに対応するフリッ
プ・フロップを具備し、前記切り替えスイ・ノチ・ユニ
ットのＤ型フリップ・フロップ回路のＴ端子を前記駆動
回路ユニット内のリレー接点経由接地し、前記制御回路
よ−りの切り替え信号を前記フリップ・フロップを中ｇ
ａｆｆ　Ｌで前記切り替えスイッチ・ユニットの双安定
ランチ回路のＤ端子に伝達し、且つ前記駆動回路ユニソ
１〜と前記複数個の切り替えスイッチ・ユニットとを接
続するコネクタに、前記り端子と結ぶ線には先入後抜は
形を、前記Ｔ端子と結ぶ線には後入先払は形コネクタを
夫々使用することを特徴とするユニットの抜き差しに伴
う誤動作防止回路を提供することにより達成される。(d) 9 Structure of the Invention According to the present invention, the above object is to provide a switching circuit for a multiplexing/demultiplexing circuit of a PCM multiplex communication device having a control circuit, a drive circuit unit, and a plurality of switching switch units. , the changeover switch unit is equipped with a bistable latch circuit that is always stable in a specified state when the power is turned on, a timer that starts operating at the same time as the power is turned on to the drive circuit unit, a relay that is operated by the timer, and the A flip-flop corresponding to each switching switch unit is provided, and the T terminal of the D-type flip-flop circuit of the switching switch unit is grounded via a relay contact in the drive circuit unit, and the control circuit A switching signal is passed through the flip-flop to
aff L to the D terminal of the bistable launch circuit of the changeover switch unit, and to the connector connecting the drive circuit UNISO 1 to the plurality of changeover switch units to the wire connecting the above terminal. This is achieved by providing a malfunction prevention circuit that occurs when the unit is inserted or removed, characterized in that a first-in, last-disconnect type connector is used, and a last-in, first-paid type connector is used for the line connecting the T terminal.

（ｅ）９発明の実施例 第２図は本発明の一実施例を示す図である。(e) 9 Examples of the invention FIG. 2 is a diagram showing an embodiment of the present invention.

図中、ＴＩＭＥＲはタイマ回路、ＲＬはリレー、ｒｌは
其の接点、ＦＦＩ、ＦＦ２、−−　・ＦＦｎば夫々フリ
ップ・フロップで此れ等は駆動回路ＤＲＩＶＥユニット
に収容され、Ｆは双安定ランチ回路で各スイッチ・ユニ
ット毎に１個宛実装される。In the figure, TIMER is a timer circuit, RL is a relay, rl is its contact, FFI, FF2, --, FFn are flip-flops, and these are housed in the drive circuit DRIVE unit, and F is a bistable launch circuit. One switch is mounted for each switch unit.

第３図は遅挿入ピンのある段差の付いたコネクタを説明
する図である。FIG. 3 is a diagram illustrating a stepped connector with a slow insertion pin.

第３図に示すコネクタはプラグ■及びジャ・７り■から
構成され、プラグＩはおすコンタクトａ１及びｂｌを有
し、ジャック■はめずコンタクトａ２及びｂ２より構成
され、プラグＩのおすコンタクトａ１はジャック■のめ
ずコンタクトａ２に嵌り、プラグＩのおすコンタクトｂ
１はジャック■のめずコンタクトｂ２に嵌る様になって
いる。The connector shown in Figure 3 consists of a plug ■ and a jack 7 ■, the plug I has male contacts a1 and bl, the jack ■ consists of female contacts a2 and b2, and the male contact a1 of the plug I is Fits into male contact a2 of jack ■, male contact b of plug I
1 is designed to fit into the female contact b2 of the jack ■.

而も第３図に示す様にプラグＩのおすコンククトａｌは
おすコンタクトｂ１より長いコンタクト部分を有してい
る。Moreover, as shown in FIG. 3, the male contact al of the plug I has a longer contact portion than the male contact b1.

従ってプラグＩをジャック■に挿入する時、先づおすコ
ンタクトａ１とめずコンタクトａ２が接続し、時間的に
遅れておすコンタクトｂ１とめずコンタクトｂ２が接続
する。Therefore, when the plug I is inserted into the jack ■, the first contact a1 and first contact a2 are connected, and the second contact b1 and first contact b2 are connected after a time delay.

プラグＩをジャック■を引き抜く時は此の逆になり、お
すコンタクトｂ１とめずコンタクトｂ２が離れてからお
すコンタクトａ１とめずコンタク）ａ２が離れる。When pulling out the plug I from the jack ■, the process is reversed; the male contact b1 and the first contact b2 are separated, and then the male contact a1 and the first contact a2 are separated.

本発明はシート・コネクタとランチ回路から構成され、
駆動回路ＤＲＩ　ＶＥユニット側のコネクタは第３図に
示す様な遅挿入ビンのある段差の付いたコネクタを使用
し、駆動回路ＤＲＩ　ＶＥユニット側にはユニット挿入
時一定時間後に動作するリレーＲＬ、タイマー回路ＴＩ
ＭＥＲ，制御回路Ｃ０ＮＴからの切り替え信号をランチ
するフリップ・フロップＦＦ群を設ける。The present invention consists of a seat connector and a launch circuit,
The connector on the drive circuit DRI VE unit side uses a stepped connector with a slow insertion bin as shown in Figure 3, and the drive circuit DRI VE unit side has a relay RL and a timer that operate after a certain period of time when the unit is inserted. circuit TI
A group of flip-flops FF is provided to launch switching signals from MER and control circuit C0NT.

又各項り替えスイ・７チには双安定ランチ回路Ｆを設け
である。In addition, a bistable launch circuit F is provided for each switch/7 switch.

又第２図に示す駆動回路ＤＲＩ　ＶＥユニットのコネク
タに於いて、Ａ印はおすコンタクトａ１とめずコンタク
ｌ−８２の組合せ即ち先入後接は接続形、Ｂ印はおすコ
ンタクトｂｌとめずコンタクトｂ２の組合せ即ち後入完
接は接続形のコネクタを使用していることを示している
。In addition, in the connectors of the drive circuit DRI VE unit shown in Fig. 2, mark A is a combination of male contact a1 and rare contact l-82, that is, first-in-later contact is a connection type, and mark B is a combination of male contact bl and rare contact b2. The combination, ie, post-input complete connection, indicates that a connection type connector is used.

以下第２図に従って本発明の詳細な説明する。The present invention will be described in detail below with reference to FIG.

（１１駆動回路ＤＲＩＶＥユニットを引き抜く時通常状
態（駆動回路ＤＲＩＶＥユニットが挿入されている時）
では、ＩＮＨ信号はアースされているので、制御回路Ｃ
０ＮＴからの切り替え信号（ＳＷ倍信号ば其の侭各項り
替えスイッチ・ユニット内の回路Ｆを通過する。(Normal state when pulling out the 11 drive circuit DRIVE unit (when the drive circuit DRIVE unit is inserted)
Now, since the INH signal is grounded, the control circuit C
The switching signal (SW double signal) from 0NT then passes through circuit F in the changeover switch unit.

駆動回路ＤＲＩ　ＶＥユニットを引き抜くと、第３図に
示した遅挿入ビンのある段差の付いたコネクタの為、Ｉ
ＮＨ信号の方の線がＳＷ倍信号方の線より早く抜ける。When the drive circuit DRI VE unit is pulled out, the I
The line for the NH signal exits earlier than the line for the SW signal.

即らＩＮＨ信号はオープンとなってからＳＷ信号線はオ
ープンとなる。此の為、切り替えスイッチ・ユニット内
の回路ＦはＩＮＨ信号がオープンとなる前のＳＷ倍信号
保持し続ける。That is, the INH signal becomes open, and then the SW signal line becomes open. Therefore, the circuit F in the changeover switch unit continues to hold the SW signal before the INH signal becomes open.

（２）駆動回路ＤＲＩ　ＶＥユニットを挿入する時駆動
回路ＤＲＩ　ＶＥユニットを挿入する時は、コネクタが
挿入されてから（電源が入ってから）タイマ回路ＴＩＭ
ＥＲが動作し、制御回路Ｃ０ＮＴより駆動回路ＤＲＩ　
ＶＥにＳＷ倍信号更新するのに充分な時間を経過してか
らリレーＲＬが動作し、接点ｒｌが閉じ、ＩＮＨ信号線
がアースされるので、切り替えスイッチ・ユニット内の
回路ＦはＳＷ倍信号其の侭通過させる。(2) When inserting the drive circuit DRI VE unit When inserting the drive circuit DRI VE unit, the timer circuit TIM should be inserted after the connector is inserted (after the power is turned on).
ER operates, and the drive circuit DRI is activated by the control circuit C0NT.
After sufficient time has elapsed to update the SW double signal to VE, relay RL operates, contact RL closes, and the INH signal line is grounded, so circuit F in the changeover switch unit updates the SW double signal. Let it pass.

（３）駆動回路ＤＲＩ　ＶＥユニット未挿入時、システ
ム電源投入又は切り替えスイッチ・ユニット挿入した時 駆動回路ＤＲＩ　ＶＥユニット未挿入時に、システム電
源投入又は切り替えスイッチ・ユニット挿入した時は、
切り替えスイッチ・ユニット内の回路ＦはＳＷ倍信号出
力が常に“ｌ、ｏｗ″となる。(3) When the drive circuit DRI VE unit is not inserted, when the system power is turned on or when the changeover switch unit is inserted When the drive circuit DRI VE unit is not inserted and the system power is turned on or when the changeover switch unit is inserted,
The SW multiplier signal output of the circuit F in the changeover switch unit is always "l, ow".

此の状態の時現用が動作する様に調整しておけＬ＞駆動
回ＩＩＰｒＤＲＩＶＥユニット未挿入の時でも項番替え
スイッチＳＷの動作は現用状態になる。Adjustment should be made so that the active mode operates in this state. Even when the L>drive circuit IIPrDRIVE unit is not inserted, the operation of the item number change switch SW remains in the active mode.

（ｆ）８発明の効果 以上詳細に説明した様に本発明によれば、システム全体
を停止させることなく駆動回路ＤＲＩＶＥユニットの抜
き差し出来ると云う大きい効果がある。(f) Eight Effects of the Invention As described in detail above, the present invention has the great effect that the drive circuit DRIVE unit can be inserted and removed without stopping the entire system.

【図面の簡単な説明】[Brief explanation of drawings]

第１図ば従来の切り替えスイッチの一実施例を示す図で
ある。 第２図は本発明の一実施例を示す図である。 第３図は本発明による遅挿入ピンのある段差の付いたコ
ネクタを説明する図である。FIG. 1 is a diagram showing an embodiment of a conventional changeover switch. FIG. 2 is a diagram showing an embodiment of the present invention. FIG. 3 is a diagram illustrating a stepped connector with a slow insertion pin according to the present invention.

Claims (1)

【特許請求の範囲】[Claims] 制御回路、駆動回路ユニット及び複数個の切り替えスイ
ッチ・ユニ・７トを有するＰＣＭ多重通信装置の多重・
分離回路の切り替え回路に於いて、電源投入時に必ず規
定された状態に安定する双安定ランチ回路を前記切り替
えスイッチ・ユニットに具備し、前記駆動回路ユニット
に電源投入と同時に動作を開始するタイマ、前記タイマ
により動作するリレー及び前記各切り替えスイッチ・ユ
ニットに対応するフリップ・フロップを具備し、前記切
り替えスイッチ・ユニットのＤ型フリップ・フロップ回
路のＴ端子を前記駆動回路ユニット内のリレー接点経由
接地し、前記制御回路よりの切り替え信号を前記フリッ
プ・フロップを中継して前記切り替えスイッチ・ユニッ
トの双安定ランチ回路のＤ端子に伝達し、且つ前記駆動
回路ユニットと前記複数個の切り替えスイッチ・ユニッ
トとを接続するコネクタに、前記り端子と結ぶ線には先
入後接は形を、前記Ｔ端子と結ぶ線には後入先払は形コ
ネクタを夫々使用することを特徴とするユニットの抜き
差しに伴う誤動作防止回路。Multiplexing of a PCM multiplex communication device having a control circuit, a drive circuit unit, and a plurality of changeover switch units
In the switching circuit of the separation circuit, the changeover switch unit is equipped with a bistable launch circuit that is always stable in a specified state when the power is turned on, and the timer that starts operating at the same time as the power is turned on to the drive circuit unit; comprising a relay operated by a timer and a flip-flop corresponding to each of the changeover switch units, and a T terminal of a D-type flip-flop circuit of the changeover switch unit is grounded via a relay contact in the drive circuit unit; A switching signal from the control circuit is relayed through the flip-flop to a D terminal of a bistable launch circuit of the changeover switch unit, and the drive circuit unit and the plurality of changeover switch units are connected. A circuit for preventing malfunctions when a unit is inserted or removed, characterized in that a first-in/last-connect type connector is used for the wire connected to the above-mentioned terminal, and a last-in/first-paid type connector is used for the line connected to the T terminal. .
JP15541783A 1983-08-25 1983-08-25 Circuit for preventing malfunction Granted JPS6046631A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15541783A JPS6046631A (en) 1983-08-25 1983-08-25 Circuit for preventing malfunction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15541783A JPS6046631A (en) 1983-08-25 1983-08-25 Circuit for preventing malfunction

Publications (2)

Publication Number Publication Date
JPS6046631A true JPS6046631A (en) 1985-03-13
JPS6336175B2 JPS6336175B2 (en) 1988-07-19

Family

ID=15605538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15541783A Granted JPS6046631A (en) 1983-08-25 1983-08-25 Circuit for preventing malfunction

Country Status (1)

Country Link
JP (1) JPS6046631A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04192935A (en) * 1990-11-27 1992-07-13 Fujitsu Ltd Automatic line switch protecting circuit
JPH0749191A (en) * 1994-01-31 1995-02-21 Matsushita Refrig Co Ltd Finned tube type heat exchanger

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0288442U (en) * 1988-12-23 1990-07-12
JPH02122583U (en) * 1989-03-20 1990-10-08

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04192935A (en) * 1990-11-27 1992-07-13 Fujitsu Ltd Automatic line switch protecting circuit
JPH0749191A (en) * 1994-01-31 1995-02-21 Matsushita Refrig Co Ltd Finned tube type heat exchanger

Also Published As

Publication number Publication date
JPS6336175B2 (en) 1988-07-19

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