JPS6046670A - Clamping circuit - Google Patents

Abstract

PURPOSE:To perform a precise signal processing with a simple means by obtaining the 1st video signal clamped at a certain potential and also obtaining the 2nd video signal clamped at an another voltage by changing the DC bias of an input amplifier. CONSTITUTION:The video signal is applied to an input amplifier 6 constituted of a differential stage through a clamp capacitor C and guided to a video signal processing circuit 2 which the gain the about one time. A reference voltage E1 is applied to the input amplifier 6 and two video signals A, C pedestal-clamped basically at the voltage E1 and another voltage Ep are formed by the cooperation with a trailing clamp circuit 3. The input amplifier 6 is offset adjusted to obtain a video signal offset clamped E1 by alpha and the signal is outputted to the signal processing circuit 2, so that a black signal less than the level E1 is taken out by slicing and a signal processing extending black is execute to make coincided the peak level of a black signal with the pedestal level. The output of the video signal processing circuit 2 is sent to a clamping circuit 3.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a clamp circuit, and is particularly suitable for use as a pedestal clamp circuit for video signals.

BACKGROUND ART AND PROBLEMS There are cases in which video signal processing circuits in TV receivers, VTRs, etc. perform signal processing on a video signal pedestally clamped to a clamp potential based on a reference voltage that is DC offset from the clamp potential. For example, a video signal pedestally clamped to potential E1 is E1+α(
Signal processing is sometimes used in a black reproduction circuit to extract a black signal (or white signal) by clipping the signal at a reference level (eg, 50 white level).

In this case, a reference potential of E1+α (or E-α) is required in addition to El. If this reference cylinder and the pressure E1±α are fixed, the reference level offset α (50 increments) will substantially change when the clamp potential E1 is reduced. Therefore, a circuit that changes El while keeping the difference between the clamp potential E1 and the reference level E, ±α constant is required, which is undesirable because the circuit configuration becomes complicated and error factors in signal processing increase.

For this reason, a video signal processing circuit using two clamp circuits as shown in FIG. 1 has been conventionally employed. In Fig. 1, the video signal input is applied to the clamp circuit (II) via the clamp capacitor C, and its pedestal is connected to the first
Video output VBt clamped by clamp army E1 of
is obtained. This output is sent to the video signal processing circuit (2) and set at reference level E.

Processing (for example, clipping or slicing) regarding ten α (or −α) is performed. The processed output is input to the second clamp circuit (3), and signals VF, P are formed with second clamp potentials E, I and the pedestal clamp circuit (I7). This clamp output is processed by the second video signal processing circuit (4) and then delivered to the next stage.

According to the configuration shown in FIG. 1, the clamp potentials E and Ep are independent, and no matter how E is changed, the reference level E, 0.alpha., is equal to the clamp potential E1 in the video signal processing circuit 12). In contrast, there is no possibility of change.

Therefore, accurate signal processing can be expected, but since two clamp circuits tll131 are used, the circuit has the disadvantage of becoming sloppy.

The present invention provides a clamp circuit with a simple configuration that solves the above-mentioned problems.

Summary of the Invention The glue 2 amplifier circuit of the present invention comprises an input amplifier (6) to which a video signal is input via a clamp capacitor [21], a level of a predetermined section of the output of this input amplifier (6), and a reference voltage E. The comparison result obtained from the comparator (7) is fed back to the clamp capacitor 112+ to control its charging amount, and the output of the input amplifier [6] is connected to the reference voltage. The first video signal is configured to obtain a first video signal clamped to a first video signal. Furthermore, the input amplifier (6) is configured with a differential amplifier, and the Do balance of the differential amplifier is changed to generate a second video signal clamped to a voltage different from the clamp voltage of the first video signal. The signal is input to the above input amplifier (6
).

Example The present invention will be explained below based on examples.

FIG. 2 is a block diagram showing the basic configuration of a video signal processing circuit using the clamp circuit system according to the present invention, and FIG. 6 is a waveform diagram showing its operation. The video signal input is passed through a clamp capacitor C to an input amplifier (
6) and is led out 11 to the same video signal processing circuit (2) as in FIG. 1 with a gain of approximately 1. This input amplifier (6) is given a reference voltage E1, and is basically pedestally clamped to the voltage E and other voltages E by cooperation with the clamp circuit +31 in the subsequent stage. Two video signals are formed as shown in FIG. E, is El
It is a constant reference voltage formed based on .

The input amplifier (6) is a differential amplifier, and its Do is adjusted by injecting a DC offset signal (current) from the outside.
Adjust (change) the offset (balanced state of differential stage)
It is possible to have children. This offset adjustment allows
As shown in Figure 6B, the pedestal is E at the level of El-α,
A video signal offset-clamped by α can be easily obtained from . This video signal VBj-a is led out to the video signal processing circuit (2), and is, for example, level E1 in FIG.
The following black signal is extracted by slicing, and signal processing is performed to extend the black signal so that the peak level of the black signal matches the pedestal level.

The output of the video signal processing circuit (2) is the clamp circuit (3)
sent to. This clamp circuit (3) is basically a comparator that compares the clamp voltage E and the pedestal level of the input video signal, and its error output is output at the input point of the input amplifier (6) (clamp circuit type 'tC (one end of). That is, if there is a difference between the Ep and th pedestal levels, the difference flows into or out of the clamp capacitor C as a current signal, and the DC voltage held in the capacitor C is corrected. As a result, a video signal pedestally clamped to the clamp voltage E cannot be obtained from the output of the clamp circuit 1:(). This video signal is processed by a video signal processing circuit (4) similar to that shown in FIG.

How the clamping scheme according to the invention uses one feedback type clamping circuit (3) and an input amplifier (6) to pedestally clamp the pedestal-clamped signal to essentially two different levels, E, and E,-α. can be obtained, and even if one of the clamp voltages Ep is changed, the other clamp voltage E1-α does not change.

FIG. 4 is a circuit diagram showing details of the block circuit diagram of FIG. 2, and portions surrounded by dotted lines correspond to each block of FIG. 2.

The video signal is input to the input amplifier (6) via the clamp capacitor C from the terminal T2. This input amplifier (6
) has a pair of input transistors QO6, Q, 07 whose emitters are coupled through a resistor RO8, and the input video signal is applied to one transistor QO6. The base of the other transistor Q,07 has a reference voltage E,(
Figure 5A) is given.

Constant current sources QO3 and QO4 are connected to the emitters of each of the transistor pairs QO6 and QO7.
・is being washed away. Therefore, the change in the collector current of one transistor QO6 due to the input video signal is the resistance R
The signal is transmitted to the emitter of the other transistor QO7 through O8f, and appears as a change in the collector current of QO7. That is, when the collector current of transistor QO6 increases, the increased amount flows through resistor RO8 to current source QO4.
, the collector current of transistor QO7 decreases. The current of Q07 flows through the load resistor RO9, and the collector force of Q07)
From the signal tube, pressure is taken out. The width gain is 1.

A signal from the collector of the transistor QO7 is applied to one (Q13) of a pair of transistors Q13 and Q14 forming a comparator (7) of the clamp circuit (31).

The other transistor Q14 of the comparator (7) is applied with a clamp potential Ep shown in FIG. 3C.

These potentials are constant voltages formed based on the previously mentioned reference voltage E1 (FIG. 3A). That is, reference voltage E1 is supplied to the base of transistor QO8, constant current source Q05 (current 13-11) is coupled to the emitter of QO8, and E, -=B2I s R10 is connected to the collector of QO8.
A clamp potential Ep (E2 is the power supply voltage, RID is the collector load resistance of QO8) is applied. This potential E,
is applied to the base of transistor Q14.

The comparator (7) of the clamp circuit (3) is activated by the clamp pulse (current Ip) of the pedestal section given from the pulse source (8) connected to the common emitter of the transistors Q13 and Q14, and the clamp potential E, and the pedestal level ep of the video signal (collector of Q07) are compared. The differential voltage resulting from the comparison is converted into a current by an active load with a current mirror configuration consisting of a transistor Q15 and a diode D.
) and is injected into the clamp capacitor C on the input side of the input amplifier (6).

In the case of example Id ep (E), the collector voltage of the transistor Q1 of the comparator (7) increases, and Q14
The collector voltage of decreases. Therefore, transistor Q1
The impedance of 5 becomes the dog, and the current follows the conductivity (9) and charges the capacitor C. As a result, the DC component (pedestal level) of the base input of transistor QO6
rises. On the other hand, ep>E.

If so, the impedance of transistor Q15 decreases, and a discharge current from capacitor C flows into Q15 through 4 + m (91).

In this way, the pedestal level of the video signal is corrected by feedback of the detection error until the pedestal level ep of the video signal and the clamp potential Ep become equal. When there is no error in the comparator (7), a pedestal-clamped video signal is obtained at the output of the input amplifier (6) (collector of Q07) at the clamp potential Ep.

The collector of the transistor QO7 is an addition point 00) that constitutes a part of the video signal processing circuit (2) in FIG. 2, and the addition signal for black expansion from the gain control amplifier circle in FIG. This is added to this additional point (10). This addition signal is formed by adjusting the black signal (diagonal part) below the constant level of FIG. 6B detected by the black detection circuit ([3) to an appropriate gain with the gain control amplifier (141). Maximum 2 for addition points 00)
A video signal expanded to black at a double ratio is obtained, and this video signal is led out to a second video signal processing circuit (4) through a clamp circuit (3) as shown in FIG.

The gain control signal given to the gain control amplifier [141] is, for example, a control signal that makes the difference between the black peak value of the video signal output from the addition point (10) and the pedestal voltage Ep zero.

The Ido is the first in the state, and a thermally replayed image can be obtained on the monitor screen.

The black detection circuit 03) is connected to the reference voltage E as shown in FIG. 6B.
is a circuit that clips the black signal that extends below the level of
C offset. child.

The signal is obtained from one end of the clamp capacitor C, but
The input amplifier (6) connects the video signal pedestal as shown in Figure 6B.
It also has a function to offset <B+-α.

The current value 1 of the current sources QO3 and QO4 connected to the emitters of the transistor pair QO6 and QO7 of the input amplifier (6)
1, I2 and the current value I of the transistor Q05 connected to the emitter of the transistor QO8 that generates the clamp potential Ep are assumed to be set equal to each other (I, -
112=I,).

One transistor QO7 and Ep of the input amplifier (6)
The terminals of each of the setting transistors QO8 have the same potential in the pedestal section of the signal due to the feedback clamp. Since the collector resistances QO9 and 10 of the transistors QO7 and QO8 are set equal, and the bases of each transistor are also commonly connected and the reference voltage E1 is applied, QO7 and Q08 are under the same conditions (DC IIIjI (crop). Therefore, the collector current of QO7 is equal to the collector current of QO8, Is ('= I, ), and ■2-
■Since it is 3, no current flows through the resistor coupling resistor 08 of QO6 and QO7. Therefore, the base potential of transistor QO6 in the pedestal section is the same as QO7 <F'
, becomes. That is, the video signal at the base of Q06 is pedestally clamped to the reference voltage E1 as shown in FIG. 6A.

Here, s of the emitter current source Q04 of the transistor QO7
r, when the current value is reduced to -Δ2, the difference ΔI2C' between the collector current and emitter current of Q07 flows through the emitter coupling resistor RO8 and flows into the current source QO3 of the emitter of the transistor Q06. Note that the emitter current of Q, 06 is a constant value ■, so its collector current is Δ
This will result in a decrease of only 10%.

By flowing this offset current, RO8xΔ■
A potential difference of 2 is created between the emitters of QO7 and QO6. If 几08×Δ■2 is set to the offset amount α described above, the pedestal of the video signal that deviates from the base of Q06 will be offset by El−α1 as shown in FIG. 6B. The offset amount α can be varied by adjusting the change amount Δ■2 of I2 to the gods. For example, it is possible to set α to a 50% white level.

The video E signal in FIG. 6B, which is pedestally clamped to El-α obtained at the base ζ of the transistor QO6 of the input amplifier (6), is applied to the high temperature detection circuit 03, and as described above, it is at the level E1. A black signal is detected with clipping.

According to the circuit configuration shown in FIG. 4, the first video signal pedestally clamped to the reference voltage Ep is obtained by the feedback configuration of one clamp circuit (3) and the input amplifier (6), while this input amplifier (6) A second video signal offset-clamped to another pedestal voltage E1-.alpha. by changing the balance of the differential pair I9 is easily obtained. It is independent of the clamp voltage Ep and E1-α, and E
Even if p is changed, the reference voltage E1 and the second
The relationship between the video signal and the pedestal voltage E1-α remains unchanged. [IWI] Two video signals with mutually independent clamp levels can be generated with a simple circuit configuration without using two clamp circuits as in the conventional case.

Further, the offset amount α with respect to the reference voltage E can be easily changed without making extensive changes to the circuit.

Effects of the Invention The present invention, as described above, comprises a box consisting of a first
video signal, while a second video signal clamped to a different voltage can be obtained by the simple expedient of changing the DC bias of the input amplifier.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a conventional two-turn ramp type video signal processing circuit, Fig. 2 is a block diagram of a one-turn ramp type video signal processing circuit to which the present invention is applied, and Fig. 6 is a waveform diagram of a video signal. , FIG. 4 is a circuit diagram corresponding to the blocks in FIG. 2. In addition, in the symbols used in the drawings, (3)...... Clamp circuit (
4)・・・・・・・・・・・・・・・Video signal processing circuit (6)・・・・・・・・・・・・Input amplifier f
7J・・・・・・・・・・・・Comparator 03
)・・・・・・・・・・・・Black detection circuit 0=I+
・・・・・・・・・・・・Gain control amplifier C・・・・・・・・・・・・・・・It is a clamp condenser. Agent Katsu Ueya (voluntary) procedural amendment 1. Display of the case Interaction with the case of Patent Application No. 155249 of 1982 Patent applicant Tokyo Parts Co., Ltd. Kitashinyo 6-Cho Roa Iwa No. 5 (218) Sony Corporation 6 Number of inventions increased by amendment 7 , Column 1 of the detailed description of the invention in the specification to be amended -- J4-Ten I (1), Description Act, page 2, lines 15-17 [Q16...
Correct ``current'' to ``Q16 is on, collector current''. (211, page 10, lines 1-2 [Transistor...
・・・・・・・・・・・・・・・ 1 capacitor OJ
Transistor Q14 is turned on, diode D of the current mirror circuit and transistor Q15 are turned on, and the capacitor O'J is corrected. (3) The following statement is added between the 6th line and the 2nd line from the bottom of page 16. [Also, exactly the same thing can be said about transistor Q (JEI's
This is possible by changing the current of the current source QO5. When the current value of current source QO5 is increased to ■3+Δ■3,
Offsen+-t(1 flow Δ■5 is transistor Q[J7
flows from the emitter of transistor QO6 to the emitter of transistor QO6 through resistor R1. Therefore, the offset amount of R[J8xΔ13 is obtained as shown in FIG. 6B. Depending on the method of changing the current value of this current source QU5,
It is possible to add an offset f to the dynamic range of the human output of the difference #b amplifiers QO6 and QL17 without any noticeable change, resulting in an extremely excellent offset generation circuit. It is obvious that a different current source or a change in the value of the resistance ratio 10 is included within the scope of the present invention in order to generate an offset. (4), by changing ``by changing'' in the 8th line of the 14th member by 1-, or by making the frost and flow of the reference voltage generation circuit's kick current source QL15 feel different. "Shi," he corrected. (5), No. 15, lines 1 to 6 of [Irikaanbu...
・・・・・・Replacement of the "clamp breakage" with another voltage by simply installing a new reference voltage generation circuit.
I added this offset to the clamp awn," he corrected. -More than- 463-

Claims (1)

[Claims] It is equipped with an input amplifier into which a video signal is input via a clamp capacitor, and a converter that compares the level of a predetermined section of the output of this input amplifier with a reference voltage, and feeds back the comparison result to the clamp capacitor. The charge amount is controlled to obtain a first video signal clamped to the reference voltage from the output of the input amplifier, and the input amplifier is a differential amplifier, and the differential amplifier's DC A clamp circuit configured to obtain from the input amplifier a second video signal clamped to a voltage different from the clamp voltage of the first video signal by changing the balance.