JPS6057230U - Timer power supply voltage control circuit - Google Patents

Timer power supply voltage control circuit

Info

Publication number
JPS6057230U
JPS6057230U JP14916083U JP14916083U JPS6057230U JP S6057230 U JPS6057230 U JP S6057230U JP 14916083 U JP14916083 U JP 14916083U JP 14916083 U JP14916083 U JP 14916083U JP S6057230 U JPS6057230 U JP S6057230U
Authority
JP
Japan
Prior art keywords
power supply
supply voltage
timer
voltage control
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14916083U
Other languages
Japanese (ja)
Inventor
博 佐藤
鰐石 哲也
難波 勲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Corp filed Critical Omron Corp
Priority to JP14916083U priority Critical patent/JPS6057230U/en
Publication of JPS6057230U publication Critical patent/JPS6057230U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の実施例であるタイマ回路の回路図、
2図A、 Bはそれぞれ電源電圧の不安定な立ち上がり
波形の一例、タイマ印加電圧の立ち上がり波形の一例を
示す図である。 EC−電源電圧制御回路、T−タイマ、Ql−サイリス
タ、Dl−ツェナーダイオード。
Figure 1 is a circuit diagram of a timer circuit that is an embodiment of this invention.
2A and 2B are diagrams showing an example of an unstable rising waveform of a power supply voltage and an example of an example of an unstable rising waveform of a timer applied voltage, respectively. EC-power supply voltage control circuit, T-timer, Ql-thyristor, Dl-zener diode.

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)タイマの電源電圧供給端子にサイリスタを接続す
るとともに、このサイリスタのアノード−ゲート間にツ
ェナーダイオードを接続し、タイマへの電源電圧供給を
サイリスタを通して行うことを特徴とするタイマの電源
電圧制御回路。
(1) Timer power supply voltage control characterized in that a thyristor is connected to the power supply voltage supply terminal of the timer, a Zener diode is connected between the anode and gate of this thyristor, and the power supply voltage is supplied to the timer through the thyristor. circuit.
(2)前記ツェナーダイオードのツェナー電圧をタイマ
最低動作電圧に設定した実用新案登録請求の範囲第1項
記載のタイマの電源電圧制御回路。
(2) The power supply voltage control circuit for a timer according to claim 1, wherein the Zener voltage of the Zener diode is set to the minimum operating voltage of the timer.
JP14916083U 1983-09-27 1983-09-27 Timer power supply voltage control circuit Pending JPS6057230U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14916083U JPS6057230U (en) 1983-09-27 1983-09-27 Timer power supply voltage control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14916083U JPS6057230U (en) 1983-09-27 1983-09-27 Timer power supply voltage control circuit

Publications (1)

Publication Number Publication Date
JPS6057230U true JPS6057230U (en) 1985-04-22

Family

ID=30331190

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14916083U Pending JPS6057230U (en) 1983-09-27 1983-09-27 Timer power supply voltage control circuit

Country Status (1)

Country Link
JP (1) JPS6057230U (en)

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