JPS6072017U

JPS6072017U - power amplifier

Info

Publication number: JPS6072017U
Application number: JP16134983U
Authority: JP
Inventors: 進田中
Original assignee: Taiheiyo Cement Corp
Current assignee: Taiheiyo Cement Corp
Priority date: 1983-10-20
Filing date: 1983-10-20
Publication date: 1985-05-21

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は従来の電力増幅器の回路構成図、第２図は正負
対称波形の説明図、第３図は正側ピークの強い非対称波
形の説明図、第５図は本考案による電力増幅器の回路構
成図、第６図は正側ピークの強い非対称波形が入力した
場合の本考案による波形変化の説明図、第７図は負側ピ
ークの強い非対称波形の入力した場合の本考案による波
形変化の説明図、第８図は本考案によるピークレベル検
出回路及び正負スイッチ回路の具体的な回路構成図であ
る。１・・・・・・ピークレベル検出回路、２・・・・・・
正スイッチ回路、３・・・・・・負スイッチ回路、４・
・・・・・時定数回路、ＡＭＰｌ・・・・・・オペアン
プ、Ｃ１，Ｃ２・・・・；・コンデンサ、Ｒ３，Ｒ，・
・・・・・抵抗、ＲＬ・・・・・・負荷、Ｅ□、　Ｅ２
・・・・・・電源、ＳＩＮ・・・・・・入力信号。出力を圧、　　　−Fig. 1 is a circuit diagram of a conventional power amplifier, Fig. 2 is an explanatory diagram of a positive/negative symmetrical waveform, Fig. 3 is an explanatory diagram of an asymmetrical waveform with a strong positive peak, and Fig. 5 is a circuit diagram of a power amplifier according to the present invention. 6 is an explanatory diagram of the waveform change according to the present invention when an asymmetric waveform with a strong positive peak is input, and FIG. 7 is an explanatory diagram of the waveform change according to the present invention when an asymmetric waveform with a strong negative peak is input. The explanatory diagram, FIG. 8, is a specific circuit configuration diagram of the peak level detection circuit and the positive/negative switch circuit according to the present invention. 1...Peak level detection circuit, 2...
Positive switch circuit, 3...Negative switch circuit, 4.
... Time constant circuit, AMPL... Operational amplifier, C1, C2 ...; Capacitor, R3, R, ...
...Resistance, RL...Load, E□, E2
...Power supply, SIN...Input signal. Pressure the output, −

Claims

[Scope of utility model registration request]

(1) It has an amplifier, a peak level detection circuit for the input signal or output signal of the amplifier, and a bias circuit driven by the output signal of the peak level detection circuit, and the output of the bias circuit is the inverse of the amplifier. A power amplifier, which is connected to one of an input and a non-inverting input, and changes the output operating point of the amplifier by changing the output of the bias circuit according to the output signal of the peak level detection circuit.

(2) The bias circuit includes a time constant circuit and a switch circuit, and the time constant circuit is connected to a power supply circuit via the switch circuit, and the switch circuit is controlled by the output signal of the peak level detection circuit. Registration of a utility model characterized in that the time constant circuit selectively supplies a positive voltage or a negative voltage selectively supplied from the power supply circuit, and generates a bias output voltage by the time constant circuit. A power amplifier according to claim 1.