JPS6072045U - Multi-standard receiver - Google Patents

Multi-standard receiver

Info

Publication number
JPS6072045U
JPS6072045U JP16401883U JP16401883U JPS6072045U JP S6072045 U JPS6072045 U JP S6072045U JP 16401883 U JP16401883 U JP 16401883U JP 16401883 U JP16401883 U JP 16401883U JP S6072045 U JPS6072045 U JP S6072045U
Authority
JP
Japan
Prior art keywords
receiving device
standard
standard receiver
standard receiving
abstract
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16401883U
Other languages
Japanese (ja)
Other versions
JPH0441664Y2 (en
Inventor
池田　隆春
永後　光行
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP16401883U priority Critical patent/JPS6072045U/en
Publication of JPS6072045U publication Critical patent/JPS6072045U/en
Application granted granted Critical
Publication of JPH0441664Y2 publication Critical patent/JPH0441664Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はマルチ・スタンダード受信装置の概要を示すブ
ロック図、第２図はこの考案の一実施例を示す識別情報
の入力出力回路図である。 図中、６はシステムコントロール回路、７はメモリ、８
は操作部、１０は入出力回路、１１はＳ’　ＥＣＡＭ、
１２はＰＡＬ、１３はＮＴＳＣの指定スイッチを示す。FIG. 1 is a block diagram showing an outline of a multi-standard receiver, and FIG. 2 is an identification information input/output circuit diagram showing an embodiment of this invention. In the figure, 6 is a system control circuit, 7 is a memory, and 8 is a system control circuit.
is the operation unit, 10 is the input/output circuit, 11 is S' ECAM,
12 indicates a PAL designation switch, and 13 indicates a NTSC designation switch.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の異なった放送システムの信号が受信可能とされて
いるマルチ・スタンダード受信装置において、前記マル
チ・スタンダード受信装置における選局用のメモリに、
受信周波数情報とともに前記放送システムの識別情報が
プリセットされ、かつ、読み出すことができる回路が付
加されていることを特徴とするマルチ・スタンダード受
信装置。In a multi-standard receiving device capable of receiving signals from a plurality of different broadcasting systems, a channel selection memory in the multi-standard receiving device includes:
A multi-standard receiving device, characterized in that a circuit is added that allows identification information of the broadcasting system to be preset and read together with reception frequency information.
JP16401883U 1983-10-25 1983-10-25 Multi-standard receiver Granted JPS6072045U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16401883U JPS6072045U (en) 1983-10-25 1983-10-25 Multi-standard receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16401883U JPS6072045U (en) 1983-10-25 1983-10-25 Multi-standard receiver

Publications (2)

Publication Number Publication Date
JPS6072045U true JPS6072045U (en) 1985-05-21
JPH0441664Y2 JPH0441664Y2 (en) 1992-09-30

Family

ID=30359709

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16401883U Granted JPS6072045U (en) 1983-10-25 1983-10-25 Multi-standard receiver

Country Status (1)

Country Link
JP (1) JPS6072045U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114679U (en) * 1982-01-26 1983-08-05 シャープ株式会社 Multi-system reception television receiver

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58114679U (en) * 1982-01-26 1983-08-05 シャープ株式会社 Multi-system reception television receiver

Also Published As

Publication number Publication date
JPH0441664Y2 (en) 1992-09-30

Similar Documents

Publication Publication Date Title
JPS6072045U (en) Multi-standard receiver
JPS5948149U (en) Wireless receiver with recording device
JPS5933373U (en) Video signal switching device
JPS58187885U (en) coin timer device
JPS58101546U (en) Receiving machine
JPS5996983U (en) Signal selection scanning circuit
JPS60186775U (en) Video signal amplification circuit
JPS6090978U (en) television receiver
JPS59147373U (en) video amplification circuit
JPS59174773U (en) VTR playback signal sending device
JPS588205U (en) Television receiver antenna device
JPS58139773U (en) Signal switching device in television receivers
JPS59119671U (en) television receiver
JPS5950167U (en) Television receiver channel selection device
JPS5946073U (en) RF modulator
JPS58114679U (en) Multi-system reception television receiver
JPS6064488U (en) video tape recorder
JPS6039102U (en) radio control device
JPS5869318U (en) magnetic recording and reproducing device
JPS5942677U (en) antenna connection device
JPS5981169U (en) Video signal reproducing device
JPS5966283U (en) interface circuit
JPS58186679U (en) Television receiver control device
JPS58184976U (en) television receiver
JPS58125473U (en) video terminal equipment