JPS607431A - Reticle for manufacturing semiconductor device - Google Patents

Abstract

PURPOSE:To enhance precision of a pattern by forming reticle patterns in multilayer structure and focusing a correct original pattern on parts different in level formed on the surface of a semiconductor device in the manufacturing process during photomasking. CONSTITUTION:Reticles consist of a flat optical glass plate 13, the first pattern 14 made of a thin film of Cr vapor deposited by the plasma vapor phase growth method on parts excluding light parts B and C, a spacer 15 of SiO2 grown by the plasma vapor phase growth method, and the second pattern 16 of a thin Cr film vapor deposited on parts excluding light parts B and D. The light part A in the pattern 14 and that D in the pattern 16 functioning as an original pattern are widely opened so as not to intercept luminus fluxes passing through the light part B in the pattern 16 and that C in the pattern 14. As a result, the pattern can be focused correctly by forming the reticle pattern in 2-layer structure.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a reticle used in projection pulse type photomasking applied to a wafer in the process of manufacturing semiconductor devices.

In the manufacturing process of semiconductor devices, the accuracy of photoetching of a photosensitive agent by photomasking is directly related to the accuracy of the pattern formed by the subsequent selective enlarging or etching on the wafer surface. This is important, and with the miniaturization of design standards, a technology has emerged in which the enlarged pattern on the reticle is reduced onto the wafer by projection lt, yt, and the entire photo-etching process is performed.

As shown in FIG. 1, a reticle conventionally used for this type of projection exposure has surfaces l and 2) Y:, 'l: ff.
A transparent flat plate 3 of ℃ glass (roughly polished) and a thin layer of opaque material such as gold plated on its single surface l.
It has a structure consisting of a bright and dark pattern 4 that is formed by partially removing it after depositing it, and the illuminance of Irradiate the base metal uniformly, and pattern 4 ('
I! A reduction lens system placed between the fcR surface 1 and the wafer causes a droplet to form on the wafer surface, but since the image plane is approximately a single plane, it is necessary to create a semiconductor device on the wafer surface. This method has the disadvantage that it is not possible to properly heat the image of the four convex portions at the same time, and that the pattern 4 cannot be accurately transferred to a part of the wafer. In particular, the minute patterns that separate the holes are all on the same plane where other non-minute patterns are falling.
! , L may not be present.

An object of the present invention is to eliminate the above-mentioned drawbacks, and to provide a reticle that can image the original pattern gold IE for all parts including the four parts and convex parts that occur when semiconductor devices are completely formed on the wafer surface. The reticle of the present invention, which will provide the entire structure, consists of a transparent flat plate and a cough flat plate piece II+.
a first r'+7 film pattern of an opaque material partially arranged and deposited on a plane; and a first r'+7 film pattern on one side of the plane.
a transparent spacer deposited to cover at least a part of the pattern, and a thin film pattern #rJ2 of an opaque material partially disposed on the surface of the spacer. Features.

FIG. 2 illustrates an image of a pattern formed at the wafer position by the reduction lens system 6 when the reticle 5 of the present invention is used in a projection j1w source device.

The first pattern 7 and the second pattern 8 formed in the reticle 5 are arranged in the same 111r1 order from above at the wafer position by the reduction lens system 6.
and 10 respectively. Suberi p, +11
k l 8 ttm , the refractive index of the spacer is 1.45
, M lens system 6 has a total reduction ratio of 5:1, the interval 12 between the image planes at the wafer position is 0.5 μm.

By using this metal, patterns can be provided on the planes of the reticle corresponding to each of the convex portions and four portions that occur on the surface of a semiconductor device during manufacturing, thereby covering the entire surface of the semiconductor device. For this 11·l, which would enable correct consolidation of the projecting influence across the lens system, the distance j from the lens system is
Needless to say, it is necessary to determine the magnification of the reticle pattern according to the image quality, but this may be necessary if the focal length of the lens system is 1" This is a secondary problem that can be solved by designing independent original patterns taking into account all the differences in magnification for each of the four parts.

3, 4, and 5 show embodiments and usage examples of the present invention. FIG. 3 is a partial cross-sectional view of the reticle, showing a flat plate 13 of optical glass and a first pattern 14 made of a thin film of chromium (Cr) deposited on areas excluding bright areas A and C.
, a spacer 15 of silicon dioxide grown by plasma vapor deposition, and a second pattern 16 of thin chromium I deposited on the parts excluding the bright parts I3 and D.

In FIG. 5, A, B, C, and 1) are plan views of each of these bright areas.Bright area A in the first pattern and bright area A in the second pattern are the original patterns, respectively. The second
The openings are made so that the bright part B in the first pattern and the bright part C in the first pattern are not kicked, and even if they are kicked, the temperature is kept within practical limits. Figure 4 shows the projection exposure using this reticle.
FIG. 1 is a partial cross-sectional view showing one step of manufacturing a semiconductor device with steps. In this figure, a region I! is diffused with an impurity of opposite conductivity. A! 24, and oxide films 19 and 22 partially thickened by weekly selective oxidation.
Polycrystalline silicon 21 for gate 11 and wiring
and 20, and a phosphorus glass layer 1 grown by a vapor phase growth method.
i consisting of 8? 14 A thin film of positive-sensitivity IC agent was placed on a semiconductor device in the middle of the process, and a thin film of 17 cm was applied using the reticle shown in Fig. 3.
Positive feeling) Thin +1r of °C agent; Holes E and F drilled in 17
correspond to the four parts 1 (and C) of the reticle, respectively.
In this diagram, the inversion is set to 1 for explanation).

Figure 5 is a plan view of the reticle in Figure 3 superimposed on the plan view of the wafer in Figure 4, and Figures 3r)1 and 4 are the locations on line segment XI X2 of this figure. . The hole Ft' formed in the positive photosensitive material is located on the region 24 in which impurities having the opposite conductivity to the substrate are diffused, and is away from the gate iij l@21 formed of polycrystalline silicon. i By selective oxidation j? A polycrystalline film for placement was provided on the oxidation layer 1 (on top of the silicon 20. 8E and 8F were melted, and the area thickened by selective oxidation and the polycrystalline layer for wiring Although the height differs by the thickness of the silicon part, the thickness of the spacer 15 (thickness of the third r: As a result of the action described above, the bright areas B and C of the reticle are properly connected, and holes are formed as a positive sensitive pattern with a thickness of 11i.

The origin of this is to apply the reticle pattern to the surface of the semiconductor device, as explained above. 14 For each part of the height V due to the difference in level that occurs during the filtration process, the raw butter
It is something that makes people think.

The reticle of the present invention is not limited to the two-layer reticle shown in the above embodiment, but also includes a multi-layer (n-layer) structure in which the necessary number of spaces and patterns are stacked.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing the features of a conventional reticle, FIG. 2 is an explanatory diagram of the working metal of the reticle of the present invention, FIG. 3 is a sectional view showing an embodiment of the present invention, and FIG. 1 Example of scolding: A cross-sectional view (inverted 1゛) during the manufacturing process of a semiconductor device with a step on the surface for complete explanation, and a plan view of Fig. 3 and Fig. 4 ff: Town It is a figure shown in C. In addition, in the figure, 3...) ℃ glass flat plate,
I.2... Polished surface of flat plate 3, 4...
... Opaque thin film, 5 ... Reticle, 6 ...
...Reducing lens system, 7...First pattern,
8... Second no (turn, 9-10...
・Quarter J 11・・・1 speed of spacer, 12・
・・・・・・1e% between concave and dry surfaces, 13・・・・・・)“0
Academic glass flat plate, 14...First pattern, 1
5...--Spacey, 16...Second pattern, 17...Currently 1% positive photosensitive agent% 1
8... Absolutely ★; Iris, 19... Silicon θ''゛≧ film, 20... Polycrystalline T for wiring (silicon, 21...・Polycrystalline silicon for gate electrode, 22...Silicon oxide 111%, 23.
...Silicon substrate, 24...111 silicon substrate with opposite conductivity impurity diffused, A@B@
C and 1)...Bright part of the reticle, 1-9F...
. . .Positive feeling) 'E agent hole, XlX2 . . . Line segment indicating the cross-sectional position. Agent Patent Attorney Susumu Uchihara 183- /θ Figure 2

Claims (1)

[Claims] a transparent flat plate, a first thin film pattern of an opaque material partially disposed and deposited on one side of the flat plate, and covering at least a part of the first pattern on the one side of the flat plate; A reticle for manufacturing a semiconductor device, comprising: a transparent spacer deposited as shown in FIG. .