JPS6078430A - Feeding circuit of camera - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a power supply circuit for a camera that starts supplying power to a photometric circuit upon the first stroke of a shutter release button.

Conventionally, many camera power switches are configured to turn on in conjunction with the shutter release button (the first stroke of the shutter release button turns on the power, the second
A release operation is started by the stroke, and shutter control is automatically performed according to the brightness of the subject. However, when using such a camera 2 to take pictures of fast-moving subjects, such as sports photographs, in which a momentary photo opportunity is captured, it is necessary to reduce the loss of time required to press the shutter release button as much as possible.

It is common practice to wait for a photo opportunity with the shutter release button in the first stroke state (depressing the shutter release button until it is just about to release). As a result, the power remains on during the waiting time, posing a problem of wasting power.

SUMMARY OF THE INVENTION An object of the present invention is to provide a power supply circuit for a camera that can solve the above-mentioned problems and prevent unnecessary waste of power in the photometry circuit during the waiting time for a photo opportunity.

In order to achieve this object, the present invention includes a power supply switch means for supplying and cutting off power only to the photometry circuit, and a time period during which the state of the first stroke of the shutter release button is maintained.

A timing means is provided to cut off the power supply switch means when the time reaches a certain time, so that even if the first stroke state is maintained for a certain period of time or more, the power supply to the photometric circuit is cut off after a certain period of time. It is characterized by the following.

Hereinafter, the present invention will be explained in detail based on illustrated embodiments.

The figure is a circuit diagram showing one embodiment of the present invention.

1 is a battery, 2 and 3.4 are transistors.

When transistor 2 is turned on, voltage Vcc1 becomes
When the transistor 3 is turned on, the voltage Vc'c2 is turned on, and when the transistor 4 is turned on, the voltage ■c3 is
Each occurs. 5,6,7.8゜9.10 is resistance, SW
l is a switch that is turned on with the first stroke of the shutter release button.

Sr1 is a switch that is turned on by the second stroke of the shutter release button, 11 is an inverter, 12.13 is a Noah gate forming a flip-flop, 14, 15.1
6 is an open collector inverter for driving the transistor 2.3.4, and 17, 18, and 19 are resistors, which together with the transistors 20 and 21 constitute a power amplifier clear circuit. SW3 is a switch that is turned on when the shutter trailing curtain is completed and turned off when the film is wound. 22 is a switch that generates a clear signal. 23 is reset when a clear signal is input from the Nantes gate 22, and a certain number of a counter that outputs a high-level signal after counting clocks; 24 is a clock generator; 25.
26 is a NOR gate forming a flip-flop, which together with the counter 23 forms a timer circuit. SW4 is a switch for selecting either the timer circuit side or the voltage C1 side, and 27 is an inverter. The above-mentioned power supply battery 1, inverter 27, and switches SW1 to SW4 constitute a power supply circuit.

MGI is an electromagnet that starts the mechanical imaging sequence, and the electromagnet MGI is connected to onesie 17) circuit 28. resistance 2
9 and a transistor 30. 31 is an AND gate, and 32 is an up/down counter, into which the up/down counting clock output from the clock generator 24 is input, and at this time, the no/no level signal is input from a comparator (described later) to count the amplifiers. , and perform a down count by inputting a low level signal. From the above-mentioned inverter 11 to the amplifier down counter 3
2 and SW2 to SW4 constitute a control circuit C1 that controls the release operation, etc., and the voltage %cl is used as a power source for the control circuit C1.

C2 is a shutter trailing curtain control circuit that controls the running of the shutter trailing curtain, and includes a decoder 33, a comparator 34, a counter 35 . The inverter 36, the Noah gates 37 and 38 forming a flip-flop, the switch SW5 which is turned off when the front curtain of the shutter starts running and turns on during film winding, the electromagnet MG2 for starting the rear curtain of the shutter, and the electromagnet MG2 for driving the electromagnet MG2. The drive circuit is composed of an inverter 39, a resistor 40, and a transistor 41, and a voltage V is used as a power source for the shutter trailing curtain control circuit C2.
cc 2 is used.

42 is a light receiving element, 43 is a diode, and operational amplifier 44
It is also a circuit for logarithmically compressing the luminance signal inputted from the light receiving element 42, and the luminance information B, 7 converted into an apex value is outputted from the operational amplifier 44. Reference numerals 45 and 46 denote variable resistors, in which film sensitivity information Sv is generated by operating a setting member (not shown) in the variable resistor 45, and aperture information AV is generated in the variable resistor 46 by operating a setting member (not shown). . 4-7 is a constant voltage source, which applies a constant voltage to the slider of variable resistance 45.46. 48 is an operational amplifier which performs operational processing (BY+5v-AV) on input luminance information Bv, film sensitivity information Sv, and aperture information AV, and outputs shutter time information TV. The controller 49, the up/down counter 32, the resistor 50°51, 52, 53, 54, and the operational amplifier 55 form an A/D conversion circuit, and the resistors connected to each output terminal A-D of the up/down counter 32 50 to 53 are each set to a resistance value that is a multiple series, so that the output of the operational amplifier 55 corresponds to the digital value output from each output terminal A to D of the up/down counter 32. It becomes an analog voltage value obtained by inverting and amplifying the voltage.The light receiving element 42 to the operational amplifier 55 constitute a photometric circuit C3 that measures the subject brightness, and the voltage Vcc3 is used as a power source for the photometric circuit C3.

Next, the operation will be explained. First, a case will be described in which the output side of the NOR gate 25 is selected by the switch SW'4. Now, when the first stroke of the shutter release button is performed with the film winding completed,
The switch SW1 is turned on, the base voltage of the transistor 20 is pulled down to a low level via the resistor 6, the transistor 2 is turned on, and the voltage Vea is applied to the control circuit C1.
l is supplied. When the voltage Vcc1 is 0■, the transistors 20 and 21 are off, but the voltage Vea
As l increases, the voltage at the base of transistor 210 also increases through resistor 19.

The base voltage is 0. ! When the voltage reaches V, the transistor 21 is turned on and a clear signal is output from the Nant gate 22. When the voltage Vccl further increases, the base voltage of the transistor 20 reaches 0.6V and turns on, which turns off the transistor 21, inverts the output of the Nant gate 22 to a low level signal, and releases the clear signal. .

By inverting the output of the Nant gate 22 to a low level signal, the outputs of the NOR gates 13 and 26 are set to a low level signal, and the outputs of the NOR gates 12.25 are set to a high level signal. will be reset.

The high level signal output from the NOR gate 25 is sent to the switch SW4. Input to transistor 4 via inverter 16 and resistor 10 9, thus.

Transistor 4 is turned on, and voltage Vc is applied to photometric circuit C3.
c3 is supplied. When power is applied to the photometric circuit C8, the light receiving element 42 connected to the input side of the high impedance operational amplifier 44 and the diode 4 connected to the feedback circuit
3, the operational amplifier 44 outputs the logarithmically compressed brightness information BY as a voltage according to the subject brightness. The brightness information By, film sensitivity information Sv, and aperture information Ay are input to the operational amplifier 48 via variable resistors 45 and 46, and the operational amplifier 48 calculates (BY + 5v - AV) and calculates the shutter speed. The time information TV is outputted to the inverting input terminal of the comparator 49 in the form of a voltage whose polarity is inverted (for example, if the apex value is 9■, it is -9V). At this time, the non-inverting input terminal of the comparator 49 is connected to the operational amplifier 55.
A negative D/A conversion value corresponding to the digital value output from the up/down counter 32 is input.

Therefore, the comparator 49 compares and calculates the shutter time information TV input from the operational amplifier 48 and the D/A conversion value input from the operational amplifier 55, and if the output of the operational amplifier 48 is higher than the output of the operational amplifier 55, then A high level signal is output to the up/down counter 32, and conversely, if the output of the operational amplifier 48 is lower than the output of the operational amplifier 55, a low level signal is output to the up/down counter 32. As a result, the up/down counter 32 starts counting up when a high level signal is input, and starts counting down when a low level signal is input. up/down counter 32
Up-counting or down-counting is performed in synchronization with the clock input from the clock generator 24 via the AND gate 31, and this further A/D conversion operation is performed until the clock input is prohibited by the AND gate 31. .

Next, when the second stroke of the shutter release button is performed, the switch SW2 is turned on.

A high level signal is input to one input terminal of the NOR gate 12 via the inverter 11 . As a result, the output of NOR gate 12 becomes a low level signal, and NOR gate 1
3 is inverted to a high-level signal, and the high-level signal is sent to open collector inverters 14, 15, . It is output to the inverter 27 and the one-shot circuit 28. By inputting a high level signal to the inverter 14, the output of the inverter 14 is inverted to a low level signal,
Even if you take your hand off the shutter release button (switch SWI is off) during film exposure, the power will not turn off.

(At the same time, the output of the inverter 15 is also pulled down to low level, and the transistor 3 is turned on.

The voltage %c2 is supplied as a power source to the shutter trailing curtain control circuit c2. In addition, the output of the inverter 27 also becomes a low level signal, and therefore the output of the AND gate 31 also becomes a low level signal, inhibiting clock input to the up/down counter 32, and shutter time information T at that time.
V is memorized by an up/down counter 32. Furthermore, when a high-level signal is input to the one-shot circuit 28, a high-level signal is outputted from the one-shot circuit 28 for a certain period of time to the transistor 3o via the resistor 29, and the transistor 30 is turned on for a certain period of time, during which time the electromagnet MG1 becomes energized.

When the electromagnet MGI is energized, a mechanical sequence begins, the aperture of the lens is narrowed down, and at the same time the mirror is raised, and the front curtain of the shutter begins to run. At this time, the count start switch SW5 is turned off, and a low level signal is input to the counter 35 via the input switch 36. This releases the reset of the counter 35, and the counter 35 starts counting the clock input from the clock generator 24. Further, the decoder 33 decodes the shutter time information Tv stored in the up/down counter 32, and outputs the shutter time information Tv from the output terminals Q1 to Q1e as a real time expanded value.
V is output to the comparator 34, and the converter 34 outputs the output terminals Q'+ to Q'+ of the counter 35. When the input signal becomes equal to the signal input from the decoder 33 (that is, after the stored shutter time has elapsed), an E-level signal is output.

The Noah gate 37 that forms a Noritsubu flop.
outputs a low level signal, and NOR gate 38 outputs a high level signal. The output of the NOR gate 38 is input to the transistor 41 via the inverter 39 and the resistor 40, and the transistor 41 is turned off, so that the electromagnet MG
2 is cut off, and the shutter rear curtain starts running.

When the shutter trailing curtain completes running, the switch γ>F switch SW3 is turned on, a clear signal is output from the ≠ gigagate 22, and the output of the NOR gate 13.26 is inverted to a low level signal. When the output of the NOR gate 13 is inverted to a low level signal, the transistor 2.3 is turned off, power supply to the control circuit C1 + photometry circuit C2 is cut off, and at the same time, the transistor 4 is also turned off, and the shutter trailing curtain control circuit C3 is turned off. The power supply is cut off. Shutter control is performed by expanding the A/D converted shutter time information TV in real time.

Next, a case of special photography such as sports photography will be explained. The counter 23, which is cleared by the clear signal generated by the shutter release button, starts counting.

At this time, the state of the first stroke is changed one by one without delaying the second stroke of the shutter release button. After a certain period of time, the counter 23 outputs a level signal. , thereby inverting the outputs of the NOR gates 25 and 26 forming a Frino flip-flop into low-level signals and 71-level signals. The low level signal output from the NOR gate 25 is sent to the switch SW.
4 to AND gate 31, and AND gate 3
1 is Atsbuta.

Clock input to the run counter 32 is prohibited.

In addition, the shutter time information at this time is TV&'! , are stored in the up-down counter 32. At the same time Noah Gate 2
The output of 5 is sent to Innoku Ichiyo 16.

The output of the inverter 16 is the signal IL of /% illepel.

Therefore, the transistor 4 is turned on, and the power supply to the optical circuit C3 is cut off.

While the state of the first stroke of the shutter release button is maintained, the shutter time information Tv is stored in the up/down counter 32, and when the second stroke is performed, the shutter time information TV is used. 7
Etc. control is performed. Note that the operation at this time is the same as described above, so a description thereof will be omitted.

Further, when the switch SW4 is selected to the voltage c1 side, even if the counter 23 counts up, the power supply to the photometry circuit C3 is not cut off, so photometry continues.

According to this embodiment, if the state of the first stroke of the shank-release button is maintained for a certain period of time, the power supply to the photometric circuit C3 is stopped, so that unnecessary power consumption can be prevented. can.

In this embodiment, the transistor 4, the resistor 9° 10, and the inverter 16 correspond to the power supply switch means of the present invention,
The counter 23 and the Noah gates 25 and 26 correspond to timekeeping means.

Note that the time measuring means is not limited to the counter 23 and the flip-flop, but may be, for example, an RC time constant circuit.

As described above, according to the present invention, the power supply switch means for supplying and cutting off power only to the photometric circuit and the time period during which the first stroke state of the shutter release button is maintained are measured.

A timing means is provided to cut off the power supply switch means when the time reaches a certain time, so that even if the first stroke state is maintained for a certain period of time or more, the power supply to the photometric circuit is cut off after a certain period of time. This makes it possible to prevent unnecessary waste of power in the photometry circuit during the waiting time for a photo opportunity.

[Brief explanation of drawings]

The figure is a circuit diagram showing one embodiment of the present invention. ni agate, company Mi...power supply circuit, 32...up/down counter, 33...decoder, 34...comparator, 35...counter, SWI~SW5...
・Switch, Vccl~■. 3...Voltage, C1...
Control circuit, C2...shutter trailing curtain control circuit. C3...photometering circuit. Patent applicant Minoru Nakamura, Canon Co., Ltd. agent

Claims (1)

[Claims] 1. In the camera power supply circuit that supplies power to the photometry circuit with the first stroke of the shutter release button,
A power supply switch means for supplying and cutting off power only to the photometric circuit; and a power supply switch means that measures the time during which the first stroke state of the shutter release button is maintained, and when the time reaches a certain time, the power supply switch means A power supply circuit for a camera, characterized in that a power supply circuit for a camera is provided with a timekeeping means for cutting off the power.