JPS6083457A - Digital signal processing system - Google Patents

Abstract

PURPOSE:To provide digital time-division electronic switching with a diversity of circuit switching service by adding data for circuit data processing to circuit switching data from a control memory. CONSTITUTION:Data for the modulation, attenuation, composition, etc., of a signal of a circuit is added to corresponding circuit switching data from the control memory CM. When an ordinary circuit switching connection is made, data sent to a channel memory SPM and a signal attenuating circuit PAD are used and signal switching in the term of the signal switching of a common part is made ineffective. When signal processing is performed through the circuit, signal switching in the term of the signal switching of the common part is made effective and the circuit number is written in an additional channel memory ASPM and an additional signal attenuating circuit APAD. Consequently, when the signal is mixed with a signal of another channel, the objective channel is replaced at the same time on the additional signal attenuating circuit APAS to synthesize data.

Description

Detailed Description of the Invention (a) 0 Technical Field of the Invention The present invention relates to a digital signal processing method for a digital time-division electronic exchange, and in particular performs attenuation, modulation, synthesis, etc. of line-switched data within a network. The present invention relates to a digital signal processing method that can perform the following functions.

(b) Problems with the prior art In the conventional digital time-division electronic switching system, the signal processing in the circuit switching section is difficult because the data passing through this circuit switching section is time-division multiplexed and the signal processing is high-speed. For some reason, it was difficult to control, and the system used was to send it through the highway to the end of the line, process it there, and then send it back to the network.

The signal processing in the line switching section referred to here refers to attenuation, modulation, and synthesis, etc. Attenuation refers to attenuating the signal on the line to lower the transmission level, and synthesis refers to Modulation is the process of making some changes to the audio signals of the other lines.

However, in order to process the line data in this manner, the line must be replaced, the connection must be switched to the signal processing device, and the line must be temporarily disconnected. In addition, since the signal processing device is usually externally attached in conventional equipment, there is a limit to the number of lines, and the block (protruding)
sometimes occurred.

(G)1 Objective of the invention The objective of the present invention is to eliminate the above-mentioned drawbacks of the prior art,
An object of the present invention is to provide a digital signal processing method capable of adding diversity to circuit-switched services by adding data for modulating, attenuating, and combining signals of the corresponding circuit to circuit-switched data from a control memory.

(d) 1 Structure of the Invention According to the present invention, in a digital time division electronic exchange, an additional communication path memory is provided in parallel with the communication path memory, an additional signal attenuation circuit is provided in parallel with the signal attenuation circuit, and a signal attenuation circuit is provided in parallel with the communication path memory. a processing conversion circuit, inputting the signal multiplexing circuit output signal to the channel memory and the additional channel memory, inputting the channel memory output to the signal attenuation circuit, and inputting the signal multiplexing circuit output signal to the channel memory and the additional channel memory; input to the additional signal attenuation circuit, input the outputs of the signal attenuation circuit and the additional signal attenuation circuit to the signal processing conversion circuit, respectively, and input the output of the signal processing conversion circuit to the signal multiplexing/demultiplexing circuit. and changing the chronological arrangement of data in the communication path memory and the additional communication path memory based on the main line number, slave line number, and control signal for communication path data processing output from the control memory. , wherein the signal attenuation circuit applies a predetermined attenuation to the communication path data, and the signal processing conversion circuit combines the output of the additional signal attenuation circuit with the output of the signal attenuation circuit. This is achieved by providing a digital signal processing method.

(e) 0 Examples of the invention FIG. 1 is a block diagram showing one embodiment of the present invention.

In the figure, MPX is a signal multiplexing circuit, DMP)N is a signal multiplexing/demultiplexing circuit, SPM is a channel memory, ASPM is an additional channel memory, PAD is a signal attenuation circuit, APAD is an additional signal attenuation circuit, CONV is a signal Processing conversion circuit, CM is control memory, SRD is signal reception distributor, CP
U is the central processing unit.

In FIG. 1, dotted lines represent the flow of control information.

According to the prior art, in the digital time-division electronic switching system, the circuit switching section is composed of a channel memory SPM and a control memory CM, and a signal multiplexing circuit MPX and a signal multiplexing/demultiplexing circuit DMPX are installed at both ends of the channel memory SPM. , a signal attenuation circuit PAD, etc., but the present invention is a digital signal processing system in which the functions of the signal attenuation circuit PAD are extended to perform functions such as signal modulation and synthesis.

The additional channel memory ASPM according to the present invention has the same hardware configuration as the channel memory SPM, and the additional signal attenuation circuit APAD also has the same hardware configuration as the signal attenuation circuit PAD. The only difference is the circuit switching specification data.

The signal processing conversion circuit C0NV is composed of a non-volatile memory, and stores data from the signal attenuation circuit PAD at lower addresses.
This is a conversion circuit that uses data from the additional signal attenuation circuit APAD as an upper address.

FIG. 2 shows the format of circuit switched data output from the control memory CM according to the invention.

As shown in Figure 2, the data format sent from the controller/roll memory CM to the line switching section is as follows:
Broadly divided into types.

(11'SPM, line to PADJ section (data, (2L'A
, SPM, , data going to the APADJ section, (3) data commonly controlled.

In a normal circuit switching connection, the data going to the rSPM and P'ADj parts are used, and the signal conversion in the signal exchange section of the common part is assumed to be "rone".

Also, if signal processing is to be performed on this line, set the signal exchange in the common part signal exchange section to "Yes", and set rASPM, APADJ.
Write the line number in the section.

'ASPM, , In normal times when the APADJ section is not used, it is a T1 stage time switch, but for example, when you want to combine signals with other channels, add the channel you want to combine to the line at the same time on the signal attenuation circuit APAD. exchange to. By doing this, the additional signal attenuation circuit APAD
Data can be synthesized by inputting the data output from the signal processing conversion circuit C0NV to the upper address side of the signal processing conversion circuit C0NV.

FIG. 3 is a block diagram for explaining details of an embodiment of the present invention.

In the figure, CNT is a sequential counter, SEL is a selector, 61 to G4 are gates, and the other symbols and numbers are the same as in FIGS. 1 and 2.

The portion surrounded by a chain line in FIG. 3 is the formant of the circuit-switched data output from the control memory CM shown in FIG.

The present invention will be explained below by taking a synthesis process as an example.

Synthesis processing is an example often used in conference telephone calls, etc., and will be explained in the case where, for example, the voice of channel A is superimposed with the voice of channel d and the line of channel a is sent to the other party.

The present invention employs a T1 stage sequential writing and random reading method under the control of a sequential counter CNT.

8-bit PC multiplexed by signal multiplexing circuit MPX
M parallel data are written sequentially in the same memory format in both the channel memory SPM and the additional channel memory ASPM.

In this case, the channel memory SPM and the additional channel memory AS
Data written on PM is temporally channel a1.
The channels are arranged in the order of channel b...

On the other hand, the circuit switching data in the communication path memory SPM is the main line number in the control memory CM.
Given by the data. That is, channel a becomes the main line number in this case, and if it is necessary to attenuate the audio of this channel, the amount of attenuation - is given as rPADJ data.

In addition, the circuit switching data of the additional channel memory ASPM is the "subordinate line number" of the control memory CM, ' A P A
Given by DJ data. That is, in this case, channel d is the slave line number, and if it is necessary to attenuate the audio of this channel, the amount of attenuation is provided as 'APADJ data.

The term "audio/data j term to audio, r signal conversion" of the common control unit is set to Yes.

The above control information is provided via selector SEL, communication path memory S
PM and the additional communication path memory ASPM, and the arrangement of the data stored in the additional communication path memory AS)) M is temporally arranged in the order of channel a1 channel b, . . . .

That is, the order of channel d, channel a1 channel b1 channel 01 channel e is changed so that the channels to be combined are placed at the same time position.

Next, the speech path memory SPM and the additional speech path memory ASPM
The data collected in the signal attenuation circuit PAD and the additional signal attenuation circuit APAD are input to the signal attenuation circuit PAD and the additional signal attenuation circuit APAD, respectively, and after being given a specified attenuation amount, the data output from the signal attenuation circuit PAD is input to the signal processing conversion circuit C0NV. The data input to the lower address side and output from the additional signal attenuation circuit APAD is sent to the signal processing conversion circuit [i! Input to the upper address side of &C0NV.

Furthermore, by simultaneously sending the data input to the upper address side and the lower address side to the signal multiplexing and demultiplexing circuit DMPX side, it is possible to synthesize and send out the audio signal data of channel a and channel d.

(f) 0 Effects of the Invention As explained in detail above, according to the present invention, data for modulating, attenuating, combining, etc. the signals of the corresponding line is added to the line-switched data from the control memory, thereby providing the line-switched service. This has the great effect of making it possible to realize a digital signal processing system that can provide diversity to the user.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. As shown in FIG. 2, this is the data format sent from the control memory CM to the line switching section. FIG. 3 is a block diagram for explaining details of an embodiment of the present invention. In the figure, MPX is a signal multiplexing circuit, DMPX is a signal multiplexing/demultiplexing circuit, SPM is a channel memory, ASPM is an additional channel memory, PAD is a signal attenuation circuit, A P A'D is an additional signal attenuation circuit, and C0NV is a signal attenuation circuit. Signal processing conversion circuit, CM is control memory, SRD is signal reception distributor, CP
U is a central processing unit, CNT is a sequential counter, SEL is a selector, and 01 to G4 are gates, respectively.

Claims (1)

[Claims] A digital time division electronic exchange is provided with an additional communication path memory in parallel with the communication path memory, an additional signal attenuation circuit in parallel with the signal attenuation circuit, and a signal processing conversion circuit, and output signals from the signal multiplexing circuit are transferred to the communication path. a memory and the additional channel memory, input the channel memory output to the signal attenuation circuit, input the additional channel memory output to the additional signal attenuation circuit, and input the signal attenuation circuit and the additional signal. The outputs of the attenuation circuits are respectively input to the signal processing conversion circuits, and the outputs of the signal processing conversion circuits are connected to be input to the signal multiplexing/demultiplexing circuit, and the main line number and slave line number are output from the control memory. and changing the chronological arrangement of the data in the communication path memory and the additional communication path memory based on a control signal for communication path data processing, applying a predetermined attenuation to the communication path data in the signal attenuation circuit, and A digital signal processing system characterized in that the output of the (=J multiplied signal attenuation circuit) is combined with the output of the signal attenuation circuit in a signal processing conversion circuit.