JPS6092674A - Constant voltage diode - Google Patents
Constant voltage diodeInfo
- Publication number
- JPS6092674A JPS6092674A JP58201524A JP20152483A JPS6092674A JP S6092674 A JPS6092674 A JP S6092674A JP 58201524 A JP58201524 A JP 58201524A JP 20152483 A JP20152483 A JP 20152483A JP S6092674 A JPS6092674 A JP S6092674A
- Authority
- JP
- Japan
- Prior art keywords
- diffusion region
- silicon substrate
- region
- conductivity type
- constant voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/20—Breakdown diodes, e.g. avalanche diodes
- H10D8/25—Zener diodes
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明は、シリコンエピタキシャルプレーナ技術により
作られる定電圧ダイオードに係り、降伏電圧特性を向上
させることに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a constant voltage diode made by silicon epitaxial planar technology, and to improving breakdown voltage characteristics.
一般に、半導体集積回路中に定電圧ダイオードを作ろう
とする場合トランジスタのベース、エミッタ接合の逆方
向ブレークダウン電圧(降伏電圧)が利用される。とこ
ろで、半導体集積回路におけるトランジスタの基本的な
構造はプレーナ構造であるが、プレーナ構造でトランジ
スタを作った場合はPN接合の端部が表面保護被膜直下
の基板表面に存在しかつ表面から拡散が行なわれるので
基板表面に近い程不純物濃度勾配が高く、このため前記
ブレークダウンはPN接合の表面で起こることが知られ
ている。しかるに、該表面では結晶の不整や汚れなどが
あることによりPN接合のブレークダウンは一様には起
こりにくくなる。これを解決するための従来技術として
特公昭54−9473号公報に記載されたものがある。Generally, when attempting to create a constant voltage diode in a semiconductor integrated circuit, the reverse breakdown voltage (breakdown voltage) of the base and emitter junction of a transistor is used. By the way, the basic structure of transistors in semiconductor integrated circuits is a planar structure, but when a transistor is made with a planar structure, the end of the PN junction exists on the substrate surface directly under the surface protective film, and diffusion occurs from the surface. It is known that the closer to the substrate surface the higher the impurity concentration gradient, and that the breakdown occurs at the surface of the PN junction. However, due to crystal irregularities and dirt on the surface, breakdown of the PN junction becomes difficult to occur uniformly. A conventional technique for solving this problem is described in Japanese Patent Publication No. 54-9473.
この従来技術は第1図に示す構成を有している。第1図
において、符号1はP型のシリコン基板、2はN+型埋
め込み拡散領域、3はN型エピタキシャル島領域、5.
6は高濃度のP十型拡散領域、7はP型ベース拡散領域
、8はN型エミッタ拡散領域、9はオーミックコンタク
ト用のN+型拡散領域、10゜11.12は電極である
。この従来技術ではベースエミッタ接合の底面部分15
で最大の不純物濃度とし、表面でのブレークダウンが抑
制されるようにしている。ところが、この従来技術では
ベース、エミッタを入れ、このエミッタと高濃度のベー
スとの間でブレークダウンを起こすようにしているため
に構造が複雑であるのみならずブレークダウン電圧を設
定制御することに何点があった。This prior art has the configuration shown in FIG. In FIG. 1, reference numeral 1 denotes a P-type silicon substrate, 2 an N+ type buried diffusion region, 3 an N-type epitaxial island region, and 5.
6 is a heavily doped P-type diffusion region, 7 is a P-type base diffusion region, 8 is an N-type emitter diffusion region, 9 is an N+-type diffusion region for ohmic contact, and 10° 11.12 is an electrode. In this prior art, the bottom portion 15 of the base-emitter junction
The maximum impurity concentration is set to suppress breakdown on the surface. However, in this conventional technology, a base and an emitter are included, and breakdown occurs between the emitter and the highly concentrated base, which not only makes the structure complicated, but also makes it difficult to set and control the breakdown voltage. How many points were there?
本発明は、降伏電圧が経時変化することなく一様なブー
レークダウンを起こすことがで忽るようにしかつ構造が
簡単であるとと、もにブレークダウン電圧の設定制御が
容易に行なえるようにすることを目的とする。The present invention is designed to cause uniform breakdown without changing the breakdown voltage over time, has a simple structure, and allows easy control of the breakdown voltage setting. The purpose is to
以下、本発明を図面に示す実施例に基づいて詳細に説明
する。第2図はこの実施例の構造断面図である。第2図
において、符号20はP型シリコン基板、21はシリコ
ン基板20上に埋め込まれてなり、該シリコン基板20
とは反対導電型のN+1型の埋め込み拡散領域、22は
該シリコン基板20上にエピタキシャル成長されかつ分
離拡散領域23.24により島状に分離されるとともに
シリコン基板20とは反対導電型のN型エピタキシャル
島領域、25.26は該エピタキシャル島領域22とは
同じ導電型で、即ちシリコン基板20とは反対導電型で
エピタキシャル島領域22を貫通し埋め込み拡散領域2
1に達する高不純物濃度の2つのN+型貫通拡散領域、
27は一方の貫通拡散領域26から浅く拡散されてシリ
コン基板20と同じ導電型のP十型高不純物濃度拡散領
域、28はシリコン酸化膜、29はカソード電極、30
は7ノード電極である。このような構造の定電圧ダイオ
ードでは貫通拡散領域26と高不純物濃度拡散領域31
との開のPN接合面でブレークダウンが起こり、表面で
のブレークダウンは抑制される。また、第1図の従来技
術とは異なり、エミッタやベースの拡散領域がなくなり
ブレークダウン電圧の設定制御は両領域26.31の濃
度の制御により容易にできる。Hereinafter, the present invention will be described in detail based on embodiments shown in the drawings. FIG. 2 is a structural sectional view of this embodiment. In FIG. 2, reference numeral 20 denotes a P-type silicon substrate, and 21 is embedded in the silicon substrate 20.
A buried diffusion region 22 of an N+1 type of conductivity opposite to that of the silicon substrate 20 is epitaxially grown on the silicon substrate 20 and separated into islands by isolation diffusion regions 23 and 24, and an N type epitaxial region of an opposite conductivity type to the silicon substrate 20. The island regions 25 and 26 are of the same conductivity type as the epitaxial island region 22, that is, of the opposite conductivity type to the silicon substrate 20, and penetrate through the epitaxial island region 22 to form the buried diffusion region 2.
two N+ type through diffusion regions with a high impurity concentration reaching 1;
27 is a P-type high impurity concentration diffusion region which is shallowly diffused from one through diffusion region 26 and has the same conductivity type as the silicon substrate 20; 28 is a silicon oxide film; 29 is a cathode electrode;
is a 7-node electrode. In a constant voltage diode having such a structure, the through diffusion region 26 and the high impurity concentration diffusion region 31
Breakdown occurs at the open PN junction interface, and breakdown at the surface is suppressed. Further, unlike the prior art shown in FIG. 1, there are no emitter and base diffusion regions, and the breakdown voltage setting can be easily controlled by controlling the concentration of both regions 26 and 31.
以上のように、本発明によればシリコン基板上に埋め込
まれてなり、該シリコン基板とは反対導電型の埋め込み
拡散領域と、該シリコン基板上にエピタキシャル成長さ
れかつ分離拡散領域により島状に分離されるとともにシ
リコン基板とは反対導電型のエピタキシャル島領域と、
該シリコン基板とは反対導電型でエピタキシャル島領域
を貫通し埋め込み拡散領域に達する高不純物濃度の2つ
の貫通拡散領域と、一方の貫通拡散領域から浅く拡散さ
れてシリコン基板と同じ導電型の高不純物濃度拡散領域
とを含むので、ブレークダウンが表面で起きることがな
くなり、したがって降伏電圧の経時変化の度合が減少し
該降伏電圧特性に優れた定電圧ダイオードを得ることが
で鰺る。更に、構造も簡単化しているのでブレークダウ
ン電圧の設定制御も容易になり、製造過程でも工程数が
従来例よりも減少し製造」二も容易である。As described above, according to the present invention, the buried diffusion region is embedded in a silicon substrate and has a conductivity type opposite to that of the silicon substrate, and the buried diffusion region is epitaxially grown on the silicon substrate and separated into islands by isolation diffusion regions. and an epitaxial island region having a conductivity type opposite to that of the silicon substrate,
Two through diffusion regions with a high impurity concentration that penetrate the epitaxial island region and reach the buried diffusion region are of a conductivity type opposite to that of the silicon substrate, and a high impurity impurity of the same conductivity type as the silicon substrate is diffused shallowly from one through diffusion region. Since the diode includes a concentration diffusion region, breakdown does not occur on the surface, and therefore the degree of change in breakdown voltage over time is reduced, making it possible to obtain a constant voltage diode with excellent breakdown voltage characteristics. Furthermore, since the structure is simplified, it is easier to control the breakdown voltage setting, and the number of steps in the manufacturing process is reduced compared to the conventional example, making manufacturing easier.
第1図は従来例の構造断面図、第2図は本発明の実施例
の構造断面図である。
20はP型シリコン基板、21は埋め込み拡散領域、2
2はエピタキシャル島領域、25.26は貫通拡散領域
、27は高不純物濃度拡散領域、28はシリコン酸化膜
、29.30は電極出願人 口 −ム 株 式 会 社
代理人 弁理士 岡 1)和 秀FIG. 1 is a structural sectional view of a conventional example, and FIG. 2 is a structural sectional view of an embodiment of the present invention. 20 is a P-type silicon substrate, 21 is a buried diffusion region, 2
2 is an epitaxial island region, 25.26 is a through diffusion region, 27 is a high impurity concentration diffusion region, 28 is a silicon oxide film, and 29.30 is an electrode applicant. Hide
Claims (1)
基板とは反対導電型の埋め込み拡散領域と、該シリコン
基板上にエピタキシャル成長されかつ分離拡散領域によ
り島状に分離されるとともにシリコン基板とは反対導電
型のエピタキシャル島領域と、該シリコン基板とは反対
導電型でエピタキシャル島領域を貝通し埋め込み拡散領
域に達する高不純物濃度の2つの貫通拡散領域と、一方
の貫通拡散領域から浅く拡散されてシリフン基板と同じ
導電型の高不純物濃度拡散領域とを含む、定電圧ダイオ
ード。(1) A buried diffusion region that is embedded in a silicon substrate and has a conductivity type opposite to that of the silicon substrate, and a buried diffusion region that is epitaxially grown on the silicon substrate and is separated into islands by an isolation diffusion region that is opposite to that of the silicon substrate. An epitaxial island region of conductivity type, two through diffusion regions of high impurity concentration that penetrate through the epitaxial island region and reach the buried diffusion region of the conductivity type opposite to that of the silicon substrate, and a silicon diffusion region that is shallowly diffused from one of the through diffusion regions. A constant voltage diode comprising a highly doped diffusion region of the same conductivity type as the substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58201524A JPS6092674A (en) | 1983-10-27 | 1983-10-27 | Constant voltage diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58201524A JPS6092674A (en) | 1983-10-27 | 1983-10-27 | Constant voltage diode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6092674A true JPS6092674A (en) | 1985-05-24 |
Family
ID=16442469
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58201524A Pending JPS6092674A (en) | 1983-10-27 | 1983-10-27 | Constant voltage diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6092674A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1995017013A1 (en) * | 1993-12-18 | 1995-06-22 | Robert Bosch Gmbh | Drift-free avalanche diode |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5384A (en) * | 1976-06-23 | 1978-01-05 | Nec Corp | Semiconductor device |
| JPS58132981A (en) * | 1982-02-02 | 1983-08-08 | Seiko Instr & Electronics Ltd | Zener diode |
-
1983
- 1983-10-27 JP JP58201524A patent/JPS6092674A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5384A (en) * | 1976-06-23 | 1978-01-05 | Nec Corp | Semiconductor device |
| JPS58132981A (en) * | 1982-02-02 | 1983-08-08 | Seiko Instr & Electronics Ltd | Zener diode |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1995017013A1 (en) * | 1993-12-18 | 1995-06-22 | Robert Bosch Gmbh | Drift-free avalanche diode |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0250435A (en) | Bipolar transistor and its manufacture | |
| US3445734A (en) | Single diffused surface transistor and method of making same | |
| JPS6092674A (en) | Constant voltage diode | |
| JPS59169177A (en) | Semiconductor device | |
| JPH0499328A (en) | bipolar transistor | |
| JPS63175463A (en) | Bi-MOS integrated circuit manufacturing method | |
| JPS60157266A (en) | Constant voltage diode | |
| JPS60157265A (en) | Constant voltage diode | |
| JPS5916414B2 (en) | semiconductor equipment | |
| JPH0416443Y2 (en) | ||
| JPS60123062A (en) | Manufacturing method of semiconductor integrated circuit | |
| JPH05283432A (en) | Vertical type field-effect transistor and its manufacture | |
| JPH0812864B2 (en) | Semiconductor device | |
| JPS6022358A (en) | Semiconductor integrated circuit device | |
| JPS5926267U (en) | semiconductor equipment | |
| JPS58212171A (en) | Semiconductor device | |
| JPH0845953A (en) | Semiconductor device | |
| JPS62165964A (en) | Semiconductor device | |
| JPS63144569A (en) | semiconductor equipment | |
| JPS6149470A (en) | semiconductor equipment | |
| JPS62272567A (en) | Semiconductor device | |
| JPS61125079A (en) | Semiconductor device and its manufacturing method | |
| JPS61111575A (en) | Semiconductor device | |
| JPH02220445A (en) | Semiconductor device | |
| JPS5914670A (en) | Transistor |