JPS609366A - Power source circuit - Google Patents
Power source circuitInfo
- Publication number
- JPS609366A JPS609366A JP11570883A JP11570883A JPS609366A JP S609366 A JPS609366 A JP S609366A JP 11570883 A JP11570883 A JP 11570883A JP 11570883 A JP11570883 A JP 11570883A JP S609366 A JPS609366 A JP S609366A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- output
- diode
- rectifier
- smoothing capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009499 grossing Methods 0.000 claims abstract description 25
- 238000004804 winding Methods 0.000 abstract description 12
- 239000003990 capacitor Substances 0.000 description 19
- 238000010586 diagram Methods 0.000 description 7
- 210000004907 gland Anatomy 0.000 description 4
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical group [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/02—Conversion of AC power input into DC power output without possibility of reversal
- H02M7/04—Conversion of AC power input into DC power output without possibility of reversal by static converters
- H02M7/06—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Rectifiers (AREA)
Abstract
Description
【発明の詳細な説明】
技術う)野
本発明は、信号電流と平滑用:Iンi′ン′りのリソゾ
ル電流との相互干渉によって生ずるイノターフ1イス・
ハl、・モジュレーショノ歪の発生か少ない市ハ;i回
路に係る。[Detailed Description of the Invention] Technique C) The present invention is directed to the innoturf 1 chair, which is caused by the mutual interference between the signal current and the smoothing lysosol current.
(1) - Low occurrence of modulation distortion (3) Relates to the circuit.
背景技術
従来、商用市原を整流、平滑して直流重重を?1する電
源回路をイ1する増幅器等に於いては、電源回路の甲7
i°1川:l/デンザはリップル電流とイ1r 5J市
流の往路を北ねていた。電源回路の電圧変動・tミを小
さくするために、平滑用コンデンサの容1,1値を大き
くしてその内部抵抗を小さくすると甲滑用:+ツノ゛/
・りのリソゾル電流すなわち充電電流は、その波形か鋭
くなり信号電流との相互干渉により、イノターフ、イス
争ハム・モジュレーション(以1・”111Mと略する
。)歪が増大する欠点かあった。Background technology Conventionally, commercial Ichihara is rectified and smoothed to produce DC heavy duty? For amplifiers, etc. that use a power supply circuit that operates as
i°1 River: l/Denza was heading north on the outbound route of Ripple Current and I1r 5J City River. In order to reduce voltage fluctuations and tmi in the power supply circuit, increase the capacitance 1,1 of the smoothing capacitor and reduce its internal resistance.
The waveform of the lithosol current, that is, the charging current, becomes sharper, and due to mutual interference with the signal current, there is a drawback that the distortion increases due to innoturf, isometric hum modulation (hereinafter abbreviated as "111M").
発明の開示
本発明は111M歪を減らずために、電源トシ/スの出
力か第1の整流器で整流された送流出力を、平滑する第
1の平滑用コンデンサに、他系統の整流出力を印加する
ものでもある。すなわち、他系統の118流出力として
、所定の電圧値を有し且つ電源トランスの出力と同相の
電圧を発生する交流電圧発生部の出力を電源トランスの
出力に直列に加算した電圧を第2の整流器で整流して第
2の゛1′−滑川コンデンザで平滑し、この平滑された
電圧を第3の整流器を通過させて、他系統の整流出力と
し、第1の平滑用コンデンサへ印加するものである。DISCLOSURE OF THE INVENTION In order to avoid reducing 111M distortion, the present invention connects the rectified output of other systems to a first smoothing capacitor that smooths the output of the power supply system or the sending output that has been rectified by the first rectifier. It is also something to apply. That is, as the 118 output of the other system, the voltage obtained by adding in series the output of the AC voltage generator that generates a voltage having a predetermined voltage value and in phase with the output of the power transformer to the output of the power transformer is added to the second output. The voltage is rectified by a rectifier and smoothed by a second 1'-Namekawa capacitor, and this smoothed voltage is passed through a third rectifier to be used as a rectified output for another system and applied to the first smoothing capacitor. It is.
本発明は前述のようにt11If成したので、電源回路
の電圧変動率を小さくするために、その内部抵抗を小さ
くしても、平滑用コンデンサのリップル電流のノー人振
幅値は増大せず且つ波形は鋭くならない。したがって、
信号電流との相互干渉による111M歪が従来の装置に
較べて大幅に少なくなる。Since the present invention achieves t11If as described above, even if the internal resistance of the power supply circuit is reduced in order to reduce the voltage fluctuation rate, the ripple current amplitude value of the smoothing capacitor does not increase and the waveform is not sharp. therefore,
111M distortion due to mutual interference with the signal current is significantly reduced compared to conventional devices.
発明を実施するための最良の形態
以下本発明の実施例を図面を参照して説明する。第1図
の本考案に係る第1の実施例の電源回路の回路図と、第
2図および第3図の第1図に於ける各部の電圧電流波形
図とを参照すると、商用電源に接続された入力端子10
1.10:lは電源トランス1の1次側巻綜2に接続さ
れ、その2次側在線3は第1の整流器であるダ、イ」−
15のアノードとアースに接続されている。そして、グ
イA−)’5のカソードは負荷性端子がアースに接続さ
れた第1の平滑用コンデンサ7の正極性端子に1g続さ
れている。/1は交流電圧発生部で、電ni1 トラン
ス1の1次側と2次側が巻かれた鉄心に、更に為かれた
3次側巻腺4により構成されている。BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described with reference to the drawings. Referring to the circuit diagram of the power supply circuit of the first embodiment of the present invention in FIG. 1 and the voltage and current waveform diagrams of each part in FIG. 1 in FIGS. input terminal 10
1.10:l is connected to the primary winding heel 2 of the power transformer 1, and its secondary winding 3 is the first rectifier.
15 anode and ground. The cathode of Gui A-)'5 is connected by 1 g to the positive terminal of the first smoothing capacitor 7 whose load terminal is connected to ground. /1 is an alternating current voltage generating section, which is composed of an iron core around which the primary and secondary sides of the electric transformer 1 are wound, and a tertiary side winding gland 4.
その3次側巻線4の出力電圧はダイオード21で整流さ
れ、平滑用コンデンサ23で平滑された(14均電11
、、値がダイオード25の順方向降下電圧値と略等しい
か、わずか小さ1−1になるように設定されている。そ
して、3次側巻線4の一端は電源トランスlの2次側8
Ii!3の出力に同相で加りされるように接続されてい
る。また、3次側巻綜4の他端は第2の整流器であるダ
イオード2Iのアノードが接続され、そのカッ゛−ドは
第2の平滑用コンデンーリ・23の正極性端子に接続さ
れている。甲滑用=+/デンザ23の負荷性端子はアー
スに接続されており、また、その正極性端子には第3の
整流器であるダイオード25のアノードが接続され、そ
のカソードは平滑用コンデンサ7の正極性端子に接続さ
れている。この正極性端子とアース間には負荷である(
j−j増幅部31が接続されている。The output voltage of the tertiary winding 4 was rectified by a diode 21 and smoothed by a smoothing capacitor 23 (14
,, the value is set to be approximately equal to or slightly smaller than the forward voltage drop value of the diode 25, 1-1. One end of the tertiary winding 4 is connected to the secondary side 8 of the power transformer l.
Ii! It is connected so that it is added to the output of No. 3 in the same phase. The other end of the tertiary winding heel 4 is connected to the anode of a diode 2I, which is a second rectifier, and its cup is connected to the positive terminal of a second smoothing capacitor 23. The load terminal of the =+/denza 23 is connected to the ground, and its positive terminal is connected to the anode of a diode 25, which is a third rectifier, and its cathode is connected to the smoothing capacitor 7. Connected to the positive polarity terminal. There is a load between this positive terminal and the ground (
A jj amplifying section 31 is connected.
次に動作について説明する。入力端子101、+03に
商用電源電圧か印加されると、その電圧は電源トランス
1の1次側巻腺2に印加され、その結果2次側巻腺3と
3次側巻腺4に誘起された電圧は加算されて第2図の(
イ)に示す電圧となり、ダイオード21のアノードから
カソードを経由するととにより整流され、平滑用コンデ
/す23の正極性端子に印加される。そして、その正極
性端子の電11は第2図の(0)に示す電圧となるが、
その最大電圧値は732図の(イ)の最大電圧値よりダ
イλ−ド21の順方向降下電圧値を差し引いた値となる
。そして、平滑用コンデ/す23の正極性端子から負極
性端子へ、時刻・書・、t2と【4.112と+14、
−・・の期間に第2図の(ハ)に示す充電電流が流れる
。尚、これらの期間は第2図の(イ)に示すダイオード
21のアノードにかかる電圧が第2図の(0)に示す平
滑用コンデンサ2:(の正極性端子の電圧を越えた場合
である。一方、電源トランス1の2次側巻fi!3に誘
起された第3図の(ニ)に示ず電圧はダイオード5のア
ノードからカソードを経由することにより整流され、甲
滑用:1ンデン・す°7の正極性端子に印加される。甲
滑用二1ンデ/ザ7の充電電流波形図を示せば第ζ3図
の(へ)の如くなる。すなわち、nニア刻・・・、【3
と【5、+13と+15、・・・の期間は電源トランス
lの2次側在線3に誘起された第3図の(ニ)に示す電
圧が、平滑用コンデンサ7の+I: h’y< PII
II第3図の(ホ)に示す電圧以上となっており、ダイ
詞−ト5を通じて、平滑用コンデンリ゛7に第で3図の
(へ)に示す充電電流が流れる。ここて、甲lf°)
III :+ンデンザ7の正極性端子の電圧波形図は第
3図の(ホ)の如くになっているが、その11)入電1
、、l−6’iは第3図の(ニ)の最大電圧値よりダイ
(−ト5の順方向降下電圧値を差し引いた値となる。Next, the operation will be explained. When a commercial power supply voltage is applied to the input terminals 101 and +03, that voltage is applied to the primary coil gland 2 of the power transformer 1, and as a result, it is induced in the secondary coil gland 3 and the tertiary coil gland 4. The voltages obtained are added and shown in Figure 2 (
The voltage becomes the voltage shown in (a), is rectified by passing from the anode to the cathode of the diode 21, and is applied to the positive terminal of the smoothing capacitor 23. The voltage 11 at the positive terminal becomes the voltage shown in (0) in FIG.
The maximum voltage value is the value obtained by subtracting the forward direction drop voltage value of the die λ-de 21 from the maximum voltage value shown in FIG. 732 (a). Then, from the positive terminal to the negative terminal of the smoothing condenser 23, the time, writing, t2 and [4.112 and +14,
The charging current shown in (c) of FIG. 2 flows during the period -.... These periods are when the voltage applied to the anode of the diode 21 shown in (a) of Figure 2 exceeds the voltage of the positive terminal of the smoothing capacitor 2 (shown in (0) of Figure 2). On the other hand, the voltage shown in (d) in Figure 3 induced in the secondary winding fi!3 of the power transformer 1 is rectified by passing from the anode to the cathode of the diode 5.・It is applied to the positive polarity terminal of s° 7. If the charging current waveform diagram of the 21st direction/za 7 for the first and second slides is shown, it will be as shown in (f) of Fig. , [3
During the periods of [5, +13 and +15, . . . ], the voltage shown in (d) in FIG. PII
II, the voltage is higher than the voltage shown in (e) of FIG. 3, and a charging current shown in (f) of FIG. Here, Kolf°)
III:+The voltage waveform diagram of the positive terminal of the power converter 7 is as shown in (e) in Figure 3.11) Incoming power 1
, , l-6'i is the value obtained by subtracting the forward voltage drop value of the die 5 from the maximum voltage value (d) in FIG.
そして、平滑用コンデンサ7の正極性端r電圧がコンデ
ンサ23の端子電圧よりダイオード25の順方向降下電
圧値を差し引いた値以下の場合は、平滑用’J7コンデ
ンサに充電された電圧により、第3図の(へ)に示ず時
刻・・・、T4とT14、Φ・・の期間に平滑用コンデ
ンサへ所定の電流ioが1点れる。そして、平滑用コン
デンサ7の正極性端子電圧は、第2図の(:))に示す
電圧波形から第3図のに1;)に示す電圧波形に変化し
リップル電圧波形の振幅値は減少する。If the positive terminal r voltage of the smoothing capacitor 7 is less than the value obtained by subtracting the forward drop voltage value of the diode 25 from the terminal voltage of the capacitor 23, the third A predetermined current io is applied to the smoothing capacitor at one point during the periods T4 and T14, Φ, etc., which are not shown in (f) of the figure. Then, the positive terminal voltage of the smoothing capacitor 7 changes from the voltage waveform shown in (:)) in Fig. 2 to the voltage waveform shown in 1;) in Fig. 3, and the amplitude value of the ripple voltage waveform decreases. .
したがって、平滑用コンデンサ7に流れるリップル電流
は、その最大値が従来の略半分となり、この平滑用コン
デンサ7に信号増幅部31より信号電流が流れてもリッ
プル電流との相互干渉による111M歪が減少する。Therefore, the maximum value of the ripple current flowing through the smoothing capacitor 7 is approximately half that of the conventional one, and even if the signal current flows through the smoothing capacitor 7 from the signal amplifying section 31, 111M distortion due to mutual interference with the ripple current is reduced. do.
次に他の実施例を第4図を参照して説明する。Next, another embodiment will be described with reference to FIG.
27は所定値を有するインピーダンスで抵抗又はコイル
等より構成され、第3の整流器であるダイオード25の
カソードと第1の平滑用J7デ/ザ7の正極性端子間に
接続されている。そして他の部分の回路構成は第1の実
施例の場合と同様である。動作について説明すると、信
号増幅部31のインピーダンスが変化し、この信号増幅
部IIに流れ込む負イ1電流が変動しても、平滑用;J
ンデン・す2;(よりダイオード25を経由して平滑用
コンデンサ7に流れ込む第3図に示す電流ioの変動は
緩慢となり、IIIM歪の増大を防止し得るものである
。Reference numeral 27 denotes an impedance having a predetermined value, which is composed of a resistor, a coil, or the like, and is connected between the cathode of the diode 25, which is the third rectifier, and the positive terminal of the first smoothing J7 diode 7. The circuit configuration of other parts is the same as that of the first embodiment. To explain the operation, even if the impedance of the signal amplifying section 31 changes and the negative current flowing into the signal amplifying section II fluctuates, the smoothing;
(The current io shown in FIG. 3 flowing into the smoothing capacitor 7 via the diode 25 fluctuates more slowly, and an increase in IIIM distortion can be prevented.
また、電源トランスlの3次側巻Ii!4の発生ずる電
圧(/fの調整が第1図の回路より容易となる。Also, the tertiary winding Ii of the power transformer l! Adjustment of the voltage (/f) generated by 4 is easier than in the circuit shown in FIG.
本発明は前述のように、電源回路の電圧変動率を小さく
するために、大容量の平滑用コンデンサを使用しても、
信号成分にIIIM歪を増加させない効果がある。As mentioned above, in the present invention, even if a large-capacity smoothing capacitor is used to reduce the voltage fluctuation rate of the power supply circuit,
This has the effect of not increasing IIIM distortion in signal components.
第1図は本発明に係る第1の実施例の電b;「回路の回
路図、第2図および第3図は第1図にl<、りる各部の
電圧電流波形図、第4図は他の実施例の電源回路の回路
図である。
1・・・電源トランス、4・・・交1:L電月−発生部
、5命・・第1の整流器、7・−〇第1の中滑二1/デ
ンザ、21・・e第2の整流器、2;1・・・第2の平
滑用コ/デン・す、25−II11第3の整流器。FIG. 1 is a circuit diagram of the circuit of the first embodiment of the present invention, FIG. 2 and FIG. 3 are voltage and current waveform diagrams of various parts in FIG. 1 is a circuit diagram of a power supply circuit of another embodiment. 1...Power transformer, 4...AC 1:L electric power generator, 5 life...first rectifier, 7...-〇first 2; 1... Second smoothing code/denser, 25-II11 Third rectifier.
Claims (1)
を負イ::1と並列に接続された第1の平泪用ノンノ′
ンザに印加する:jノデンサ・インプット庁1宙高i回
i1’fGに於いて、 前記゛市原トランスの出力に直列に接続され、かつ同相
の電圧を発生する交流電圧発生部と、この交lAi電圧
発生部の出力に接続された第2の4’;’Z ;/lわ
器と、 この第2の整流器の出力を平パ′1する第2の・+i、
滑川二用ツプ/ザと、 一端をこの第2の平滑用コ/デ/・リ−と+’+ii記
第2の整;Ijl:イ:(の接続点に接続し、他端を前
記第1の宇;i’) Ill :’7ノ゛/°すと11
1f記負倚の接続点に接続された第33の1!:*流器
とを具備したことを特徴とする電訪;;1”l W+’
r。[Claims] The output of the electric current system/system is supplied to a first rectifier, and the output thereof is connected to a first rectifier connected in parallel with a negative A::1.
At 1 time i1'f a second rectifier connected to the output of the voltage generator, and a second rectifier for flattening the output of the second rectifier;
Connect one end to the connection point of this second smoothing code and the second adjustment in +'+ii; 1st u; i') Ill :'7°/° and 11
The 33rd 1! connected to the connection point of the 1f register! :*Electronic bath characterized by being equipped with a sink; ;1"l W+'
r.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11570883A JPS609366A (en) | 1983-06-27 | 1983-06-27 | Power source circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11570883A JPS609366A (en) | 1983-06-27 | 1983-06-27 | Power source circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS609366A true JPS609366A (en) | 1985-01-18 |
Family
ID=14669232
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11570883A Pending JPS609366A (en) | 1983-06-27 | 1983-06-27 | Power source circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS609366A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4032114Y1 (en) * | 1964-11-05 | 1965-11-10 | ||
| JPS4325923Y1 (en) * | 1966-02-08 | 1968-10-30 |
-
1983
- 1983-06-27 JP JP11570883A patent/JPS609366A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4032114Y1 (en) * | 1964-11-05 | 1965-11-10 | ||
| JPS4325923Y1 (en) * | 1966-02-08 | 1968-10-30 |
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