JPS6098708A - Low frequency amplifier circuit - Google Patents

Low frequency amplifier circuit

Info

Publication number
JPS6098708A
JPS6098708A JP58207121A JP20712183A JPS6098708A JP S6098708 A JPS6098708 A JP S6098708A JP 58207121 A JP58207121 A JP 58207121A JP 20712183 A JP20712183 A JP 20712183A JP S6098708 A JPS6098708 A JP S6098708A
Authority
JP
Japan
Prior art keywords
point
potential
output
comparator
turned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58207121A
Other languages
Japanese (ja)
Inventor
Koji Akiyama
秋山 好司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yaesu Musen Co Ltd
Original Assignee
Yaesu Musen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yaesu Musen Co Ltd filed Critical Yaesu Musen Co Ltd
Priority to JP58207121A priority Critical patent/JPS6098708A/en
Publication of JPS6098708A publication Critical patent/JPS6098708A/en
Pending legal-status Critical Current

Links

Landscapes

  • Amplifiers (AREA)

Abstract

PURPOSE:To decrease the current change due to temperature drift by driving a buffer stage and an output stage amplifier with an output of a comparator so as to allow the switching operation of the amplifier. CONSTITUTION:Since a DC voltage from a positive power supply +Vcc is impressed to a point A at no signal while being divided by fixed resistors R1 and R2, when a voltage at a point B is lower than the voltage at a point A, an output of a comparator Q1 is a high potential, transistors Q2, Q4 are turned on, Q3, Q5 are turned off and a point B becomes a high potential. Thus, the input side potential of the Q1 is increased gradually via an LPF consisting of a fixed resistor R3 and a capacitor C2. Since the potential is higher than that at the point A at a certain point of time, the output of the Q1 goes to a low potential, the Q3, Q5 are turned on and then the Q2, Q4 are turned off, and the potential at the point B goes to a low potential. This potential is applied to the Q1 via the LPF comprising the C2, R3. The operation above is repeated and the potential at the point B is switched at high speed around the potential at the point A.

Description

【発明の詳細な説明】 本発明は高周波によってスイッチング動作を行なう低周
波増幅回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a low frequency amplifier circuit that performs a switching operation using high frequencies.

従来の低周波増幅回路においては、ドライブ段までをA
級増幅とし出力段をAB級増幅段としていたが、出力段
のAB級増幅のバイアス回路が温度や電源電圧の変動に
よって、アイドルカーレントが不安定になシ易くまたク
ロスオーバー歪の原因となった。
In conventional low frequency amplifier circuits, up to the drive stage is
class amplification, and the output stage was a class AB amplification stage, but the bias circuit of the class AB amplification in the output stage tends to cause the idle current to become unstable due to fluctuations in temperature and power supply voltage, and also causes crossover distortion. Ta.

本発明G1、かかる従来の欠点を解消するために行なわ
れたもので、以下実施例を図面を参照して詳訊1に説明
する。
The present invention G1 has been developed to eliminate such drawbacks of the conventional art, and embodiments thereof will be described below in detail with reference to the drawings.

第1図は本発明の低周波増幅回路の基本回路を示すもの
で、入力信号端子はコンデンサ01に介してコンパレー
タQ1のΦ入力端子へ結線せられ、コンパレークQs 
とトランジスタQ2と。3よシなるコンプリメンタリ増
幅器とトランジスタ。4とQ5よシなるコンプリメンタ
リ増幅器とを縦続結縁する。
FIG. 1 shows the basic circuit of the low frequency amplifier circuit of the present invention, in which the input signal terminal is connected to the Φ input terminal of comparator Q1 via capacitor 01, and the comparator Qs
and transistor Q2. Three complementary amplifiers and transistors. 4 and a complementary amplifier called Q5 are connected in cascade.

前者の増幅器をドライブ段とし、後者の増幅器を出力段
とする。コンデンサC1とコンパレータQ1の■入力端
子との結線個所のには固定抵抗R1とR2とを結線し、
固定抵抗R1の他端へは′I4源十vec′t−また固
定抵抗R2の他端は接地する。
The former amplifier is used as a drive stage, and the latter amplifier is used as an output stage. Fixed resistors R1 and R2 are connected to the connection point between the capacitor C1 and the input terminal of the comparator Q1,
The other end of the fixed resistor R1 is connected to an I4 source, and the other end of the fixed resistor R2 is grounded.

一方トランジスタQ4とQ6のエミッタ間とを結んだ出
力側■はチロ−クコイルLとコンデンサC3とを縦続結
線して、コンデンサc3の他端は結線個所Oにおいてス
ピーカSPの入力端子へ結蔵し、スピーカSPの他端側
端子を接地する0結線個所■からは固定抵抗朗とコンデ
ンサc、 Jニジなるローパスフィルタラ介してコント
ロールQsのe端子へ結線する。以上のように構成され
た回路において、直流電源+vccは固定抵抗R1とR
2によって分割された直流電圧がコンミ4レータQ1の
■端子に印加されていて、またトランジスタQ2とQS
を組合せたドライブ段とトランジスタQ4とQs とを
組合せた出力段とは、共に零バイアスで動作する。従っ
て、コンパレータQ1→ドライブ段Qz Qs→出力段
Q4 Q8→ローパスフィルタR3C,と言うループ回
路が形成されて、信号入力が到来すると、該信号入力に
よってスぎ一力spが動作する〇 無信号の場合、0点には■電源+vccからの直流電圧
が固定抵抗R1と82で分割されて印加されているので
、0点の電圧かの点の電圧より低いとコン7ぐレータQ
1の出力は高電位となって、トランジスタQ2とQ4は
オンとなって、トランジスタQs とQsはオフとなり
、0点は尚電位となるので、ロー・やスフィルタRaC
z(i=介してコン・臂レータQ1の入力側の′電位も
次第に高くなる。
On the other hand, the output side (2) connected between the emitters of transistors Q4 and Q6 is connected in cascade with a chiroke coil L and a capacitor C3, and the other end of the capacitor C3 is connected to the input terminal of the speaker SP at a connection point O. From the 0 connection point (2), which grounds the other end terminal of the speaker SP, connect it to the e terminal of the control Qs via a low-pass filter consisting of a fixed resistor, capacitor c, and J. In the circuit configured as above, the DC power supply +vcc is connected to fixed resistors R1 and R
A DC voltage divided by 2 is applied to the ■ terminal of commutator Q1, and transistors Q2 and QS
The drive stage combining transistors Q4 and Qs and the output stage combining transistors Q4 and Qs both operate at zero bias. Therefore, a loop circuit is formed such as comparator Q1 → drive stage Qz Qs → output stage Q4 Q8 → low-pass filter R3C, and when a signal input arrives, the signal input activates the input signal SP. In this case, the DC voltage from the power supply +vcc is applied to the 0 point after being divided by the fixed resistors R1 and 82, so if the voltage at the 0 point is lower than the voltage at the point, the converter Q
The output of 1 becomes a high potential, transistors Q2 and Q4 are turned on, transistors Qs and Qs are turned off, and the 0 point is still at a potential, so the low-power filter RaC
The potential on the input side of the controller Q1 also gradually increases through z(i=.

6る時点では[株]点よシ高くなるので、コン7やレー
タQ!の出力は低電位となって・トランジスタQ3とQ
Sがオンとなってトランジスタ。2とQ4がオフとなり
、0点の%位は低電位となる。
At the point of 6, the [stock] point will be higher, so con 7 or rate Q! The output of transistors Q3 and Q becomes a low potential.
S turns on and the transistor turns on. 2 and Q4 are turned off, and about % of the 0 point becomes a low potential.

この−位はロー・やスフィルタR3C,を介してコンパ
レータQl に加わる。
This position is applied to the comparator Ql via the low-pass filter R3C.

この動作を繰返えして0点の電位は0点の電位を中心と
して高速でスイッチングされる。
By repeating this operation, the potential at the 0 point is switched at high speed around the potential at the 0 point.

従って、信号入力は予言−クコイルLとコンデンサCm
 ’fc介してスピーカSPに加えると、高周波分が除
去されて低周波分のみが加わる〇この場合、4m号人力
が加わらないと出力は零であるから1コンデンサC1を
介しての点に信号入力を与えると、これに追1随して0
点に出力される。
Therefore, the signal input is predicted - Cu coil L and capacitor Cm
'If you apply it to the speaker SP via fc, the high frequency component will be removed and only the low frequency component will be added. In this case, the output will be zero unless the 4m human power is applied, so the signal is input to the point via the 1 capacitor C1. If you give
output to the point.

第1図に示す基本回路においては、スイッチング動作の
みであって電圧は増幅されない。
In the basic circuit shown in FIG. 1, only a switching operation is performed and the voltage is not amplified.

第2図は第1図におけるスイッチング動作の他に増幅作
用を付加した実施例でおる。
FIG. 2 shows an embodiment in which an amplification action is added in addition to the switching operation in FIG. 1.

すなわち、第1図におけるコンツクレータQl のe個
入力端子と固定抵抗R1との間に固定抵抗R,を挿入し
、さらに該コンパレータe個入力端子とe個入力端子と
の間に並列に固定抵抗R4を介在させる。
That is, a fixed resistor R is inserted between the e input terminals of the comparator Ql and the fixed resistor R1 in FIG. 1, and a fixed resistor R4 is inserted in parallel between the e input terminals and the e input terminals of the comparator intervene.

この場合の電圧増幅率はβ=シ土トとなる。In this case, the voltage amplification factor is β=Sat.

4 第3図は第1図に示す基本回路において、制御回路を設
けた実旙例であって、コンミ4レータQ1のΦ個入力端
子に設けた固定抵抗R2と接地間との間に、トランジス
タQs ’に介在させて、ペース側に固定抵抗R6を介
して制御入力を供給するように構成したものである。
4. Fig. 3 is an actual example in which a control circuit is provided in the basic circuit shown in Fig. 1, and a transistor is connected between the fixed resistor R2 provided at the Φ input terminals of the commutator Q1 and the ground. Qs' is arranged so that a control input is supplied to the pace side via a fixed resistor R6.

通常、制御入力に電圧を加えておくと、第1図に示した
実施例と同様にオン、オフ動作を行なう。
Normally, when a voltage is applied to the control input, on/off operations are performed in the same way as the embodiment shown in FIG.

制御入力をアースを位にするとトランジスタQ6は力、
トオフになって、固定抵抗R1,R2およびトランジス
タQ6の経路で流れていた電流は流れなくなって、固定
抵抗R1の電圧降下は零となるからの点の電位はαcc
と同電位になる。
When the control input is set to ground, transistor Q6 has a power,
When the current is turned off, the current that was flowing through the fixed resistors R1, R2 and the transistor Q6 no longer flows, and the voltage drop across the fixed resistor R1 becomes zero, so the potential at the point is αcc.
becomes the same potential as

このため、コンミ4レータQtの出力側は高電位になっ
て、トランジスタQ2とQ4がオンとなジローパスフィ
ルタRs Cm t−介り、テコンパレータQlのe個
入力端子が高電位になる。しかし、トランジスタQ2と
Q4の電圧降下・分があるので、その分だけコンパレー
タQ1のe個入力端子の電位が高く、コンパレータQl
の出力は保持されて、動作を停止する。この時の消費電
力はコン・ぐレータQlの回路電流のみでごく僅少であ
る。また無線通信機のスケルチの信号コントロールとし
て用いると効果的である。
Therefore, the output side of the comparator Qt becomes a high potential, and the transistors Q2 and Q4 are turned on, and e input terminals of the comparator Ql become a high potential through the low pass filter Rs Cm t-. However, since there is a voltage drop between transistors Q2 and Q4, the potential of e input terminals of comparator Q1 is high by that amount, and comparator Ql
The output of is held and the operation is stopped. The power consumption at this time is only the circuit current of the converter Ql and is extremely small. It is also effective when used as squelch signal control for wireless communication equipment.

以上に詳述したように、本発明によれば、部品のコスト
も低順であって回路の調整の手間が省け、且つ温度ドリ
フトによる電流変化が少ない低周波増幅回路を提供する
ことが出来る。
As described in detail above, according to the present invention, it is possible to provide a low frequency amplification circuit that has low component costs, eliminates the trouble of circuit adjustment, and has little current change due to temperature drift.

【図面の簡単な説明】[Brief explanation of the drawing]

一31図は本発明の一実施例金示す低周波増幅回路の結
線図であって、第2図および第3図は本発明の他の実施
例を示す低周波増幅回路の結線図である。 Q!・・・コンノ母レータ、Qz r Qs + Q4
 r Qs *Q6・・・トランジスタ、R1r R2
,R3r R4rR5* R6−固鼠抵抗、C1r C
2r Ca * C4+C6・・・コンデンサ、L・・
・チョークコイル、SP・・・スピーカ。 特許出願人 八重洲無線株式会社
FIG. 131 is a wiring diagram of a low frequency amplifier circuit showing one embodiment of the present invention, and FIGS. 2 and 3 are wiring diagrams of a low frequency amplifier circuit showing other embodiments of the invention. Q!・・・Kono Mother Reta, Qz r Qs + Q4
r Qs *Q6...Transistor, R1r R2
, R3r R4rR5* R6-solid mouse resistance, C1r C
2r Ca * C4+C6...Capacitor, L...
・Choke coil, SP...Speaker. Patent applicant Yaesu Musen Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] コンノ母し−タトゼロバイアスのコンプリメンタリ増幅
器を1段もしくは2段縦続、結線して出力段もしくはバ
ッファ段と出力段として、この低周波出力の一部をロー
ノやスフィルタを介して前記コンパレータの一方の入力
端子に結線すると共に、信号入力を前記コンパレークの
他の入力端子へ結線して、前記コン/やレータの出力で
前記バッファ段および出力段増1罷器を駆動することに
よって高周波でスイッチング動作をすること全特徴とす
る低周波増幅回路。
One or two stages of zero-bias complementary amplifiers are cascaded and connected as an output stage or a buffer stage and an output stage, and a part of this low frequency output is passed through a low-frequency filter to one of the comparators. The signal input is connected to the input terminal of the comparator, and the signal input is connected to the other input terminal of the comparator, and the output of the comparator drives the buffer stage and the output stage amplifier, thereby performing switching operation at a high frequency. A low frequency amplification circuit with all the following features.
JP58207121A 1983-11-04 1983-11-04 Low frequency amplifier circuit Pending JPS6098708A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58207121A JPS6098708A (en) 1983-11-04 1983-11-04 Low frequency amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58207121A JPS6098708A (en) 1983-11-04 1983-11-04 Low frequency amplifier circuit

Publications (1)

Publication Number Publication Date
JPS6098708A true JPS6098708A (en) 1985-06-01

Family

ID=16534538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58207121A Pending JPS6098708A (en) 1983-11-04 1983-11-04 Low frequency amplifier circuit

Country Status (1)

Country Link
JP (1) JPS6098708A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5639606A (en) * 1979-09-07 1981-04-15 Matsushita Electric Ind Co Ltd Self-excited type d-class amplifier

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5639606A (en) * 1979-09-07 1981-04-15 Matsushita Electric Ind Co Ltd Self-excited type d-class amplifier

Similar Documents

Publication Publication Date Title
JP4295109B2 (en) Power amplifier module
JPS6098708A (en) Low frequency amplifier circuit
JPS59207712A (en) Amplifier
JP2000022451A (en) Signal processing circuit device
JPS58147211A (en) Integrable differential amplifier
JP3718894B2 (en) Output circuit
JP2005303823A (en) Amplification circuit
JPH0520009Y2 (en)
JP3014557B2 (en) Audio device with built-in battery and audio signal amplifier circuit
JPH0527282B2 (en)
JPH01268302A (en) Amplifier circuit
JPS5846564Y2 (en) Width increase circuit
JPS6017168B2 (en) Pulse width modulation output amplifier circuit
JPS6325766Y2 (en)
JPH04113709A (en) Speaker amplifier circuit
JPH07123208B2 (en) Low frequency amplifier
JPS61113305A (en) Amplifier
JPH0336100Y2 (en)
JPS5913410A (en) power amplifier
JPH0535606B2 (en)
JPS5939117A (en) Comparison circuit
JPS5813004A (en) Power amplifying circuit
JPS58222604A (en) Pulse width modulation amplifier
JPS58195304A (en) Power amplifier
JPS5930311A (en) killer circuit