JPS6112371B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and is mainly directed to bipolar ICs.

Conventionally, when manufacturing bipolar ICs by performing base diffusion and emitter deposition diffusion on one main surface of a semiconductor substrate using planar technology, etc., the emitter deposition that usually uses phosphorus, and the silicon oxide film (POCl ₃ +SiO ₂ : Phosphorus oxychloride + silicon dioxide (commonly known as phosphorus glass) is used as it is as a passivation (surface protection) film. This phosphorus glass is used because it is effective in protecting semiconductor surface junctions from metal ions such as sodium in moisture that invade from the outside.

However, the above-mentioned conventional technology tends to have the following drawbacks. Hereinafter, the drawbacks will be explained using FIG. 11.

The concentration of impurities (phosphorus) in the phosphorus glass layer 10 caused by emitter deposition and diffusion is high. Then, a contact window is opened by photoetching through the phosphor glass layer 10 (contact photoetching).
When performing etching, the etching rate of the phosphorus glass layer (7000
~8000 Å/min, while the thermal oxide film (SiO ₂ film) has a larger rate of about 1200 Å/min). This causes "bleeding" of the contact window (abnormal lateral etching of the phosphor glass layer, so-called side etching), and the precision of the contact window deteriorates.

Since the protective films formed on the base portion 7 and the emitter portion 8 have different thicknesses, the oxide film 5 on the thick base portion and the phosphor glass layer 10 thereon are selectively etched at the same time in this contact photoetching step. If the phosphor glass layer 10 on the emitter portion is etched, the phosphor glass layer 10 on the emitter portion will be completely overetched so that the base contact window exposes the base region. This makes it difficult to miniaturize semiconductor devices.

An object of the present invention is to provide a method for manufacturing a semiconductor device.
The object of the present invention is to enable microfabrication and precision machining of contact windows, thereby improving yields and providing reliable products.

The basic structure of the present invention for achieving the above object will be explained with reference to the symbols written in the drawings.

According to the present invention, the step of forming the first window hole (We) in the oxide film 5 formed on the surface of the semiconductor region 7 exhibiting the first conductivity type (P type), the step of forming the first window hole (We)
a second step of introducing impurities into the first conductivity type semiconductor region 7 through the step of selectively forming a semiconductor region 8 having a second conductivity type (n type) opposite to the first conductivity type (P type); The oxide film 5 is removed when the conductive semiconductor region 8 is formed.
In the step of removing the glass layer 10 formed thereon, the oxide film 5 is selectively removed so as to expose the first conductivity type semiconductor region 7, and the oxide film 5 is removed at a position different from the first window hole (We). In the process of forming the second window hole (Wb ₁ ), the surface of the second conductive type semiconductor region 8 in the first window hole (We; We ₁ ) and the second conductive type semiconductor region 8 in the second window hole (Wb ₁ ) are A new oxide film 5 is formed on the surface 7 of the 1-conductivity type semiconductor region.
In the step of forming phosphorus sintered glass film 12, the oxide film 5 and the new oxide film 5 are formed.
e, 5b, and then the phosphosilicate glass film 12 and the new oxide film 5 formed in the first and second window holes (We ₁ , Wb ₁ ).
This step consists of the steps of removing the contact holes (We 2 , Wb ₂ ) of the second conductive type semiconductor region 8 and the first conductive type semiconductor region 7 by removing the contact holes (We ₂ , Wb 2 ).

That is, as is clear from the above, the present invention
Prior to forming the phosphosilicate glass film, a preliminary contact window hole is formed for each semiconductor region, and a new oxide film is formed in the window hole.

The present invention uses such a configuration, that is, the preliminary formation of contact windows, to align the conditions for forming contact windows for semiconductor regions of different conductivity types, and to prevent the formation of phosphosilicate glass films due to differences in oxide film thickness. This prevents over-etching. Furthermore, by forming a new oxide film within the window hole, phosphorus impurities contained in the phosphosilicate glass were prevented from diffusing into the semiconductor region.

The present invention will be specifically described below with reference to Examples. Figures 1 to 8 are for bipolar ICs.
1 is a diagram illustrating an embodiment in which the present invention is applied to form an npn transistor along the manufacturing process.

(1) Using the general manufacturing method of bipolar IC, p
(type) On a silicon substrate 1, an n ⁺ buried layer 2 and a p ⁺ buried layer 3 for isolation region are diffused, and then an n ^- epitaxial layer 4 is grown (FIG. 1).

(2) Using part of the surface oxide film 5 as a mask, B (boron) is diffused to form a p ⁺ isolation region 6 and a P base region 7 (FIG. 2).

(3) Parts of the emitter and collector are opened using photoetching technology to form window holes We and Wc, and P (phosphorus) is deposited into the P base region 7 and the n ^- epitaxial layer through these windows, and n ⁺ emitter region 8 and n ⁺ collector region 9
Diffusion forms.

A phosphorus glass layer 10 is produced on the surfaces of regions 8 and 9 and the oxide film 5 formed by this diffusion (FIG. 3).

(4) The phosphor glass layer formed in the above step is removed by etching to expose the emitter region 8 and collector region 9 (FIG. 4).

(5) The contact parts of the emitter base and the collector extraction part are opened by the first contact photoetching, and a window hole We ₁ is formed in the oxide film 5.
Forms Wb ₁ and Wc ₁ . At this time, the subsequent step 8
The opening size is the same as or wider than the opening size of the contact photoetching performed in (Fig. 5).

(6) Light oxidation is performed to form thin (300 to 1000 Å) light oxide films 5e, 5b, 5c on the contact surface.
(Figure 6).

(7) CVD-PSG (phosphorus silicate glass by vapor phase chemical deposition e.g. SiH ₄ + O ₂ +
PH ₃ ) layer 12 is formed to a thickness of about 1 μm, and then baked at 940° C. for about 10 minutes (FIG. 7).

(8) For the thin oxide film on the contact window that was formed wide in step 5, a second contact photoetching process is performed on the base, emitter, and collector contact areas to form window holes We ₂ , Wb ₂ , and Wc _{2 .} (Figure 8). Furthermore, with reference to Figure 10,
e ₁ , b ₁ , c ₁ are the hole diameters of the first contact photo,
e ₂ , b ₂ , and c ₂ are the hole diameters of the second contact photo.

(9) After depositing aluminum on the entire surface, unnecessary parts of the aluminum are photo-etched according to a predetermined wiring pattern to form wiring (electrodes) that contact each area, and the IC is completed (Figure 9).

According to the invention described in the embodiments above, the above object can be achieved and various effects can be obtained for the following reasons.

All of the phosphorus glass generated by emitter deposition and diffusion is removed, and the oxide film is etched in advance using the contact photoetch shown in Figure 1, in other words, a hole for a preliminary contact window is formed. The film thicknesses of the base and emitter portions before the second contact photoetch are the same. (In particular, the oxide film 5b on the base portion is thin like the oxide film 5e on the emitter portion (see FIG. 10).

For the above-mentioned reasons, the film quality of the etched portion is uniform, the contact hole can be formed with accurate dimensions, and microfabrication is possible.

Also, by forming new oxide in the preliminary contact window, phosphorous impurities contained in the phosphosilicate glass will not diffuse into the semiconductor region.

As a result of the above, improvements in the characteristics and yield of semiconductor devices can be expected.

The present invention is applicable to all types of bipolar transistors and ICs containing the same.

[Brief explanation of the drawing]

1 to 9 are partial cross-sectional views of manufacturing steps showing embodiments of the present invention, FIG. 10 is an enlarged cross-sectional view of a partial process for explaining the effect of contact photoetching in the present invention, and FIG. 11 is a It is an enlarged sectional view of a part of process in the conventional case. 1...p substrate, 2...n ⁺ buried layer, 3...p ⁺ buried layer for isolation diffusion, 4...n ^- epitaxial layer, 5...surface oxide film, 6...p ⁺ isolation region, 7...p ⁺ base region,
8...n ⁺ emitter region, 9...n ⁺ collector extraction part, 10...phosphorus glass layer, 11...light oxide film,
12...CVD/PSG film, 13...aluminum wiring.

Claims (1)

[Claims] 1. A step of forming a first window hole in an oxide film formed on the surface of a semiconductor region exhibiting a first conductivity type, introducing an impurity into the first conductivity type semiconductor region through the first window hole, and introducing a first window hole into the first conductivity type semiconductor region. a step of selectively forming a semiconductor region exhibiting a second conductivity type opposite to the conductivity type; a step of removing a glass layer formed on the oxide film at the time of forming the second conductivity type semiconductor region; The oxide film is selectively removed to expose the first
forming a second window hole at a position different from the window hole, on the surface of the second conductivity type semiconductor region within the first window hole and on the surface of the first conductivity type semiconductor region within the second window hole; a step of forming a new oxide film, a step of forming a phosphorescent glass film on the oxide film and the new oxide film, and then a step of forming the phosphorescent glass film in the first and second window holes. and a step of removing a new oxide film and forming contact windows in the second conductivity type semiconductor region and the first conductivity type semiconductor region.