JPS6112700Y2 - - Google Patents
Info
- Publication number
- JPS6112700Y2 JPS6112700Y2 JP17483979U JP17483979U JPS6112700Y2 JP S6112700 Y2 JPS6112700 Y2 JP S6112700Y2 JP 17483979 U JP17483979 U JP 17483979U JP 17483979 U JP17483979 U JP 17483979U JP S6112700 Y2 JPS6112700 Y2 JP S6112700Y2
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- resin
- hybrid
- silicone resin
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000010409 thin film Substances 0.000 claims description 18
- 229910000679 solder Inorganic materials 0.000 claims description 8
- 229920005989 resin Polymers 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 4
- 230000004927 fusion Effects 0.000 claims 2
- 229920002050 silicone resin Polymers 0.000 description 11
- 239000000463 material Substances 0.000 description 4
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 239000011800 void material Substances 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 1
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000011796 hollow space material Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910001120 nichrome Inorganic materials 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052703 rhodium Inorganic materials 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Description
【考案の詳細な説明】
本考案は、はんだ溶融接続された半導体素子の
樹脂封止構造に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a resin-sealed structure for semiconductor elements connected by solder melting.
第１図において、抵抗、コンデンサ機能をもつ
た薄膜チツプ１と、湿式配線基板２とをCCB接
続した薄膜混成ICにおいて、薄膜チツプ１に
は、その表面にスパツタリングにて形成された抵
抗等の膜と、はんだバンプ３の間にNiCr，Cr，
Rh，Au材料にて、金属電極４が蒸着にて形成さ
れている。ところが、この混成ICを高湿中で動
作させると金属電極４を構成するNi，Crの電食
が発生し、接触不良となるため、耐湿性を向上さ
せるべく、シリコン系の樹脂にて封止を行つてい
る。この封止方法は薄膜混成ICを全てシリコン
樹脂５にておおう必要がある。しかし、薄膜チツ
プ１と湿式配線基板２の間は150〜300μｍと狭い
ため、真空中にて脱泡しながら、シリコン樹脂５
を充填させる必要があつた。 In Fig. 1, in a thin film hybrid IC in which a thin film chip 1 having resistor and capacitor functions is connected to a wet wiring board 2 using a CCB, the thin film chip 1 has a film such as a resistor formed by sputtering on the surface of the thin film chip 1. and solder bump 3 between NiCr, Cr,
A metal electrode 4 is formed by vapor deposition using Rh and Au materials. However, when this hybrid IC is operated in high humidity, electrolytic corrosion occurs in the Ni and Cr that make up the metal electrode 4, resulting in poor contact.In order to improve moisture resistance, it is sealed with a silicone resin. is going on. This sealing method requires covering the entire thin film hybrid IC with silicone resin 5. However, since the space between the thin film chip 1 and the wet wiring board 2 is narrow at 150 to 300 μm, the silicone resin 5
It was necessary to fill it up.
しかし、薄膜混成ICの構成材料の内、この充
填したシリコン樹脂５の熱線膨張係数が他材料よ
りも一桁位大きいため、熱衝撃サイクルにてシリ
コン樹脂５の熱膨張ストレスがはんだバンプ３に
加わり、その部分で破断し、接続不良を起こすな
ど、信頼性の高い混成ICとしては重大な問題が
あつた。 However, among the constituent materials of the thin film hybrid IC, the linear thermal expansion coefficient of the filled silicone resin 5 is about an order of magnitude higher than other materials, so thermal expansion stress of the silicone resin 5 is applied to the solder bumps 3 during the thermal shock cycle. This caused serious problems for a highly reliable hybrid IC, such as breakage at that part and poor connection.
本考案の目的は、上記した従来技術の欠点をな
くし、薄膜混成ICのCCB接続部の信頼性を高め
る樹脂封止構造を提供するにある。 An object of the present invention is to provide a resin sealing structure that eliminates the drawbacks of the prior art described above and improves the reliability of the CCB connection portion of a thin film hybrid IC.
本考案の目的は低粘度のシリコン樹脂で薄膜混
成IC全面が樹脂で被覆されていて、かつ薄膜チ
ツプと基板間が中空となる構造で達成できる。 The purpose of the present invention can be achieved by using a structure in which the entire surface of the thin film hybrid IC is coated with low-viscosity silicone resin, and there is a hollow space between the thin film chip and the substrate.
以下、本考案を実施例により説明する。先ず第
１図に示すごとくCCB接続された混成ICを低粘
度のシリコン樹脂中に入れ、真空中で脱泡し、完
全に薄膜チツプ１、はんだバンプ３、湿式配線基
板２の全面をシリコン樹脂５でおおう。その後、
湿式配線基板２上の導体部（図示せず）と接続さ
れた外部リード端子６をつかみ、回転塗布機など
を利用し、その遠心力にて余分な樹脂を取り除
き、薄膜チツプ１の下部に空隙部７を作り、第２
図に示す封止構造とする。なお、外部リード端子
６にはシリコン樹脂５が付着しない様、シリコン
樹脂５の接着しにくいものでマスキングしてお
く。 The present invention will be explained below with reference to examples. First, as shown in Figure 1, a CCB-connected hybrid IC is placed in a low-viscosity silicone resin, degassed in a vacuum, and the entire surface of the thin film chip 1, solder bumps 3, and wet wiring board 2 is completely covered with silicone resin 5. Cover it with water. after that,
Grasp the external lead terminal 6 connected to the conductor part (not shown) on the wet wiring board 2, use a rotary coating machine, etc., and remove excess resin using the centrifugal force to form a void at the bottom of the thin film chip 1. Make part 7 and make part 2
The sealing structure shown in the figure is used. Note that the external lead terminals 6 are masked with a material to which the silicone resin 5 is difficult to adhere so that the silicone resin 5 does not adhere to them.
以上述べた様に、CCB接続した薄膜チツプの
下部にシリコン樹脂を完全に充填しないようにす
ることにより薄膜抵抗および容量チツプの耐湿性
を保持しつつ、はんだバンプの破断を防止し、か
つ薄膜混成ICの信頼性を高めることが可能とな
る。 As mentioned above, by not completely filling the bottom of the CCB-connected thin-film chip with silicone resin, the moisture resistance of the thin-film resistor and capacitor chip can be maintained, while the breakage of solder bumps can be prevented. It becomes possible to improve the reliability of the IC.
第１図は従来の樹脂封止構造混成ICの断面
図、第２図は本発明による樹脂封止構造膜混成
ICの断面図である。
１……薄膜チツプ、２……湿式配線基板、３…
…はんだバンプ、４……金属電極、５……シリコ
ン樹脂、６……外部リード端子、７……空隙部。
Fig. 1 is a cross-sectional view of a conventional resin-sealed structure hybrid IC, and Fig. 2 is a cross-sectional view of a conventional resin-sealed structure hybrid IC.
FIG. 3 is a cross-sectional view of an IC. 1... thin film chip, 2... wet wiring board, 3...
...Solder bump, 4...Metal electrode, 5...Silicon resin, 6...External lead terminal, 7...Void.
Claims (1)
配線基板間に空間をもたせ、かつ薄膜チツプ、配
線基板およびはんだ溶融接続を完全に樹脂にてお
おつた構造を有することを特徴とする樹脂封止型
薄膜混成IC。 A resin-sealed thin film characterized by having a structure in which a space is provided between opposing thin film chips connected by solder fusion and a wiring board, and the thin film chip, wiring board, and solder fusion connections are completely covered with resin. Hybrid IC.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17483979U JPS6112700Y2 (en) | 1979-12-19 | 1979-12-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17483979U JPS6112700Y2 (en) | 1979-12-19 | 1979-12-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5694044U JPS5694044U (en) | 1981-07-25 |
| JPS6112700Y2 true JPS6112700Y2 (en) | 1986-04-19 |
Family
ID=29685553
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17483979U Expired JPS6112700Y2 (en) | 1979-12-19 | 1979-12-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6112700Y2 (en) |
-
1979
- 1979-12-19 JP JP17483979U patent/JPS6112700Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5694044U (en) | 1981-07-25 |
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